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📄 xgate_vectors.cxgate

📁 freescale 协处理器应用相关实例
💻 CXGATE
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/******************************************************************************
													            Copyright (c) Freescale 2006
File Name    : $RCSfile: xgate_vectors.cxgate,v $

Engineer     : $Author: r32151 $

Description  : Parameterised XGATE Vector table definition for MC9S12XEP100.
               XSR references are defined in interrupts.h.


Current Revision :	$Revision: 2.0 $

Notes        : 




     *******************************************************************
     * File created by: Freescale East Kilbride MCD Applications Group *
     *******************************************************************

                                                                          
******************************************************************************/
/*===========================================================================*/
/* Freescale reserves the right to make changes without further notice to any*/
/* product herein to improve reliability, function, or design. Freescale does*/
/* not assume any  liability arising  out  of the  application or use of any */
/* product,  circuit, or software described herein;  neither  does it convey */
/* any license under its patent rights  nor the  rights of others.  Freescale*/
/* products are not designed, intended,  or authorized for use as components */
/* in  systems  intended  for  surgical  implant  into  the  body, or  other */
/* applications intended to support life, or  for any  other application  in */
/* which the failure of the Freescale product  could create a situation where*/
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/* products for any such intended  or unauthorized  application, Buyer shall */
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/* affiliates,  and distributors harmless against all claims costs, damages, */
/* and expenses, and reasonable  attorney  fees arising  out of, directly or */
/* indirectly,  any claim of personal injury  or death  associated with such */
/* unintended or unauthorized use, even if such claim alleges that  Freescale*/
/* was negligent regarding the  design  or manufacture of the part. Freescale*/
/* and the Freescale logo* are registered trademarks of Freescale Ltd.       */
/*****************************************************************************/

/************************* Include Files *************************************/
#include "s12x_peripherals.h"
#include "target.h"
#include "xgate_vectors.h"
#include "interrupts.h"
/************************* typedefs ******************************************/
/* in xgate_vectors.h */
typedef unsigned int *const xgdataptr;

/************************* #defines ******************************************/
/* in xgate_vectors.h */
/************************* Constants *****************************************/
#pragma CONST_SEG XGATE_CONST
/************************* Global Variables **********************************/
#pragma DATA_SEG SHARED_DATA
/************************* function prototypes *******************************/
/* in xgate_vectors.h */
#pragma CODE_SEG XGATE_CODE
interrupt void _XG_VEC_1E();  // Channel 1E - ATD1 compare                            
interrupt void _XG_VEC_1F();  // Channel 1F - ATD0 compare                            
interrupt void _XG_VEC_20();  // Channel 20 - TIM Pulse accumulator input edge     
interrupt void _XG_VEC_21();  // Channel 21 - TIM Pulse accumulator A overflow     
interrupt void _XG_VEC_22();  // Channel 22 - TIM overflow  
interrupt void _XG_VEC_23();  // Channel 23 - TIM channel 7                                 
interrupt void _XG_VEC_24();  // Channel 24 - TIM channel 6 
interrupt void _XG_VEC_25();  // Channel 25 - TIM channel 5 
interrupt void _XG_VEC_26();  // Channel 26 - TIM channel 4 
interrupt void _XG_VEC_27();  // Channel 27 - TIM channel 3 
interrupt void _XG_VEC_28();  // Channel 28 - TIM channel 2 
interrupt void _XG_VEC_29();  // Channel 29 - TIM channel 1 
interrupt void _XG_VEC_2A();  // Channel 2A - TIM channel 0 
interrupt void _XG_VEC_2B();  // Channel 2B - SCI7                     
interrupt void _XG_VEC_2C();  // Channel 2C - Periodic Interrupt Timer 7          
interrupt void _XG_VEC_2D();  // Channel 2D - Periodic Interrupt Timer 6          
interrupt void _XG_VEC_2E();  // Channel 2E - Periodic Interrupt Timer 5          
interrupt void _XG_VEC_2F();  // Channel 2F - Periodic Interrupt Timer 4          
interrupt void _XG_VEC_30();  // Channel 30 - Reserved
interrupt void _XG_VEC_31();  // Channel 31 - Reserved     
interrupt void _XG_VEC_32();  // Channel 32 - XGATE Software Trigger 7           
interrupt void _XG_VEC_33();  // Channel 33 - XGATE Software Trigger 6           
interrupt void _XG_VEC_34();  // Channel 34 - XGATE Software Trigger 5           
interrupt void _XG_VEC_35();  // Channel 35 - XGATE Software Trigger 4           
interrupt void _XG_VEC_36();  // Channel 36 - XGATE Software Trigger 3           
interrupt void _XG_VEC_37();  // Channel 37 - XGATE Software Trigger 2           
interrupt void _XG_VEC_38();  // Channel 38 - XGATE Software Trigger 1           
interrupt void _XG_VEC_39();  // Channel 39 - XGATE Software Trigger 0           
interrupt void _XG_VEC_3A();  // Channel 3A - Periodic Interrupt Timer 3          
interrupt void _XG_VEC_3B();  // Channel 3B - Periodic Interrupt Timer 2          
interrupt void _XG_VEC_3C();  // Channel 3C - Periodic Interrupt Timer 1          
interrupt void _XG_VEC_3D();  // Channel 3D - Periodic Interrupt Timer 0          
interrupt void _XG_VEC_3E();  // Channel 3E - Reserved                           
interrupt void _XG_VEC_3F();  // Channel 3F - Autonomous Periodical interrupt API
interrupt void _XG_VEC_40();  // Channel 40 - Low Voltage interrupt LVI
interrupt void _XG_VEC_41();  // Channel 41 - IIC1 Bus                 
interrupt void _XG_VEC_42();  // Channel 42 - SCI5                     
interrupt void _XG_VEC_43();  // Channel 43 - SCI4                     
interrupt void _XG_VEC_44();  // Channel 44 - SCI3                     
interrupt void _XG_VEC_45();  // Channel 45 - SCI2                     
interrupt void _XG_VEC_46();  // Channel 46 - PWM Emergency Shutdown   
interrupt void _XG_VEC_47();  // Channel 47 - Port P Interrupt         
interrupt void _XG_VEC_48();  // Channel 48 - CAN4 transmit            
interrupt void _XG_VEC_49();  // Channel 49 - CAN4 receive             
interrupt void _XG_VEC_4A();  // Channel 4A - CAN4 errors              
interrupt void _XG_VEC_4B();  // Channel 4B - CAN4 wake-up             
interrupt void _XG_VEC_4C();  // Channel 4C - CAN3 transmit            
interrupt void _XG_VEC_4D();  // Channel 4D - CAN3 receive             
interrupt void _XG_VEC_4E();  // Channel 4E - CAN3 errors              
interrupt void _XG_VEC_4F();  // Channel 4F - CAN3 wake-up             
interrupt void _XG_VEC_50();  // Channel 50 - CAN2 transmit
interrupt void _XG_VEC_51();  // Channel 51 - CAN2 receive 
interrupt void _XG_VEC_52();  // Channel 52 - CAN2 errors  
interrupt void _XG_VEC_53();  // Channel 53 - CAN2 wake-up 
interrupt void _XG_VEC_54();  // Channel 54 - CAN1 transmit
interrupt void _XG_VEC_55();  // Channel 55 - CAN1 receive 
interrupt void _XG_VEC_56();  // Channel 56 - CAN1 errors  
interrupt void _XG_VEC_57();  // Channel 57 - CAN1 wake-up 
interrupt void _XG_VEC_58();  // Channel 58 - CAN0 transmit
interrupt void _XG_VEC_59();  // Channel 59 - CAN0 receive 
interrupt void _XG_VEC_5A();  // Channel 5A - CAN0 errors  
interrupt void _XG_VEC_5B();  // Channel 5B - CAN0 wake-up 
interrupt void _XG_VEC_5C();  // Channel 5C - FLASH 
interrupt void _XG_VEC_5D();  // Channel 5D - FLASH error detect
interrupt void _XG_VEC_5E();  // Channel 5E - SPI2  
interrupt void _XG_VEC_5F();  // Channel 5F - SPI1
interrupt void _XG_VEC_60();  // Channel 60 - IIC0 Bus                         
interrupt void _XG_VEC_61();  // Channel 61 - SCI6                         
interrupt void _XG_VEC_62();  // Channel 62 - CRG Self Clock Mode              
interrupt void _XG_VEC_63();  // Channel 63 - CRG PLL lock                     
interrupt void _XG_VEC_64();  // Channel 64 - Pulse Accumulator B Overflow     
interrupt void _XG_VEC_65();  // Channel 65 - Modulus Down Counter underflow   
interrupt void _XG_VEC_66();  // Channel 66 - Port H                           
interrupt void _XG_VEC_67();  // Channel 67 - Port J                           
interrupt void _XG_VEC_68();  // Channel 68 - ATD1                             
interrupt void _XG_VEC_69();  // Channel 69 - ATD0                             
interrupt void _XG_VEC_6A();  // Channel 6A - SCI1                             

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