📄 mb90565.h
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#define TCCS_MSI1 _tccs.bit.MSI1
#define TCCS_MSI2 _tccs.bit.MSI2
#define TCCS_ECKE _tccs.bit.ECKE
#define TCCS_CLK _tccs.bitc.CLK
#define TCCS_MSI _tccs.bitc.MSI
__IO_EXTERN __io IO_WORD _ipcp0;
#define IPCP0 _ipcp0 /* ICU unit */
__IO_EXTERN __io IO_WORD _ipcp1;
#define IPCP1 _ipcp1
__IO_EXTERN __io IO_WORD _ipcp2;
#define IPCP2 _ipcp2
__IO_EXTERN __io IO_WORD _ipcp3;
#define IPCP3 _ipcp3
__IO_EXTERN __io ICS01STR _ics01;
#define ICS01 _ics01.byte
#define ICS01_EG00 _ics01.bit.EG00
#define ICS01_EG01 _ics01.bit.EG01
#define ICS01_EG10 _ics01.bit.EG10
#define ICS01_EG11 _ics01.bit.EG11
#define ICS01_ICE0 _ics01.bit.ICE0
#define ICS01_ICE1 _ics01.bit.ICE1
#define ICS01_ICP0 _ics01.bit.ICP0
#define ICS01_ICP1 _ics01.bit.ICP1
#define ICS01_EG0 _ics01.bitc.EG0
#define ICS01_EG1 _ics01.bitc.EG1
__IO_EXTERN __io ICS23STR _ics23;
#define ICS23 _ics23.byte
#define ICS23_EG20 _ics23.bit.EG20
#define ICS23_EG21 _ics23.bit.EG21
#define ICS23_EG30 _ics23.bit.EG30
#define ICS23_EG31 _ics23.bit.EG31
#define ICS23_ICE2 _ics23.bit.ICE2
#define ICS23_ICE3 _ics23.bit.ICE3
#define ICS23_ICP2 _ics23.bit.ICP2
#define ICS23_ICP3 _ics23.bit.ICP3
#define ICS23_EG2 _ics23.bitc.EG2
#define ICS23_EG3 _ics23.bitc.EG3
__IO_EXTERN __io ROMMSTR _romm; /* ROM mirror function */
#define ROMM _romm.byte
#define ROMM_MI _romm.bit.MI
__IO_EXTERN __io IO_WORD _occp0;
#define OCCP0 _occp0 /* OCU unit */
__IO_EXTERN __io IO_WORD _occp1;
#define OCCP1 _occp1
__IO_EXTERN __io IO_WORD _occp2;
#define OCCP2 _occp2
__IO_EXTERN __io IO_WORD _occp3;
#define OCCP3 _occp3
__IO_EXTERN __io IO_WORD _occp4;
#define OCCP4 _occp4
__IO_EXTERN __io IO_WORD _occp5;
#define OCCP5 _occp5
__IO_EXTERN __io OCS0STR _ocs0;
#define OCS0 _ocs0.byte
#define OCS0_CST0 _ocs0.bit.CST0
#define OCS0_CST1 _ocs0.bit.CST1
#define OCS0_ICE0 _ocs0.bit.ICE0
#define OCS0_ICE1 _ocs0.bit.ICE1
#define OCS0_ICP0 _ocs0.bit.ICP0
#define OCS0_ICP1 _ocs0.bit.ICP1
__IO_EXTERN __io OCS2STR _ocs2;
#define OCS2 _ocs2.byte
#define OCS2_CST0 _ocs2.bit.CST0
#define OCS2_CST1 _ocs2.bit.CST1
#define OCS2_ICE0 _ocs2.bit.ICE0
#define OCS2_ICE1 _ocs2.bit.ICE1
#define OCS2_ICP0 _ocs2.bit.ICP0
#define OCS2_ICP1 _ocs2.bit.ICP1
__IO_EXTERN __io OCS4STR _ocs4;
#define OCS4 _ocs4.byte
#define OCS4_CST0 _ocs4.bit.CST0
#define OCS4_CST1 _ocs4.bit.CST1
#define OCS4_ICE0 _ocs4.bit.ICE0
#define OCS4_ICE1 _ocs4.bit.ICE1
#define OCS4_ICP0 _ocs4.bit.ICP0
#define OCS4_ICP1 _ocs4.bit.ICP1
__IO_EXTERN __io OCS1STR _ocs1;
#define OCS1 _ocs1.byte
#define OCS1_OTD0 _ocs1.bit.OTD0
#define OCS1_OTD1 _ocs1.bit.OTD1
#define OCS1_OTE0 _ocs1.bit.OTE0
#define OCS1_OTE1 _ocs1.bit.OTE1
#define OCS1_CMOD _ocs1.bit.CMOD
__IO_EXTERN __io OCS3STR _ocs3;
#define OCS3 _ocs3.byte
#define OCS3_OTD0 _ocs3.bit.OTD0
#define OCS3_OTD1 _ocs3.bit.OTD1
#define OCS3_OTE0 _ocs3.bit.OTE0
#define OCS3_OTE1 _ocs3.bit.OTE1
#define OCS3_CMOD _ocs3.bit.CMOD
__IO_EXTERN __io OCS5STR _ocs5;
#define OCS5 _ocs5.byte
#define OCS5_OTD0 _ocs5.bit.OTD0
#define OCS5_OTD1 _ocs5.bit.OTD1
#define OCS5_OTE0 _ocs5.bit.OTE0
#define OCS5_OTE1 _ocs5.bit.OTE1
#define OCS5_CMOD _ocs5.bit.CMOD
__IO_EXTERN __io TMCR0STR _tmcr0; /* 16-Bit Reload Timer */
#define TMCR0 _tmcr0.word
#define TMCR0_TRG _tmcr0.bit.TRG
#define TMCR0_CNTE _tmcr0.bit.CNTE
#define TMCR0_UF _tmcr0.bit.UF
#define TMCR0_INTE _tmcr0.bit.INTE
#define TMCR0_RELD _tmcr0.bit.RELD
#define TMCR0_OUTL _tmcr0.bit.OUTL
#define TMCR0_OUTE _tmcr0.bit.OUTE
#define TMCR0_MOD0 _tmcr0.bit.MOD0
#define TMCR0_MOD1 _tmcr0.bit.MOD1
#define TMCR0_MOD2 _tmcr0.bit.MOD2
#define TMCR0_CSL0 _tmcr0.bit.CSL0
#define TMCR0_CSL1 _tmcr0.bit.CSL1
#define TMCR0_MOD _tmcr0.bitc.MOD
#define TMCR0_CSL _tmcr0.bitc.CSL
__IO_EXTERN __io TMCSR0STR _tmcsr0;
#define TMCSR0 _tmcsr0.word
#define TMCSR0_TRG _tmcsr0.bit.TRG
#define TMCSR0_CNTE _tmcsr0.bit.CNTE
#define TMCSR0_UF _tmcsr0.bit.UF
#define TMCSR0_INTE _tmcsr0.bit.INTE
#define TMCSR0_RELD _tmcsr0.bit.RELD
#define TMCSR0_OUTL _tmcsr0.bit.OUTL
#define TMCSR0_OUTE _tmcsr0.bit.OUTE
#define TMCSR0_MOD0 _tmcsr0.bit.MOD0
#define TMCSR0_MOD1 _tmcsr0.bit.MOD1
#define TMCSR0_MOD2 _tmcsr0.bit.MOD2
#define TMCSR0_CSL0 _tmcsr0.bit.CSL0
#define TMCSR0_CSL1 _tmcsr0.bit.CSL1
#define TMCSR0_MOD _tmcsr0.bitc.MOD
#define TMCSR0_CSL _tmcsr0.bitc.CSL
__IO_EXTERN __io TMCR1STR _tmcr1;
#define TMCR1 _tmcr1.word
#define TMCR1_TRG _tmcr1.bit.TRG
#define TMCR1_CNTE _tmcr1.bit.CNTE
#define TMCR1_UF _tmcr1.bit.UF
#define TMCR1_INTE _tmcr1.bit.INTE
#define TMCR1_RELD _tmcr1.bit.RELD
#define TMCR1_OUTL _tmcr1.bit.OUTL
#define TMCR1_OUTE _tmcr1.bit.OUTE
#define TMCR1_MOD0 _tmcr1.bit.MOD0
#define TMCR1_MOD1 _tmcr1.bit.MOD1
#define TMCR1_MOD2 _tmcr1.bit.MOD2
#define TMCR1_CSL0 _tmcr1.bit.CSL0
#define TMCR1_CSL1 _tmcr1.bit.CSL1
#define TMCR1_MOD _tmcr1.bitc.MOD
#define TMCR1_CSL _tmcr1.bitc.CSL
__IO_EXTERN __io TMCSR1STR _tmcsr1;
#define TMCSR1 _tmcsr1.word
#define TMCSR1_TRG _tmcsr1.bit.TRG
#define TMCSR1_CNTE _tmcsr1.bit.CNTE
#define TMCSR1_UF _tmcsr1.bit.UF
#define TMCSR1_INTE _tmcsr1.bit.INTE
#define TMCSR1_RELD _tmcsr1.bit.RELD
#define TMCSR1_OUTL _tmcsr1.bit.OUTL
#define TMCSR1_OUTE _tmcsr1.bit.OUTE
#define TMCSR1_MOD0 _tmcsr1.bit.MOD0
#define TMCSR1_MOD1 _tmcsr1.bit.MOD1
#define TMCSR1_MOD2 _tmcsr1.bit.MOD2
#define TMCSR1_CSL0 _tmcsr1.bit.CSL0
#define TMCSR1_CSL1 _tmcsr1.bit.CSL1
#define TMCSR1_MOD _tmcsr1.bitc.MOD
#define TMCSR1_CSL _tmcsr1.bitc.CSL
__IO_EXTERN __io IO_WORD _tmr0;
#define TMR0 _tmr0
__IO_EXTERN __io IO_BYTE _tmr0l;
#define TMR0L _tmr0l
__IO_EXTERN __io IO_BYTE _tmr0h;
#define TMR0H _tmr0h
__IO_EXTERN __io IO_WORD _tmrlr0;
#define TMRLR0 _tmrlr0
__IO_EXTERN __io IO_BYTE _tmrlr0l;
#define TMRLR0L _tmrlr0l
__IO_EXTERN __io IO_BYTE _tmrlr0h;
#define TMRLR0H _tmrlr0h
__IO_EXTERN __io IO_WORD _tmr1;
#define TMR1 _tmr1
__IO_EXTERN __io IO_BYTE _tmr1l;
#define TMR1L _tmr1l
__IO_EXTERN __io IO_BYTE _tmr1h;
#define TMR1H _tmr1h
__IO_EXTERN __io IO_WORD _tmrlr1;
#define TMRLR1 _tmrlr1
__IO_EXTERN __io IO_BYTE _tmrlr1l;
#define TMRLR1L _tmrlr1l
__IO_EXTERN __io IO_BYTE _tmrlr1h;
#define TMRLR1H _tmrlr1h
__IO_EXTERN __io RDR0STR _rdr0; /* Input Resistance Register */
#define RDR0 _rdr0.byte
#define RDR0_RD00 _rdr0.bit.RD00
#define RDR0_RD01 _rdr0.bit.RD01
#define RDR0_RD02 _rdr0.bit.RD02
#define RDR0_RD03 _rdr0.bit.RD03
#define RDR0_RD04 _rdr0.bit.RD04
#define RDR0_RD05 _rdr0.bit.RD05
#define RDR0_RD06 _rdr0.bit.RD06
#define RDR0_RD07 _rdr0.bit.RD07
__IO_EXTERN __io RDR1STR _rdr1;
#define RDR1 _rdr1.byte
#define RDR1_RD10 _rdr1.bit.RD10
#define RDR1_RD11 _rdr1.bit.RD11
#define RDR1_RD12 _rdr1.bit.RD12
#define RDR1_RD13 _rdr1.bit.RD13
#define RDR1_RD14 _rdr1.bit.RD14
#define RDR1_RD15 _rdr1.bit.RD15
#define RDR1_RD16 _rdr1.bit.RD16
#define RDR1_RD17 _rdr1.bit.RD17
__IO_EXTERN __io PACSRSTR _pacsr; /* rom cORRECTION Function */
#define PACSR _pacsr.byte
#define PACSR_AD0D _pacsr.bit.AD0D
#define PACSR_AD0E _pacsr.bit.AD0E
#define PACSR_AD1D _pacsr.bit.AD1D
#define PACSR_AD1E _pacsr.bit.AD1E
__IO_EXTERN __io DIRRSTR _dirr; /* Delayed Interrupt */
#define DIRR _dirr.byte
#define DIRR_R0 _dirr.bit.R0
__IO_EXTERN __io LPMCRSTR _lpmcr; /* Low Power Control Registers */
#define LPMCR _lpmcr.byte
#define LPMCR_RESV1 _lpmcr.bit.RESV1
#define LPMCR_CG0 _lpmcr.bit.CG0
#define LPMCR_CG1 _lpmcr.bit.CG1
#define LPMCR_RESV2 _lpmcr.bit.RESV2
#define LPMCR_RST _lpmcr.bit.RST
#define LPMCR_SPL _lpmcr.bit.SPL
#define LPMCR_SLP _lpmcr.bit.SLP
#define LPMCR_STP _lpmcr.bit.STP
#define LPMCR_CG _lpmcr.bitc.CG
__IO_EXTERN __io CKSCRSTR _ckscr;
#define CKSCR _ckscr.byte
#define CKSCR_CS0 _ckscr.bit.CS0
#define CKSCR_CS1 _ckscr.bit.CS1
#define CKSCR_MCS _ckscr.bit.MCS
#define CKSCR_RESV1 _ckscr.bit.RESV1
#define CKSCR_WS0 _ckscr.bit.WS0
#define CKSCR_WS1 _ckscr.bit.WS1
#define CKSCR_MCM _ckscr.bit.MCM
#define CKSCR_RESV2 _ckscr.bit.RESV2
#define CKSCR_CS _ckscr.bitc.CS
#define CKSCR_WS _ckscr.bitc.WS
__IO_EXTERN __io WDTCSTR _wdtc; /* Watch Dog */
#define WDTC _wdtc.byte
#define WDTC_WT0 _wdtc.bit.WT0
#define WDTC_WT1 _wdtc.bit.WT1
#define WDTC_WTE _wdtc.bit.WTE
#define WDTC_SRST _wdtc.bit.SRST
#define WDTC_ERST _wdtc.bit.ERST
#define WDTC_WRST _wdtc.bit.WRST
#define WDTC_PONR _wdtc.bit.PONR
#define WDTC_WT _wdtc.bitc.WT
__IO_EXTERN __io TBTCSTR _tbtc; /* Time Base Timer */
#define TBTC _tbtc.byte
#define TBTC_TBC0 _tbtc.bit.TBC0
#define TBTC_TBC1 _tbtc.bit.TBC1
#define TBTC_TBR _tbtc.bit.TBR
#define TBTC_TBOF _tbtc.bit.TBOF
#define TBTC_TBIE _tbtc.bit.TBIE
#define TBTC_RESV _tbtc.bit.RESV
#define TBTC_TBC _tbtc.bitc.TBC
__IO_EXTERN __io FMCSSTR _fmcs; /* Flash Control Register */
#define FMCS _fmcs.byte
#define FMCS_LPM _fmcs.bit.LPM
#define FMCS_RDY _fmcs.bit.RDY
#define FMCS_WE _fmcs.bit.WE
#define FMCS_RDYI _fmcs.bit.RDYI
#define FMCS_INTE _fmcs.bit.INTE
/*******************************************************************
*
* DESCRIPTION: Interrupt Control Register Declaration
*
* AUTHOR: Fujitsu Mikroelektronik GmbH
*
* HISTORY:
* Version 1.0 26.01.99:
* - original version
* Version 1.2 11.02.99
* - "extern" changed to pre-defined macro of IO-Wizard
* (__IO_EXTERN), requires IO-Wizard 1.7 or later
*
* Version 1.3 17.07.2002 HW Bitdefinitions as const, no RMV allowed
*
*******************************************************************/
#ifndef __ICR_H
#define __ICR_H
typedef union{
unsigned char byte;
struct{
const unsigned char IL0 :1;
const unsigned char IL1 :1;
const unsigned char IL2 :1;
const unsigned char ISE :1;
const unsigned char ICS0 :1;
const unsigned char ICS1 :1;
const unsigned char ICS2 :1;
const unsigned char ICS3 :1;
}bit;
struct{
const unsigned char :4;
const unsigned char S0 :1;
const unsigned char S1 :1;
}bitrd;
struct{
const unsigned char IL :3;
const unsigned char :1;
const unsigned char ICS :4;
}bitc;
struct{
const unsigned char :4;
const unsigned char S :2;
}bitcrd;
}ICRSTR;
__IO_EXTERN __io ICRSTR _icr[16];
#define ICR(i) _icr[i].byte
#define ICR_IL0(i) _icr[i].bit.IL0
#define ICR_IL1(i) _icr[i].bit.IL1
#define ICR_IL2(i) _icr[i].bit.IL2
#define ICR_ISE(i) _icr[i].bit.ISE
#define ICR_ICS0(i) _icr[i].bit.ICS0
#define ICR_ICS1(i) _icr[i].bit.ICS1
#define ICR_ICS2(i) _icr[i].bit.ICS2
#define ICR_ICS3(i) _icr[i].bit.ICS3
#define ICR_IL(i) _icr[i].bitc.IL
#define ICR_ICS(i) _icr[i].bitc.ICS
#define ICR_S0(i) _icr[i].bitrd.S0
#define ICR_S1(i) _icr[i].bitrd.S1
#define ICR_S(i) _icr[i].bitcrd.S
#define ICR00 _icr[0].byte
#define ICR00_IL0 _icr[0].bit.IL0
#define ICR00_IL1 _icr[0].bit.IL1
#define ICR00_IL2 _icr[0].bit.IL2
#define ICR00_ISE _icr[0].bit.ISE
#define ICR00_ICS0 _icr[0].bit.ICS0
#define ICR00_ICS1 _icr[0].bit.ICS1
#define ICR00_ICS2 _icr[0].bit.ICS2
#define ICR00_ICS3 _icr[0].bit.ICS3
#define ICR00_IL _icr[0].bitc.IL
#define ICR00_ICS _icr[0].bitc.ICS
#define ICR00_S0 _icr[0].bitrd.S0
#define ICR00_S1 _icr[0].bitrd.S1
#define ICR00_S _icr[0].bitcrd.S
#define ICR01 _icr[1].byte
#define ICR01_IL0 _icr[1].bit.IL0
#define ICR01_IL1 _icr[1].bit.IL1
#define ICR01_IL2 _icr[1].bit.IL2
#define ICR01_ISE _icr[1].bit.ISE
#define ICR01_ICS0 _icr[1].bit.ICS0
#define ICR01_ICS1 _icr[1].bit.ICS1
#define ICR01_ICS2 _icr[1].bit.ICS2
#define ICR01_ICS3 _icr[1].bit.ICS3
#define ICR01_IL _icr[1].bitc.IL
#define ICR01_ICS _icr[1].bitc.ICS
#define ICR01_S0 _icr[1].bitrd.S0
#define ICR01_S1 _icr[1].bitrd.S1
#define ICR01_S _icr[1].bitcrd.S
#define ICR02 _icr[2].byte
#define ICR02_IL0 _icr[2].bit.IL0
#define ICR02_IL1 _icr[2].bit.IL1
#define ICR02_IL2 _icr[2].bit.IL2
#define ICR02_ISE _icr[2].bit.ISE
#define ICR02_ICS0 _icr[2].bit.ICS0
#define ICR02_ICS1 _icr[2].bit.ICS1
#define ICR02_ICS2 _icr[2].bit.ICS2
#define ICR02_ICS3 _icr[2].bit.ICS3
#define ICR02_IL _icr[2].bitc.IL
#define ICR02_ICS _icr[2].bitc.ICS
#define ICR02_S0 _icr[2].bitrd.S0
#define ICR02_S1 _icr[2].bitrd.S1
#define ICR02_S _icr[2].bitcrd.S
#define ICR03 _icr[3].byte
#define ICR03_IL0 _icr[3].bit.IL0
#define ICR03_IL1 _icr[3].bit.IL1
#define ICR03_IL2 _icr[3].bit.IL2
#define ICR03_ISE _icr[3].bit.ISE
#define ICR03_ICS0 _icr[3].bit.ICS0
#define ICR03_ICS1 _icr[3].bit.ICS1
#define ICR03_ICS2 _icr[3].bit.ICS2
#define ICR03_ICS3 _icr[3].bit.ICS3
#define ICR03_IL _icr[3].bitc.IL
#define ICR03_ICS _icr[3].bitc.ICS
#define ICR03_S0 _icr[3].bitrd.S0
#define ICR03_S1 _icr[3].bitrd.S1
#define ICR03_S _icr[3].bitcrd.S
#define ICR04 _icr[4].byte
#define ICR04_IL4 _icr[4].bit.IL0
#define ICR04_IL1 _icr[4].bit.IL1
#define ICR04_IL2 _icr[4].bit.IL2
#define ICR04_ISE _icr[4].bit.ISE
#define ICR04_ICS4 _icr[4].bit.ICS0
#define ICR04_ICS1 _icr[4].bit.ICS1
#define ICR04_ICS2 _icr[4].bit.ICS2
#define ICR04_ICS3 _icr[4].bit.ICS3
#define ICR04_IL _icr[4].bitc.IL
#define ICR04_ICS _icr[4].bitc.ICS
#define ICR04_S4 _icr[4].bitrd.S0
#define ICR04_S1 _icr[4].bitrd.S1
#define ICR04_S _icr[4].bitcrd.S
#define ICR05 _icr[5].byte
#define ICR05_IL0 _icr[5].bit.IL0
#define ICR05_IL1 _icr[5].bit.IL1
#define ICR05_IL2 _icr[5].bit.IL2
#define ICR05_ISE _icr[5].bit.ISE
#define ICR05_ICS0 _icr[5].bit.ICS0
#define ICR05_ICS1 _icr[5].bit.ICS1
#define ICR05_ICS2 _icr[5].bit.ICS2
#define ICR05_ICS3 _icr[5].bit.ICS3
#define ICR05_IL _icr[5].bitc.IL
#define ICR05_ICS _icr[5].bitc.ICS
#define ICR05_S0 _icr[5].bitrd.S0
#define ICR05_S1 _icr[5].bitrd.S1
#define ICR05_S _icr[5].bitcrd.S
#define ICR06 _icr[6].byte
#define ICR06_IL0 _icr[6].bit.IL0
#define ICR06_IL1 _icr[6].bit.IL1
#define ICR06_IL2 _icr[6].bit.IL2
#define ICR06_ISE _icr[6].bit.ISE
#define ICR06_ICS0 _icr[6].bit.ICS0
#define ICR06_ICS1 _icr[6].bit.ICS1
#define ICR06_ICS2 _icr[6].bit.ICS2
#define ICR06_ICS3 _icr[6].bit.ICS3
#define ICR06_IL _icr[6].bitc.IL
#define ICR06_ICS _icr[6].bitc.ICS
#define ICR06_S0 _icr[6].bitrd.S0
#define ICR06_S1 _icr[6].bitrd.S1
#define ICR06_S _icr[6].bitcrd.S
#define ICR07 _icr[7].byte
#define ICR07_IL0 _icr[7].bit.IL0
#define ICR07_IL1 _icr[7].bit.IL1
#define ICR07_IL2 _icr[7].bit.IL2
#define ICR07_ISE _icr[7].bit.ISE
#define ICR07_ICS0 _icr[7].bit.ICS0
#define ICR07_ICS1 _icr[7].bit.ICS1
#define ICR07_ICS2 _icr[7].bit.ICS2
#define ICR07_ICS3 _icr[7].bit.ICS3
#define ICR07_IL _icr[7].bitc.IL
#define ICR07_ICS _icr[7].bitc.ICS
#define ICR07_S0 _icr[7].bitrd.S0
#define ICR07_S1 _icr[7].bitrd.S1
#define ICR07_S _icr[7].bitcrd.S
#define ICR08 _icr[8].byte
#define ICR08_IL0 _icr[8].bit.IL0
#define ICR08_IL1 _icr[8].bit.IL1
#define ICR08_IL2 _icr[8].bit.IL2
#define ICR08_ISE _icr[8].bit.ISE
#define ICR08_ICS0 _icr[8].bit.ICS0
#define ICR08_ICS1 _icr[8].bit.ICS1
#define ICR08_ICS2 _icr[8].bit.ICS2
#define ICR08_ICS3 _icr[8].bit.ICS3
#define ICR08_IL _icr[8].bitc.IL
#define ICR08_ICS _icr[8].bitc.ICS
#define ICR08_S0 _icr[8].bitrd.S0
#define ICR08_S1 _icr[8].bitrd.S1
#define ICR08_S _icr[8].bitcrd.S
#define ICR09 _icr[9].byte
#define ICR09_IL0 _icr[9].bit.IL0
#define ICR09_IL1 _icr[9].bit.IL1
#define ICR09_IL2 _icr[9].bit.IL2
#define ICR09_ISE _icr[9].bit.ISE
#define ICR09_ICS0 _icr[9].bit.ICS0
#define ICR09_ICS1 _icr[9].bit.ICS1
#define ICR09_ICS2 _icr[9].bit.ICS2
#define ICR09_ICS3 _icr[9].bit.ICS3
#define ICR09_IL _icr[9].bitc.IL
#define ICR09_ICS _icr[9].bitc.ICS
#define ICR09_S0 _icr[9].bitrd.S0
#define ICR09_S1 _icr[9].bitrd.S1
#define ICR09_S _icr[9].bitcrd.S
#define ICR10 _icr[10].byte
#define ICR10_IL0 _icr[10].bit.IL0
#define ICR10_IL1 _icr[10].bit.IL1
#define ICR10_IL2 _icr[10].bit.IL2
#define ICR10_ISE _icr[10].bit.ISE
#define ICR10_ICS0 _icr[10].bit.ICS0
#define ICR10_ICS1 _icr[10].bit.ICS1
#define ICR10_ICS2 _icr[10].bit.ICS2
#define ICR10_ICS3 _icr[10].bit.ICS3
#define ICR10_IL _icr[10].bitc.IL
#define ICR10_ICS _icr[10].bitc.ICS
#define ICR10_S0 _icr[10].bitrd.S0
#define ICR10_S1 _icr[10].bitrd.S1
#define ICR10_S _icr[10].bitcrd.S
#define ICR11 _icr[11].byte
#define ICR11_IL0 _icr[11].bit.IL0
#define ICR11_IL1 _icr[11].bit.IL1
#define ICR11_IL2 _icr[11].bit.IL2
#define ICR11_ISE _icr[11].bit.ISE
#define ICR11_ICS0 _icr[11].bit.ICS0
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