📄 mb90580.h
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#define PDR9_P97 _pdr9.bit.P97
__IO_EXTERN __io PDRASTR _pdra;
#define PDRA _pdra.byte
#define PDRA_PA0 _pdra.bit.PA0
#define PDRA_PA1 _pdra.bit.PA1
#define PDRA_PA2 _pdra.bit.PA2
__IO_EXTERN __io DDR0STR _ddr0; /* PORT DIR */
#define DDR0 _ddr0.byte
#define DDR0_D00 _ddr0.bit.D00
#define DDR0_D01 _ddr0.bit.D01
#define DDR0_D02 _ddr0.bit.D02
#define DDR0_D03 _ddr0.bit.D03
#define DDR0_D04 _ddr0.bit.D04
#define DDR0_D05 _ddr0.bit.D05
#define DDR0_D06 _ddr0.bit.D06
#define DDR0_D07 _ddr0.bit.D07
__IO_EXTERN __io DDR1STR _ddr1;
#define DDR1 _ddr1.byte
#define DDR1_D10 _ddr1.bit.D10
#define DDR1_D11 _ddr1.bit.D11
#define DDR1_D12 _ddr1.bit.D12
#define DDR1_D13 _ddr1.bit.D13
#define DDR1_D14 _ddr1.bit.D14
#define DDR1_D15 _ddr1.bit.D15
#define DDR1_D16 _ddr1.bit.D16
#define DDR1_D17 _ddr1.bit.D17
__IO_EXTERN __io DDR2STR _ddr2;
#define DDR2 _ddr2.byte
#define DDR2_D20 _ddr2.bit.D20
#define DDR2_D21 _ddr2.bit.D21
#define DDR2_D22 _ddr2.bit.D22
#define DDR2_D23 _ddr2.bit.D23
#define DDR2_D24 _ddr2.bit.D24
#define DDR2_D25 _ddr2.bit.D25
#define DDR2_D26 _ddr2.bit.D26
#define DDR2_D27 _ddr2.bit.D27
__IO_EXTERN __io DDR3STR _ddr3;
#define DDR3 _ddr3.byte
#define DDR3_D30 _ddr3.bit.D30
#define DDR3_D31 _ddr3.bit.D31
#define DDR3_D32 _ddr3.bit.D32
#define DDR3_D33 _ddr3.bit.D33
#define DDR3_D34 _ddr3.bit.D34
#define DDR3_D35 _ddr3.bit.D35
#define DDR3_D36 _ddr3.bit.D36
#define DDR3_D37 _ddr3.bit.D37
__IO_EXTERN __io DDR4STR _ddr4;
#define DDR4 _ddr4.byte
#define DDR4_D40 _ddr4.bit.D40
#define DDR4_D41 _ddr4.bit.D41
#define DDR4_D42 _ddr4.bit.D42
#define DDR4_D43 _ddr4.bit.D43
#define DDR4_D44 _ddr4.bit.D44
#define DDR4_D45 _ddr4.bit.D45
#define DDR4_D46 _ddr4.bit.D46
#define DDR4_D47 _ddr4.bit.D47
__IO_EXTERN __io DDR5STR _ddr5;
#define DDR5 _ddr5.byte
#define DDR5_D50 _ddr5.bit.D50
#define DDR5_D51 _ddr5.bit.D51
#define DDR5_D52 _ddr5.bit.D52
#define DDR5_D53 _ddr5.bit.D53
#define DDR5_D54 _ddr5.bit.D54
#define DDR5_D55 _ddr5.bit.D55
#define DDR5_D56 _ddr5.bit.D56
#define DDR5_D57 _ddr5.bit.D57
__IO_EXTERN __io DDR6STR _ddr6;
#define DDR6 _ddr6.byte
#define DDR6_D60 _ddr6.bit.D60
#define DDR6_D61 _ddr6.bit.D61
#define DDR6_D62 _ddr6.bit.D62
#define DDR6_D63 _ddr6.bit.D63
#define DDR6_D64 _ddr6.bit.D64
#define DDR6_D65 _ddr6.bit.D65
__IO_EXTERN __io DDR7STR _ddr7;
#define DDR7 _ddr7.byte
#define DDR7_D71 _ddr7.bit.D71
#define DDR7_D72 _ddr7.bit.D72
#define DDR7_D73 _ddr7.bit.D73
#define DDR7_D74 _ddr7.bit.D74
__IO_EXTERN __io DDR8STR _ddr8;
#define DDR8 _ddr8.byte
#define DDR8_D80 _ddr8.bit.D80
#define DDR8_D81 _ddr8.bit.D81
#define DDR8_D82 _ddr8.bit.D82
#define DDR8_D83 _ddr8.bit.D83
#define DDR8_D84 _ddr8.bit.D84
#define DDR8_D85 _ddr8.bit.D85
#define DDR8_D86 _ddr8.bit.D86
#define DDR8_D87 _ddr8.bit.D87
__IO_EXTERN __io DDR9STR _ddr9;
#define DDR9 _ddr9.byte
#define DDR9_D90 _ddr9.bit.D90
#define DDR9_D91 _ddr9.bit.D91
#define DDR9_D92 _ddr9.bit.D92
#define DDR9_D93 _ddr9.bit.D93
#define DDR9_D94 _ddr9.bit.D94
#define DDR9_D95 _ddr9.bit.D95
#define DDR9_D96 _ddr9.bit.D96
#define DDR9_D97 _ddr9.bit.D97
__IO_EXTERN __io DDRASTR _ddra;
#define DDRA _ddra.byte
#define DDRA_DA0 _ddra.bit.DA0
#define DDRA_DA1 _ddra.bit.DA1
#define DDRA_DA2 _ddra.bit.DA2
__IO_EXTERN __io ODR4STR _odr4; /* Output Pin Register */
#define ODR4 _odr4.byte
#define ODR4_OD40 _odr4.bit.OD40
#define ODR4_OD41 _odr4.bit.OD41
#define ODR4_OD42 _odr4.bit.OD42
#define ODR4_OD43 _odr4.bit.OD43
#define ODR4_OD44 _odr4.bit.OD44
#define ODR4_OD45 _odr4.bit.OD45
#define ODR4_OD46 _odr4.bit.OD46
#define ODR4_OD47 _odr4.bit.OD47
__IO_EXTERN __io ADERSTR _ader; /* Analog Input Enable Register */
#define ADER _ader.byte
#define ADER_ADE0 _ader.bit.ADE0
#define ADER_ADE1 _ader.bit.ADE1
#define ADER_ADE2 _ader.bit.ADE2
#define ADER_ADE3 _ader.bit.ADE3
#define ADER_ADE4 _ader.bit.ADE4
#define ADER_ADE5 _ader.bit.ADE5
#define ADER_ADE6 _ader.bit.ADE6
#define ADER_ADE7 _ader.bit.ADE7
__IO_EXTERN __io RDR0STR _rdr0; /* Input Resistance Register */
#define RDR0 _rdr0.byte
#define RDR0_RD00 _rdr0.bit.RD00
#define RDR0_RD01 _rdr0.bit.RD01
#define RDR0_RD02 _rdr0.bit.RD02
#define RDR0_RD03 _rdr0.bit.RD03
#define RDR0_RD04 _rdr0.bit.RD04
#define RDR0_RD05 _rdr0.bit.RD05
#define RDR0_RD06 _rdr0.bit.RD06
#define RDR0_RD07 _rdr0.bit.RD07
__IO_EXTERN __io RDR1STR _rdr1;
#define RDR1 _rdr1.byte
#define RDR1_RD10 _rdr1.bit.RD10
#define RDR1_RD11 _rdr1.bit.RD11
#define RDR1_RD12 _rdr1.bit.RD12
#define RDR1_RD13 _rdr1.bit.RD13
#define RDR1_RD14 _rdr1.bit.RD14
#define RDR1_RD15 _rdr1.bit.RD15
#define RDR1_RD16 _rdr1.bit.RD16
#define RDR1_RD17 _rdr1.bit.RD17
__IO_EXTERN __io RDR6STR _rdr6;
#define RDR6 _rdr6.byte
#define RDR6_RD60 _rdr6.bit.RD60
#define RDR6_RD61 _rdr6.bit.RD61
#define RDR6_RD62 _rdr6.bit.RD62
#define RDR6_RD63 _rdr6.bit.RD63
#define RDR6_RD64 _rdr6.bit.RD64
#define RDR6_RD65 _rdr6.bit.RD65
__IO_EXTERN __io LNSRLSTR _lnsrl; /* Low Noise Output */
#define LNSRL _lnsrl.byte
#define LNSRL_LN0 _lnsrl.bit.LN0
#define LNSRL_LN1 _lnsrl.bit.LN1
#define LNSRL_LN2 _lnsrl.bit.LN2
#define LNSRL_LN3 _lnsrl.bit.LN3
#define LNSRL_LN4 _lnsrl.bit.LN4
#define LNSRL_LN5 _lnsrl.bit.LN5
#define LNSRL_LN6 _lnsrl.bit.LN6
#define LNSRL_LN7 _lnsrl.bit.LN7
__IO_EXTERN __io LNSRHSTR _lnsrh;
#define LNSRH _lnsrh.byte
#define LNSRH_LN8 _lnsrh.bit.LN8
#define LNSRH_LN9 _lnsrh.bit.LN9
#define LNSRH_LNA _lnsrh.bit.LNA
#define LNSRH_LNB _lnsrh.bit.LNB
__IO_EXTERN __io SMR0STR _smr0; /* UART0,1,2,3,4 */
#define SMR0 _smr0.byte
#define SMR0_SOE _smr0.bit.SOE
#define SMR0_SCKE _smr0.bit.SCKE
#define SMR0_CS0 _smr0.bit.CS0
#define SMR0_CS1 _smr0.bit.CS1
#define SMR0_CS2 _smr0.bit.CS2
#define SMR0_MD0 _smr0.bit.MD0
#define SMR0_MD1 _smr0.bit.MD1
#define SMR0_CS _smr0.bitc.CS
#define SMR0_MD _smr0.bitc.MD
__IO_EXTERN __io SMR1STR _smr1;
#define SMR1 _smr1.byte
#define SMR1_SOE _smr1.bit.SOE
#define SMR1_SCKE _smr1.bit.SCKE
#define SMR1_CS0 _smr1.bit.CS0
#define SMR1_CS1 _smr1.bit.CS1
#define SMR1_CS2 _smr1.bit.CS2
#define SMR1_MD0 _smr1.bit.MD0
#define SMR1_MD1 _smr1.bit.MD1
#define SMR1_CS _smr1.bitc.CS
#define SMR1_MD _smr1.bitc.MD
__IO_EXTERN __io SMR2STR _smr2;
#define SMR2 _smr2.byte
#define SMR2_SOE _smr2.bit.SOE
#define SMR2_SCKE _smr2.bit.SCKE
#define SMR2_CS0 _smr2.bit.CS0
#define SMR2_CS1 _smr2.bit.CS1
#define SMR2_CS2 _smr2.bit.CS2
#define SMR2_MD0 _smr2.bit.MD0
#define SMR2_MD1 _smr2.bit.MD1
#define SMR2_CS _smr2.bitc.CS
#define SMR2_MD _smr2.bitc.MD
__IO_EXTERN __io SMR3STR _smr3;
#define SMR3 _smr3.byte
#define SMR3_SOE _smr3.bit.SOE
#define SMR3_SCKE _smr3.bit.SCKE
#define SMR3_CS0 _smr3.bit.CS0
#define SMR3_CS1 _smr3.bit.CS1
#define SMR3_CS2 _smr3.bit.CS2
#define SMR3_MD0 _smr3.bit.MD0
#define SMR3_MD1 _smr3.bit.MD1
#define SMR3_CS _smr3.bitc.CS
#define SMR3_MD _smr3.bitc.MD
__IO_EXTERN __io SMR4STR _smr4;
#define SMR4 _smr4.byte
#define SMR4_SOE _smr4.bit.SOE
#define SMR4_SCKE _smr4.bit.SCKE
#define SMR4_CS0 _smr4.bit.CS0
#define SMR4_CS1 _smr4.bit.CS1
#define SMR4_CS2 _smr4.bit.CS2
#define SMR4_MD0 _smr4.bit.MD0
#define SMR4_MD1 _smr4.bit.MD1
#define SMR4_CS _smr4.bitc.CS
#define SMR4_MD _smr4.bitc.MD
__IO_EXTERN __io SCR0STR _scr0;
#define SCR0 _scr0.byte
#define SCR0_TXE _scr0.bit.TXE
#define SCR0_RXE _scr0.bit.RXE
#define SCR0_REC _scr0.bit.REC
#define SCR0_AD _scr0.bit.AD
#define SCR0_CL _scr0.bit.CL
#define SCR0_SBL _scr0.bit.SBL
#define SCR0_P _scr0.bit.P
#define SCR0_PEN _scr0.bit.PEN
__IO_EXTERN __io SCR1STR _scr1;
#define SCR1 _scr1.byte
#define SCR1_TXE _scr1.bit.TXE
#define SCR1_RXE _scr1.bit.RXE
#define SCR1_REC _scr1.bit.REC
#define SCR1_AD _scr1.bit.AD
#define SCR1_CL _scr1.bit.CL
#define SCR1_SBL _scr1.bit.SBL
#define SCR1_P _scr1.bit.P
#define SCR1_PEN _scr1.bit.PEN
__IO_EXTERN __io SCR2STR _scr2;
#define SCR2 _scr2.byte
#define SCR2_TXE _scr2.bit.TXE
#define SCR2_RXE _scr2.bit.RXE
#define SCR2_REC _scr2.bit.REC
#define SCR2_AD _scr2.bit.AD
#define SCR2_CL _scr2.bit.CL
#define SCR2_SBL _scr2.bit.SBL
#define SCR2_P _scr2.bit.P
#define SCR2_PEN _scr2.bit.PEN
__IO_EXTERN __io SCR3STR _scr3;
#define SCR3 _scr3.byte
#define SCR3_TXE _scr3.bit.TXE
#define SCR3_RXE _scr3.bit.RXE
#define SCR3_REC _scr3.bit.REC
#define SCR3_AD _scr3.bit.AD
#define SCR3_CL _scr3.bit.CL
#define SCR3_SBL _scr3.bit.SBL
#define SCR3_P _scr3.bit.P
#define SCR3_PEN _scr3.bit.PEN
__IO_EXTERN __io SCR4STR _scr4;
#define SCR4 _scr4.byte
#define SCR4_TXE _scr4.bit.TXE
#define SCR4_RXE _scr4.bit.RXE
#define SCR4_REC _scr4.bit.REC
#define SCR4_AD _scr4.bit.AD
#define SCR4_CL _scr4.bit.CL
#define SCR4_SBL _scr4.bit.SBL
#define SCR4_P _scr4.bit.P
#define SCR4_PEN _scr4.bit.PEN
__IO_EXTERN __io SIDR0STR _sidr0;
#define SIDR0 _sidr0.byte
__IO_EXTERN __io IO_BYTE _sodr0;
#define SODR0 _sodr0
__IO_EXTERN __io SIDR1STR _sidr1;
#define SIDR1 _sidr1.byte
__IO_EXTERN __io IO_BYTE _sodr1;
#define SODR1 _sodr1
__IO_EXTERN __io SIDR2STR _sidr2;
#define SIDR2 _sidr2.byte
__IO_EXTERN __io IO_BYTE _sodr2;
#define SODR2 _sodr2
__IO_EXTERN __io SIDR3STR _sidr3;
#define SIDR3 _sidr3.byte
__IO_EXTERN __io IO_BYTE _sodr3;
#define SODR3 _sodr3
__IO_EXTERN __io SIDR4STR _sidr4;
#define SIDR4 _sidr4.byte
__IO_EXTERN __io IO_BYTE _sodr4;
#define SODR4 _sodr4
__IO_EXTERN __io SSR0STR _ssr0;
#define SSR0 _ssr0.byte
#define SSR0_TIE _ssr0.bit.TIE
#define SSR0_RIE _ssr0.bit.RIE
#define SSR0_TDRE _ssr0.bit.TDRE
#define SSR0_RDRF _ssr0.bit.RDRF
#define SSR0_FRE _ssr0.bit.FRE
#define SSR0_ORE _ssr0.bit.ORE
#define SSR0_PE _ssr0.bit.PE
__IO_EXTERN __io SSR1STR _ssr1;
#define SSR1 _ssr1.byte
#define SSR1_TIE _ssr1.bit.TIE
#define SSR1_RIE _ssr1.bit.RIE
#define SSR1_TDRE _ssr1.bit.TDRE
#define SSR1_RDRF _ssr1.bit.RDRF
#define SSR1_FRE _ssr1.bit.FRE
#define SSR1_ORE _ssr1.bit.ORE
#define SSR1_PE _ssr1.bit.PE
__IO_EXTERN __io SSR2STR _ssr2;
#define SSR2 _ssr2.byte
#define SSR2_TIE _ssr2.bit.TIE
#define SSR2_RIE _ssr2.bit.RIE
#define SSR2_TDRE _ssr2.bit.TDRE
#define SSR2_RDRF _ssr2.bit.RDRF
#define SSR2_FRE _ssr2.bit.FRE
#define SSR2_ORE _ssr2.bit.ORE
#define SSR2_PE _ssr2.bit.PE
__IO_EXTERN __io SSR3STR _ssr3;
#define SSR3 _ssr3.byte
#define SSR3_TIE _ssr3.bit.TIE
#define SSR3_RIE _ssr3.bit.RIE
#define SSR3_TDRE _ssr3.bit.TDRE
#define SSR3_RDRF _ssr3.bit.RDRF
#define SSR3_FRE _ssr3.bit.FRE
#define SSR3_ORE _ssr3.bit.ORE
#define SSR3_PE _ssr3.bit.PE
__IO_EXTERN __io SSR4STR _ssr4;
#define SSR4 _ssr4.byte
#define SSR4_TIE _ssr4.bit.TIE
#define SSR4_RIE _ssr4.bit.RIE
#define SSR4_TDRE _ssr4.bit.TDRE
#define SSR4_RDRF _ssr4.bit.RDRF
#define SSR4_FRE _ssr4.bit.FRE
#define SSR4_ORE _ssr4.bit.ORE
#define SSR4_PE _ssr4.bit.PE
__IO_EXTERN __io CDCR0STR _cdcr0;
#define CDCR0 _cdcr0.byte
#define CDCR0_DIV0 _cdcr0.bit.DIV0
#define CDCR0_DIV1 _cdcr0.bit.DIV1
#define CDCR0_DIV2 _cdcr0.bit.DIV2
#define CDCR0_DIV3 _cdcr0.bit.DIV3
#define CDCR0_MD _cdcr0.bit.MD
#define CDCR0_DIV _cdcr0.bitc.DIV
__IO_EXTERN __io CDCR1STR _cdcr1;
#define CDCR1 _cdcr1.byte
#define CDCR1_DIV0 _cdcr1.bit.DIV0
#define CDCR1_DIV1 _cdcr1.bit.DIV1
#define CDCR1_DIV2 _cdcr1.bit.DIV2
#define CDCR1_DIV3 _cdcr1.bit.DIV3
#define CDCR1_MD _cdcr1.bit.MD
#define CDCR1_DIV _cdcr1.bitc.DIV
__IO_EXTERN __io CDCR2STR _cdcr2;
#define CDCR2 _cdcr2.byte
#define CDCR2_DIV0 _cdcr2.bit.DIV0
#define CDCR2_DIV1 _cdcr2.bit.DIV1
#define CDCR2_DIV2 _cdcr2.bit.DIV2
#define CDCR2_DIV3 _cdcr2.bit.DIV3
#define CDCR2_MD _cdcr2.bit.MD
#define CDCR2_DIV _cdcr2.bitc.DIV
__IO_EXTERN __io CDCR3STR _cdcr3;
#define CDCR3 _cdcr3.byte
#define CDCR3_DIV0 _cdcr3.bit.DIV0
#define CDCR3_DIV1 _cdcr3.bit.DIV1
#define CDCR3_DIV2 _cdcr3.bit.DIV2
#define CDCR3_DIV3 _cdcr3.bit.DIV3
#define CDCR3_MD _cdcr3.bit.MD
#define CDCR3_DIV _cdcr3.bitc.DIV
__IO_EXTERN __io CDCR4STR _cdcr4;
#define CDCR4 _cdcr4.byte
#define CDCR4_DIV0 _cdcr4.bit.DIV0
#define CDCR4_DIV1 _cdcr4.bit.DIV1
#define CDCR4_DIV2 _cdcr4.bit.DIV2
#define CDCR4_DIV3 _cdcr4.bit.DIV3
#define CDCR4_MD _cdcr4.bit.MD
#define CDCR4_DIV _cdcr4.bitc.DIV
__IO_EXTERN __io ENIRSTR _enir; /* DTP, External Interrupts */
#define ENIR _enir.byte
#define ENIR_EN0 _enir.bit.EN0
#define ENIR_EN1 _enir.bit.EN1
#define ENIR_EN2 _enir.bit.EN2
#define ENIR_EN3 _enir.bit.EN3
#define ENIR_EN4 _enir.bit.EN4
#define ENIR_EN5 _enir.bit.EN5
#define ENIR_EN6 _enir.bit.EN6
#define ENIR_EN7 _enir.bit.EN7
__IO_EXTERN __io EIRRSTR _eirr;
#define EIRR _eirr.byte
#define EIRR_ER0 _eirr.bit.ER0
#define EIRR_ER1 _eirr.bit.ER1
#define EIRR_ER2 _eirr.bit.ER2
#define EIRR_ER3 _eirr.bit.ER3
#define EIRR_ER4 _eirr.bit.ER4
#define EIRR_ER5 _eirr.bit.ER5
#define EIRR_ER6 _eirr.bit.ER6
#define EIRR_ER7 _eirr.bit.ER7
__IO_EXTERN __io ELVRSTR _elvr;
#define ELVR _elvr.word
#define ELVR_LA0 _elvr.bit.LA0
#define ELVR_LB0 _elvr.bit.LB0
#define ELVR_LA1 _elvr.bit.LA1
#define ELVR_LB1 _elvr.bit.LB1
#define ELVR_LA2 _elvr.bit.LA2
#define ELVR_LB2 _elvr.bit.LB2
#define ELVR_LA3 _elvr.bit.LA3
#define ELVR_LB3 _elvr.bit.LB3
#define ELVR_LA4 _elvr.bit.LA4
#define ELVR_LB4 _elvr.bit.LB4
#define ELVR_LA5 _elvr.bit.LA5
#define ELVR_LB5 _elvr.bit.LB5
#define ELVR_LA6 _elvr.bit.LA6
#define ELVR_LB6 _elvr.bit.LB6
#define ELVR_LA7 _elvr.bit.LA7
#define ELVR_LB7 _elvr.bit.LB7
/*******************************************************************
*
* DESCRIPTION: Interrupt Control Register Declaration
*
* AUTHOR: Fujitsu Mikroelektronik GmbH
*
* HISTORY:
* Version 1.0 03.07.00: original version
* 1.1 01.11.00: ADCSTR Structure realigned, ADC Structure modified for wrong bit order Busy bit moved to bit 15
* Version 1.2 22.07.2002 : HW ADCS1, ADCR-Bitdefinitions as const, no RMV allowed
*
*******************************************************************/
#ifndef __ADC_H
#define __ADC_H
typedef union{ /* */
IO_WORD word;
struct{
const IO_WORD ANE0 :1;
const IO_WORD ANE1 :1;
const IO_WORD ANE2 :1;
const IO_WORD ANS0 :1;
const IO_WORD ANS1 :1;
const IO_WORD ANS2 :1;
const IO_WORD MD0 :1;
const IO_WORD MD1 :1;
const IO_WORD RESV :1;
const IO_WORD STRT :1;
const IO_WORD STS0 :1;
const IO_WORD STS1 :1;
const IO_WORD PAUS :1;
const IO_WORD INTE :1;
const IO_WORD INT :1;
const IO_WORD BUSY :1;
}bit;
struct{
const IO_WORD ANE :3;
const IO_WORD ANS :3;
const IO_WORD MD :2;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD STS :2;
}bitc;
}ADCSSTR;
typedef union{
IO_BYTE byte;
struct{
const IO_BYTE ANE0 :1;
const IO_BYTE ANE1 :1;
const IO_BYTE ANE2 :1;
const IO_BYTE ANS0 :1;
const IO_BYTE ANS1 :1;
const IO_BYTE ANS2 :1;
const IO_BYTE MD0 :1;
const IO_BYTE MD1 :1;
}bit;
struct{
const IO_BYTE ANE :3;
const IO_BYTE ANS :3;
const IO_BYTE MD :2;
}bitc;
}ADCS1STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE RESV :1;
IO_BYTE STRT :1;
IO_BYTE STS0 :1;
IO_BYTE STS1 :1;
IO_BYTE PAUS :1;
IO_BYTE INTE :1;
IO_BYTE INT :1;
IO_BYTE BUSY :1;
}bit;
struct{
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE STS :2;
}bitc;
}ADCS2STR;
typedef union{
IO_WORD word;
struct{
const IO_WORD D0 :1;
const IO_WORD D1 :1;
const IO_WORD D2 :1;
const IO_WORD D3 :1;
const IO_WORD D4 :1;
const IO_WORD D5 :1;
const IO_WORD D6 :1;
const IO_WORD D7 :1;
const IO_WORD D8 :1;
const IO_WORD D9 :1;
const IO_WORD :1;
const IO_WORD CT0 :1;
const IO_WORD CT1 :1;
const IO_WORD ST0 :1;
const IO_WORD ST1 :1;
const IO_WORD S10 :1;
}bit;
struct{
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
const IO_WORD :1;
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