mb90570.h

富士通单片机MB90F387上实现MODBUS

#define PPGC1_PUF1 _ppgc1.bit.PUF1
#define PPGC1_PIE1 _ppgc1.bit.PIE1
#define PPGC1_PE10 _ppgc1.bit.PE10
#define PPGC1_PEN1 _ppgc1.bit.PEN1
#define PPGC1_MD _ppgc1.bitc.MD
__IO_EXTERN __io PPGOESTR _ppgoe;  
#define PPGOE _ppgoe.byte
#define PPGOE_PCM0 _ppgoe.bit.PCM0
#define PPGOE_PCM1 _ppgoe.bit.PCM1
#define PPGOE_PCM2 _ppgoe.bit.PCM2
#define PPGOE_PCS0 _ppgoe.bit.PCS0
#define PPGOE_PCS1 _ppgoe.bit.PCS1
#define PPGOE_PCS2 _ppgoe.bit.PCS2
#define PPGOE_PCM _ppgoe.bitc.PCM
#define PPGOE_PCS _ppgoe.bitc.PCS
__IO_EXTERN __io SMCS0STR _smcs0;   /* SIO channels 0,1 */
#define SMCS0 _smcs0.word
#define SMCS0_SCOE _smcs0.bit.SCOE
#define SMCS0_SOE _smcs0.bit.SOE
#define SMCS0_BDS _smcs0.bit.BDS
#define SMCS0_MODE _smcs0.bit.MODE
#define SMCS0_STRT _smcs0.bit.STRT
#define SMCS0_STOP _smcs0.bit.STOP
#define SMCS0_BUSY _smcs0.bit.BUSY
#define SMCS0_SIR _smcs0.bit.SIR
#define SMCS0_SIE _smcs0.bit.SIE
#define SMCS0_SMD0 _smcs0.bit.SMD0
#define SMCS0_SMD1 _smcs0.bit.SMD1
#define SMCS0_SMD2 _smcs0.bit.SMD2
#define SMCS0_SMD _smcs0.bitc.SMD
__IO_EXTERN __io IO_BYTE _sdr0;
#define SDR0 _sdr0   
__IO_EXTERN __io SMCS1STR _smcs1;  
#define SMCS1 _smcs1.word
#define SMCS1_SCOE _smcs1.bit.SCOE
#define SMCS1_SOE _smcs1.bit.SOE
#define SMCS1_BDS _smcs1.bit.BDS
#define SMCS1_MODE _smcs1.bit.MODE
#define SMCS1_STRT _smcs1.bit.STRT
#define SMCS1_STOP _smcs1.bit.STOP
#define SMCS1_BUSY _smcs1.bit.BUSY
#define SMCS1_SIR _smcs1.bit.SIR
#define SMCS1_SIE _smcs1.bit.SIE
#define SMCS1_SMD0 _smcs1.bit.SMD0
#define SMCS1_SMD1 _smcs1.bit.SMD1
#define SMCS1_SMD2 _smcs1.bit.SMD2
#define SMCS1_SMD _smcs1.bitc.SMD
__IO_EXTERN __io IO_BYTE _sdr1;
#define SDR1 _sdr1   
__IO_EXTERN __io SMCS2STR _smcs2;   /* SIO channel 2 */
#define SMCS2 _smcs2.word
#define SMCS2_SCOE _smcs2.bit.SCOE
#define SMCS2_SOE _smcs2.bit.SOE
#define SMCS2_BDS _smcs2.bit.BDS
#define SMCS2_MODE _smcs2.bit.MODE
#define SMCS2_STRT _smcs2.bit.STRT
#define SMCS2_STOP _smcs2.bit.STOP
#define SMCS2_BUSY _smcs2.bit.BUSY
#define SMCS2_SIR _smcs2.bit.SIR
#define SMCS2_SIE _smcs2.bit.SIE
#define SMCS2_SMD0 _smcs2.bit.SMD0
#define SMCS2_SMD1 _smcs2.bit.SMD1
#define SMCS2_SMD2 _smcs2.bit.SMD2
#define SMCS2_SMD _smcs2.bitc.SMD
__IO_EXTERN __io IO_BYTE _sdr2;
#define SDR2 _sdr2   
__IO_EXTERN __io IO_WORD _ipcp0;
#define IPCP0 _ipcp0    /* ICU OCU units */
__IO_EXTERN __io IO_WORD _ipcp1;
#define IPCP1 _ipcp1   
__IO_EXTERN __io ICS01STR _ics01;  
#define ICS01 _ics01.byte
#define ICS01_EG00 _ics01.bit.EG00
#define ICS01_EG01 _ics01.bit.EG01
#define ICS01_EG10 _ics01.bit.EG10
#define ICS01_EG11 _ics01.bit.EG11
#define ICS01_ICE0 _ics01.bit.ICE0
#define ICS01_ICE1 _ics01.bit.ICE1
#define ICS01_ICP0 _ics01.bit.ICP0
#define ICS01_ICP1 _ics01.bit.ICP1
#define ICS01_EG0 _ics01.bitc.EG0
#define ICS01_EG1 _ics01.bitc.EG1
__IO_EXTERN __io IO_WORD _tcdt;
#define TCDT _tcdt   
__IO_EXTERN __io TCCSSTR _tccs;  
#define TCCS _tccs.byte
#define TCCS_CLK0 _tccs.bit.CLK0
#define TCCS_CLK1 _tccs.bit.CLK1
#define TCCS_CLR _tccs.bit.CLR
#define TCCS_MODE _tccs.bit.MODE
#define TCCS_STOP _tccs.bit.STOP
#define TCCS_IVFE _tccs.bit.IVFE
#define TCCS_IVF _tccs.bit.IVF
#define TCCS_CLK _tccs.bitc.CLK
__IO_EXTERN __io IO_WORD _occp0;
#define OCCP0 _occp0   
__IO_EXTERN __io IO_WORD _occp1;
#define OCCP1 _occp1   
__IO_EXTERN __io IO_WORD _occp2;
#define OCCP2 _occp2   
__IO_EXTERN __io IO_WORD _occp3;
#define OCCP3 _occp3   
__IO_EXTERN __io OCS0STR _ocs0;  
#define OCS0 _ocs0.byte
#define OCS0_CST0 _ocs0.bit.CST0
#define OCS0_CST1 _ocs0.bit.CST1
#define OCS0_ICE0 _ocs0.bit.ICE0
#define OCS0_ICE1 _ocs0.bit.ICE1
#define OCS0_ICP0 _ocs0.bit.ICP0
#define OCS0_ICP1 _ocs0.bit.ICP1
__IO_EXTERN __io OCS1STR _ocs1;  
#define OCS1 _ocs1.byte
#define OCS1_OTD0 _ocs1.bit.OTD0
#define OCS1_OTD1 _ocs1.bit.OTD1
#define OCS1_OTE0 _ocs1.bit.OTE0
#define OCS1_OTE1 _ocs1.bit.OTE1
#define OCS1_CMOD _ocs1.bit.CMOD
__IO_EXTERN __io OCS2STR _ocs2;  
#define OCS2 _ocs2.byte
#define OCS2_CST0 _ocs2.bit.CST0
#define OCS2_CST1 _ocs2.bit.CST1
#define OCS2_ICE0 _ocs2.bit.ICE0
#define OCS2_ICE1 _ocs2.bit.ICE1
#define OCS2_ICP0 _ocs2.bit.ICP0
#define OCS2_ICP1 _ocs2.bit.ICP1
__IO_EXTERN __io OCS3STR _ocs3;  
#define OCS3 _ocs3.byte
#define OCS3_OTD0 _ocs3.bit.OTD0
#define OCS3_OTD1 _ocs3.bit.OTD1
#define OCS3_OTE0 _ocs3.bit.OTE0
#define OCS3_OTE1 _ocs3.bit.OTE1
#define OCS3_CMOD _ocs3.bit.CMOD
__IO_EXTERN __io IBSRSTR _ibsr;   /* Iih Quadrat C */
#define IBSR _ibsr.byte
#define IBSR_FBT _ibsr.bit.FBT
#define IBSR_GCA _ibsr.bit.GCA
#define IBSR_AAS _ibsr.bit.AAS
#define IBSR_TRX _ibsr.bit.TRX
#define IBSR_LRB _ibsr.bit.LRB
#define IBSR_AL _ibsr.bit.AL
#define IBSR_RSC _ibsr.bit.RSC
#define IBSR_BB _ibsr.bit.BB
__IO_EXTERN __io IBCRSTR _ibcr;  
#define IBCR _ibcr.byte
#define IBCR_INT _ibcr.bit.INT
#define IBCR_INTE _ibcr.bit.INTE
#define IBCR_GCAA _ibcr.bit.GCAA
#define IBCR_ACK _ibcr.bit.ACK
#define IBCR_MSS _ibcr.bit.MSS
#define IBCR_SCC _ibcr.bit.SCC
#define IBCR_BEIE _ibcr.bit.BEIE
#define IBCR_BER _ibcr.bit.BER
__IO_EXTERN __io ICCRSTR _iccr;  
#define ICCR _iccr.byte
#define ICCR_CS0 _iccr.bit.CS0
#define ICCR_CS1 _iccr.bit.CS1
#define ICCR_CS2 _iccr.bit.CS2
#define ICCR_CS3 _iccr.bit.CS3
#define ICCR_CS4 _iccr.bit.CS4
#define ICCR_EN _iccr.bit.EN
#define ICCR_CS _iccr.bitc.CS
__IO_EXTERN __io IO_BYTE _iadr;
#define IADR _iadr   
__IO_EXTERN __io IO_BYTE _idar;
#define IDAR _idar   
__IO_EXTERN __io ROMMSTR _romm;   /* ROM mirror function */
#define ROMM _romm.byte
#define ROMM_MI _romm.bit.MI
__IO_EXTERN __io IO_BYTE _udcr0;
#define UDCR0 _udcr0    /* UP DOWN Counter */
__IO_EXTERN __io IO_BYTE _udcr1;
#define UDCR1 _udcr1   
__IO_EXTERN __io IO_BYTE _rcr0;
#define RCR0 _rcr0   
__IO_EXTERN __io IO_BYTE _rcr1;
#define RCR1 _rcr1   
__IO_EXTERN __io CSR0STR _csr0;  
#define CSR0 _csr0.byte
#define CSR0_UDF0 _csr0.bit.UDF0
#define CSR0_UDF1 _csr0.bit.UDF1
#define CSR0_UDFF _csr0.bit.UDFF
#define CSR0_OVFF _csr0.bit.OVFF
#define CSR0_CMPF _csr0.bit.CMPF
#define CSR0_UDIE _csr0.bit.UDIE
#define CSR0_CITE _csr0.bit.CITE
#define CSR0_CSTR _csr0.bit.CSTR
#define CSR0_UDF _csr0.bitc.UDF
__IO_EXTERN __io CCRL0STR _ccrl0;  
#define CCRL0 _ccrl0.byte
#define CCRL0_CGE0 _ccrl0.bit.CGE0
#define CCRL0_CGE1 _ccrl0.bit.CGE1
#define CCRL0_CGSC _ccrl0.bit.CGSC
#define CCRL0_UDCC _ccrl0.bit.UDCC
#define CCRL0_RLDE _ccrl0.bit.RLDE
#define CCRL0_UCRE _ccrl0.bit.UCRE
#define CCRL0_CTUT _ccrl0.bit.CTUT
#define CCRL0_CGE _ccrl0.bitc.CGE
__IO_EXTERN __io CCRH0STR _ccrh0;  
#define CCRH0 _ccrh0.byte
#define CCRH0_CES0 _ccrh0.bit.CES0
#define CCRH0_CES1 _ccrh0.bit.CES1
#define CCRH0_CMS0 _ccrh0.bit.CMS0
#define CCRH0_CMS1 _ccrh0.bit.CMS1
#define CCRH0_CLKS _ccrh0.bit.CLKS
#define CCRH0_CFIE _ccrh0.bit.CFIE
#define CCRH0_CDCF _ccrh0.bit.CDCF
#define CCRH0_M16E _ccrh0.bit.M16E
#define CCRH0_CES _ccrh0.bitc.CES
#define CCRH0_CMS _ccrh0.bitc.CMS
__IO_EXTERN __io CSR1STR _csr1;  
#define CSR1 _csr1.byte
#define CSR1_UDF0 _csr1.bit.UDF0
#define CSR1_UDF1 _csr1.bit.UDF1
#define CSR1_UDFF _csr1.bit.UDFF
#define CSR1_OVFF _csr1.bit.OVFF
#define CSR1_CMPF _csr1.bit.CMPF
#define CSR1_UDIE _csr1.bit.UDIE
#define CSR1_CITE _csr1.bit.CITE
#define CSR1_CSTR _csr1.bit.CSTR
#define CSR1_UDF _csr1.bitc.UDF
__IO_EXTERN __io CCRL1STR _ccrl1;  
#define CCRL1 _ccrl1.byte
#define CCRL1_CGE0 _ccrl1.bit.CGE0
#define CCRL1_CGE1 _ccrl1.bit.CGE1
#define CCRL1_CGSC _ccrl1.bit.CGSC
#define CCRL1_UDCC _ccrl1.bit.UDCC
#define CCRL1_RLDE _ccrl1.bit.RLDE
#define CCRL1_UCRE _ccrl1.bit.UCRE
#define CCRL1_CTUT _ccrl1.bit.CTUT
#define CCRL1_CGE _ccrl1.bitc.CGE
__IO_EXTERN __io CCRH1STR _ccrh1;  
#define CCRH1 _ccrh1.byte
#define CCRH1_CES0 _ccrh1.bit.CES0
#define CCRH1_CES1 _ccrh1.bit.CES1
#define CCRH1_CMS0 _ccrh1.bit.CMS0
#define CCRH1_CMS1 _ccrh1.bit.CMS1
#define CCRH1_CLKS _ccrh1.bit.CLKS
#define CCRH1_CFIE _ccrh1.bit.CFIE
#define CCRH1_CDCF _ccrh1.bit.CDCF
#define CCRH1_CES _ccrh1.bitc.CES
#define CCRH1_CMS _ccrh1.bitc.CMS
__IO_EXTERN __io CSCR0STR _cscr0;   /* Chip Selects */
#define CSCR0 _cscr0.byte
#define CSCR0_CSA0 _cscr0.bit.CSA0
#define CSCR0_CSA1 _cscr0.bit.CSA1
#define CSCR0_OPEL _cscr0.bit.OPEL
#define CSCR0_ACTL _cscr0.bit.ACTL
#define CSCR0_CSA _cscr0.bitc.CSA
__IO_EXTERN __io CSCR1STR _cscr1;  
#define CSCR1 _cscr1.byte
#define CSCR1_CSA0 _cscr1.bit.CSA0
#define CSCR1_CSA1 _cscr1.bit.CSA1
#define CSCR1_OPEL _cscr1.bit.OPEL
#define CSCR1_ACTL _cscr1.bit.ACTL
#define CSCR1_CSA _cscr1.bitc.CSA
__IO_EXTERN __io CSCR2STR _cscr2;  
#define CSCR2 _cscr2.byte
#define CSCR2_CSA0 _cscr2.bit.CSA0
#define CSCR2_CSA1 _cscr2.bit.CSA1
#define CSCR2_OPEL _cscr2.bit.OPEL
#define CSCR2_ACTL _cscr2.bit.ACTL
#define CSCR2_CSA _cscr2.bitc.CSA
__IO_EXTERN __io CSCR3STR _cscr3;  
#define CSCR3 _cscr3.byte
#define CSCR3_CSA0 _cscr3.bit.CSA0
#define CSCR3_CSA1 _cscr3.bit.CSA1
#define CSCR3_OPEL _cscr3.bit.OPEL
#define CSCR3_ACTL _cscr3.bit.ACTL
#define CSCR3_CSA _cscr3.bitc.CSA
__IO_EXTERN __io CSCR4STR _cscr4;  
#define CSCR4 _cscr4.byte
#define CSCR4_CSA0 _cscr4.bit.CSA0
#define CSCR4_CSA1 _cscr4.bit.CSA1
#define CSCR4_OPEL _cscr4.bit.OPEL
#define CSCR4_ACTL _cscr4.bit.ACTL
#define CSCR4_CSA _cscr4.bitc.CSA
__IO_EXTERN __io CSCR5STR _cscr5;  
#define CSCR5 _cscr5.byte
#define CSCR5_CSA0 _cscr5.bit.CSA0
#define CSCR5_CSA1 _cscr5.bit.CSA1
#define CSCR5_OPEL _cscr5.bit.OPEL
#define CSCR5_ACTL _cscr5.bit.ACTL
#define CSCR5_CSA _cscr5.bitc.CSA
__IO_EXTERN __io CSCR6STR _cscr6;  
#define CSCR6 _cscr6.byte
#define CSCR6_CSA0 _cscr6.bit.CSA0
#define CSCR6_CSA1 _cscr6.bit.CSA1
#define CSCR6_OPEL _cscr6.bit.OPEL
#define CSCR6_ACTL _cscr6.bit.ACTL
#define CSCR6_CSA _cscr6.bitc.CSA
__IO_EXTERN __io CSCR7STR _cscr7;  
#define CSCR7 _cscr7.byte
#define CSCR7_CSA0 _cscr7.bit.CSA0
#define CSCR7_CSA1 _cscr7.bit.CSA1
#define CSCR7_OPEL _cscr7.bit.OPEL
#define CSCR7_ACTL _cscr7.bit.ACTL
#define CSCR7_CSA _cscr7.bitc.CSA
__IO_EXTERN __io RDR0STR _rdr0;   /* Input Resistance Register */
#define RDR0 _rdr0.byte
#define RDR0_RD00 _rdr0.bit.RD00
#define RDR0_RD01 _rdr0.bit.RD01
#define RDR0_RD02 _rdr0.bit.RD02
#define RDR0_RD03 _rdr0.bit.RD03
#define RDR0_RD04 _rdr0.bit.RD04
#define RDR0_RD05 _rdr0.bit.RD05
#define RDR0_RD06 _rdr0.bit.RD06
#define RDR0_RD07 _rdr0.bit.RD07
__IO_EXTERN __io RDR1STR _rdr1;  
#define RDR1 _rdr1.byte
#define RDR1_RD10 _rdr1.bit.RD10
#define RDR1_RD11 _rdr1.bit.RD11
#define RDR1_RD12 _rdr1.bit.RD12
#define RDR1_RD13 _rdr1.bit.RD13
#define RDR1_RD14 _rdr1.bit.RD14
#define RDR1_RD15 _rdr1.bit.RD15
#define RDR1_RD16 _rdr1.bit.RD16
#define RDR1_RD17 _rdr1.bit.RD17
__IO_EXTERN __io RDR6STR _rdr6;  
#define RDR6 _rdr6.byte
#define RDR6_RD60 _rdr6.bit.RD60
#define RDR6_RD61 _rdr6.bit.RD61
#define RDR6_RD62 _rdr6.bit.RD62
#define RDR6_RD63 _rdr6.bit.RD63
#define RDR6_RD64 _rdr6.bit.RD64
#define RDR6_RD65 _rdr6.bit.RD65
#define RDR6_RD66 _rdr6.bit.RD66
#define RDR6_RD67 _rdr6.bit.RD67
__IO_EXTERN __io DIRRSTR _dirr;   /* Delayed Interrupt */
#define DIRR _dirr.byte
#define DIRR_R0 _dirr.bit.R0
__IO_EXTERN __io LPMCRSTR _lpmcr;   /* Low Power Control Registers */
#define LPMCR _lpmcr.byte
#define LPMCR_SSR _lpmcr.bit.SSR
#define LPMCR_CG0 _lpmcr.bit.CG0
#define LPMCR_CG1 _lpmcr.bit.CG1
#define LPMCR_TMD _lpmcr.bit.TMD
#define LPMCR_RST _lpmcr.bit.RST
#define LPMCR_SPL _lpmcr.bit.SPL
#define LPMCR_SLP _lpmcr.bit.SLP
#define LPMCR_STP _lpmcr.bit.STP
#define LPMCR_CG _lpmcr.bitc.CG
__IO_EXTERN __io CKSCRSTR _ckscr;  
#define CKSCR _ckscr.byte
#define CKSCR_CS0 _ckscr.bit.CS0
#define CKSCR_CS1 _ckscr.bit.CS1
#define CKSCR_MCS _ckscr.bit.MCS
#define CKSCR_SCS _ckscr.bit.SCS
#define CKSCR_WS0 _ckscr.bit.WS0
#define CKSCR_WS1 _ckscr.bit.WS1
#define CKSCR_MCM _ckscr.bit.MCM
#define CKSCR_SCM _ckscr.bit.SCM
#define CKSCR_CS _ckscr.bitc.CS
#define CKSCR_WS _ckscr.bitc.WS
__IO_EXTERN __io ARSRSTR _arsr;   /* External Bus I/F */
#define ARSR _arsr.byte
#define ARSR_LMR0 _arsr.bit.LMR0
#define ARSR_LMR1 _arsr.bit.LMR1
#define ARSR_HMR0 _arsr.bit.HMR0
#define ARSR_HMR1 _arsr.bit.HMR1
#define ARSR_IOR0 _arsr.bit.IOR0
#define ARSR_IOR1 _arsr.bit.IOR1
#define ARSR_LMR _arsr.bitc.LMR
#define ARSR_HMR _arsr.bitc.HMR
#define ARSR_IOR _arsr.bitc.IOR
__IO_EXTERN __io HACRSTR _hacr;  
#define HACR _hacr.byte
#define HACR_E16 _hacr.bit.E16
#define HACR_E17 _hacr.bit.E17
#define HACR_E18 _hacr.bit.E18
#define HACR_E19 _hacr.bit.E19
#define HACR_E20 _hacr.bit.E20
#define HACR_E21 _hacr.bit.E21
#define HACR_E22 _hacr.bit.E22
#define HACR_E23 _hacr.bit.E23
__IO_EXTERN __io ECSRSTR _ecsr;  
#define ECSR _ecsr.byte
#define ECSR_LMBS _ecsr.bit.LMBS
#define ECSR_WRE _ecsr.bit.WRE
#define ECSR_HMBS _ecsr.bit.HMBS
#define ECSR_IOBS _ecsr.bit.IOBS
#define ECSR_HDE _ecsr.bit.HDE
#define ECSR_RYE _ecsr.bit.RYE
#define ECSR_CKE _ecsr.bit.CKE
__IO_EXTERN __io WDTCSTR _wdtc;   /* Watch Dog */
#define WDTC _wdtc.byte
#define WDTC_WT0 _wdtc.bit.WT0
#define WDTC_WT1 _wdtc.bit.WT1
#define WDTC_WTE _wdtc.bit.WTE
#define WDTC_SRST _wdtc.bit.SRST
#define WDTC_ERST _wdtc.bit.ERST
#define WDTC_WRST _wdtc.bit.WRST
#define WDTC_STBR _wdtc.bit.STBR
#define WDTC_PONR _wdtc.bit.PONR
#define WDTC_WT _wdtc.bitc.WT
__IO_EXTERN __io TBTCSTR _tbtc;   /* Time Base Timer */
#define TBTC _tbtc.byte
#define TBTC_TBC0 _tbtc.bit.TBC0
#define TBTC_TBC1 _tbtc.bit.TBC1
#define TBTC_TBR _tbtc.bit.TBR
#define TBTC_TBOF _tbtc.bit.TBOF
#define TBTC_TBIE _tbtc.bit.TBIE
#define TBTC_TBC _tbtc.bitc.TBC
__IO_EXTERN __io WTCSTR _wtc;   /* Watch Timer */
#define WTC _wtc.byte
#define WTC_WTC0 _wtc.bit.WTC0
#define WTC_WTC1 _wtc.bit.WTC1
#define WTC_WTC2 _wtc.bit.WTC2
#define WTC_WTR _wtc.bit.WTR
#define WTC_WTOF _wtc.bit.WTOF
#define WTC_WTIE _wtc.bit.WTIE
#define WTC_SCE _wtc.bit.SCE
#define WTC_WDCS _wtc.bit.WDCS
__IO_EXTERN __io FMCSSTR _fmcs;   /* Flash Control Register */
#define FMCS _fmcs.byte
#define FMCS_LPM0 _fmcs.bit.LPM0
#define FMCS_LPM1 _fmcs.bit.LPM1
#define FMCS_RDY _fmcs.bit.RDY
#define FMCS_WE _fmcs.bit.WE
#define FMCS_RDYINT _fmcs.bit.RDYINT
#define FMCS_INTE _fmcs.bit.INTE
/*******************************************************************
 *
 *    DESCRIPTION:  Interrupt Control Register Declaration
 *
 *    AUTHOR:       Fujitsu Mikroelektronik GmbH
 *
 *    HISTORY:    
 * Version 1.0      26.01.99: 
 *      - original version
 * Version 1.2      11.02.99
 *      - "extern" changed to pre-defined macro of IO-Wizard 
 *        (__IO_EXTERN), requires IO-Wizard 1.7 or later
 *
 * Version 1.3      17.07.2002  HW  Bitdefinitions as const, no RMV allowed
 *
 *******************************************************************/

#ifndef __ICR_H
#define __ICR_H

typedef union{  
    unsigned char    byte;
    struct{
      const unsigned char IL0      :1;
      const unsigned char IL1      :1;
      const unsigned char IL2      :1;
      const unsigned char ISE      :1;
      const unsigned char ICS0     :1;
      const unsigned char ICS1     :1;
      const unsigned char ICS2     :1;
      const unsigned char ICS3     :1;
    }bit;
    struct{
      const unsigned char    :4;
      const unsigned char S0 :1;
      const unsigned char S1 :1;
    }bitrd;
    struct{
      const unsigned char IL       :3;
      const unsigned char :1;
      const unsigned char ICS      :4;
    }bitc;
    struct{
      const unsigned char    :4;
      const unsigned char S  :2;
    }bitcrd;
 }ICRSTR;

__IO_EXTERN __io ICRSTR _icr[16];

#define ICR(i)        _icr[i].byte
#define ICR_IL0(i)    _icr[i].bit.IL0
#define ICR_IL1(i)    _icr[i].bit.IL1
#define ICR_IL2(i)    _icr[i].bit.IL2
#define ICR_ISE(i)    _icr[i].bit.ISE
#define ICR_ICS0(i)   _icr[i].bit.ICS0
#define ICR_ICS1(i)   _icr[i].bit.ICS1
#define ICR_ICS2(i)   _icr[i].bit.ICS2
#define ICR_ICS3(i)   _icr[i].bit.ICS3
#define ICR_IL(i)     _icr[i].bitc.IL
#define ICR_ICS(i)    _icr[i].bitc.ICS
#define ICR_S0(i)     _icr[i].bitrd.S0
#define ICR_S1(i)     _icr[i].bitrd.S1
#define ICR_S(i)      _icr[i].bitcrd.S

#define ICR00       _icr[0].byte
#define ICR00_IL0   _icr[0].bit.IL0
#define ICR00_IL1   _icr[0].bit.IL1
#define ICR00_IL2   _icr[0].bit.IL2
#define ICR00_ISE   _icr[0].bit.ISE
#define ICR00_ICS0  _icr[0].bit.ICS0
#define ICR00_ICS1  _icr[0].bit.ICS1
#define ICR00_ICS2  _icr[0].bit.ICS2
#define ICR00_ICS3  _icr[0].bit.ICS3
#define ICR00_IL    _icr[0].bitc.IL
#define ICR00_ICS   _icr[0].bitc.ICS
#define ICR00_S0    _icr[0].bitrd.S0
#define ICR00_S1    _icr[0].bitrd.S1
#define ICR00_S     _icr[0].bitcrd.S

#define ICR01       _icr[1].byte
#define ICR01_IL0   _icr[1].bit.IL0
#define ICR01_IL1   _icr[1].bit.IL1
#define ICR01_IL2   _icr[1].bit.IL2
#define ICR01_ISE   _icr[1].bit.ISE
#define ICR01_ICS0  _icr[1].bit.ICS0
#define ICR01_ICS1  _icr[1].bit.ICS1
#define ICR01_ICS2  _icr[1].bit.ICS2
#define ICR01_ICS3  _icr[1].bit.ICS3
#define ICR01_IL    _icr[1].bitc.IL
#define ICR01_ICS   _icr[1].bitc.ICS
#define ICR01_S0    _icr[1].bitrd.S0
#define ICR01_S1    _icr[1].bitrd.S1
#define ICR01_S     _icr[1].bitcrd.S

#define ICR02       _icr[2].byte
#define ICR02_IL0   _icr[2].bit.IL0
#define ICR02_IL1   _ic