dataflash.h

实现ucos任务调度时保存LCD上的显示信息

/*
********************************************************************************
*				 		C8051F340 DataFlash modular
*
*		        	  Ambition Comm Tech Ltd.Cop
*						   Jason.D.Proakis
*
* File Name		   : DataFlash.h
* File Description : header file of DataFlash modular AT45DB161D.
*			  	     Page size is 512 bytes.
* Create Date	   : 04-11-2008
* Version	       : V1.00
* Modified History :
*					None
*
* All rights reserved.
*
* NOTE: This process is for device which page size is 512 bytes.
********************************************************************************
*/

#ifndef _DATAFLASH_H
#define _DATAFLASH_H

/* define communication port between AT45DB161 and MCU	*/
#include <C8051F340.h>
sbit AT45_SI	= 	P2^4;
sbit AT45_SCK	= 	P2^5;
sbit AT45_CS	=	P2^6;
sbit AT45_SO	= 	P2^7;

/*
**********************************************************************************************
*								OPERATE CODE DEFINITION
**********************************************************************************************
*/

/* Read Command */
#define OP_CODE_RD_MAIN_PAGE				0xD2	/* main memory page read 				*/
#define OP_CODE_RD_ARRAY					0x0B	/* continuous array read 				*/
#define OP_CODE_RD_BUF1						0xD4	/* buffer read 							*/
#define OP_CODE_RD_BUF2						0xD6	/* buffer read 							*/

/* Program and Erase Command */
#define OP_CODE_WR_BUF1						0x84	/* buffer write 						*/
#define OP_CODE_WR_BUF2						0x87	/* buffer write 						*/
#define OP_CODE_WR_BUF1_MAIN_ERASE			0x83	/* buffer to main memory page 			*/
#define OP_CODE_WR_BUF2_MAIN_ERASE			0x86	/*        program with built-in erase 	*/
#define OP_CODE_WR_BUF1_MAIN_NO_ERASE		0x88	/* buffer to main memory page pro- 		*/
#define OP_CODE_WR_BUF2_MAIN_NO_ERASE		0x89	/*        gram without built-in erase 	*/
#define OP_CODE_ERASE_PAGE					0x81	/* page erase 							*/
#define OP_CODE_ERASE_BLOCK					0x50	/* block ease 							*/
#define OP_CODE_ERASE_SECTOR				0x7C	/* sector ease 							*/
#define OP_CODE_ERASE_CHIP_CMD1				0xC7	/* chip erase 							*/
#define OP_CODE_ERASE_CHIP_CMD2				0x94
#define OP_CODE_ERASE_CHIP_CMD3				0x80
#define OP_CODE_ERASE_CHIP_CMD4				0x9A
#define OP_CODE_PROG_MAIN_BUF1				0x82	/* main memory page program 			*/
#define OP_CODE_PROG_MAIN_BUF2				0x85	/* 		through buffer 					*/

/* Protection and Security Command */
#define OP_CODE_EN_SECT_PROT_CMD1			0x3D	/* enable sector protection				*/
#define OP_CODE_EN_SECT_PROT_CMD2			0x2A
#define OP_CODE_EN_SECT_PROT_CMD3			0x7F
#define OP_CODE_EN_SECT_PROT_CMD4			0xA9
#define OP_CODE_DIS_SECT_PROT_CMD1			0x3D	/* disable sector protection			*/
#define OP_CODE_DIS_SECT_PROT_CMD2			0x2A
#define OP_CODE_DIS_SECT_PROT_CMD3			0x7F
#define OP_CODE_DIS_SECT_PROT_CMD4			0x9A
#define OP_CODE_ERASE_SECT_PROT_REG_CMD1	0x3D	/* erase sector protection register 	*/
#define OP_CODE_ERASE_SECT_PROT_REG_CMD2	0x2A
#define OP_CODE_ERASE_SECT_PROT_REG_CMD3	0x7F
#define OP_CODE_ERASE_SECT_PROT_REG_CMD4	0xCF
#define OP_CODE_PROG_SECT_PROT_REG_CMD1		0x3D	/* program sector protection register 	*/
#define OP_CODE_PROG_SECT_PROT_REG_CMD2		0x2A
#define OP_CODE_PROG_SECT_PROT_REG_CMD3		0x7F
#define OP_CODE_PROG_SECT_PROT_REG_CMD4		0xFC
#define OP_CODE_RD_SECT_PROT_REG			0x32	/* read sector protection register 		*/
#define OP_CODE_LOCK_SECT_CMD1				0x3D	/* sector lockdown						*/
#define OP_CODE_LOCK_SECT_CMD2				0x2A
#define OP_CODE_LOCK_SECT_CMD3				0x7F
#define OP_CODE_LOCK_SECT_CMD4				0x30
#define OP_CODE_RD_SECT_LOCK_REG			0x35	/* read sector lockdown register		*/
#define OP_CODE_PROG_SECU_REG_CMD1			0x9B	/* program security register			*/
#define OP_CODE_PROG_SECU_REG_CMD2			0x00
#define OP_CODE_PROG_SECU_REG_CMD3			0x00
#define OP_CODE_PROG_SECU_REG_CMD4			0x00
#define OP_CODE_RD_SECU_REG					0x77	/* read security register				*/

/* Additional Command */
#define OP_CODE_RD_MAIN_BUF1				0x53	/* main memory page to  				*/
#define OP_CODE_RD_MAIN_BUF2				0x55	/* 		buffer transfer					*/
#define OP_CODE_COMP_BUF1					0x60	/* main memory page to 					*/
#define OP_CODE_COMP_BUF2					0x61	/* 		buffer compare 					*/
#define OP_CODE_REWR_PAGE_BUF1				0x58	/* auto page rewrite through buffer1	*/
#define OP_CODE_REWR_PAGE_BUF2				0x59	/* auto page rewrite through buffer2	*/
#define OP_CODE_ENTER_DEEP_PD				0xB9	/* enter deep power down				*/
#define OP_CODE_EXIT_DEEP_PD				0xAB	/* resume from deep power down			*/
#define OP_CODE_RD_STAT_REG					0xD7	/* status register read 				*/
#define OP_CODE_RD_MANU_DEV_ID				0x9F	/* manufacturer and device ID read		*/
#define OP_CODE_PROG_CFG_REG_CMD1			0x3D	/* program the configuration register	*/
#define OP_CODE_PROG_CFG_REG_CMD2			0x2A
#define OP_CODE_PROG_CFG_REG_CMD3			0x80
#define OP_CODE_PROG_CFG_REG_CMD4			0xA6

/* Legacy Command */
#define OP_CODE_RD_BUF1_LGCY				0x54	/* read buffer1							*/
#define OP_CODE_RD_BUF2_LGCY				0x56	/* read buffer2							*/	
#define OP_CODE_RD_MAIN_PAGE_LGCY			0x52	/* main memory page read				*/
#define OP_CODE_RD_ARRAY_LGCY				0x68	/* continuous array read				*/
#define OP_CODE_RD_STAT_REG_LGCY			0x57	/* status register read					*/

/*
**********************************************************************************************
*								FUNCTION PROTOTYPE DECLARATION
**********************************************************************************************
*/
/* */
void DF_init(void);
void DF_rd(unsigned long addr,unsigned char * buf,unsigned int len);
void DF_wr(unsigned long addr,unsigned char * buf,unsigned int len);
unsigned char DF_get_stat(void);
unsigned long DF_get_id(void);

#endif