codec_init.s54

c5x中关于codec的实验

;******************************************************************************
;               		SJTU DSP Tech. Center
;        Copyright (c) 2002 SJTU DSP Tech. Center. All Rights Reserved.
;  History:
;		Date		Authors			Changes
;		2003/08/30	Fu Xuan			Created.
;		2007/09/23	Chen Yu			Changed.
;******************************************************************************
	.mmregs

	.def		codec_init
	
	.include 	"codec_cnst.h54"
	.include 	"dsp_cnst.h54"
	.include 	"macro.h54"

	.text

;******************************************************************************
;** Function:	codec_init
;** Description:	Initialization for TLC320AD50C
;******************************************************************************
codec_init:
	pshm	ST0
	pshm	ST1

	ssbx	INTM					;disable all interrupts
		
	;select codec as McBSP2 signal resource
	stm		#0x0, AR2				                       
	portw	*(AR2), MISC			;MISC=0x0000
	portw	*(AR2), CODEC_CLK		;CODEC_CLK=0x0000
		
	;set CODEC control register 0
	stm		#0x80,	AR2				
	portw	*(AR2),	CODEC_L
	stm		#0x01,	AR2				;Left Channel DAC attenuation = 
	portw	*(AR2),	CODEC_H
	call	wait_codec_cmd_ready

	;set CODEC control register 1
	stm		#0x80,	AR2
	portw	*(AR2),	CODEC_L
	stm		#0x01,	AR2
	portw	*(AR2),	CODEC_H
	call	wait_codec_cmd_ready

	;set CODEC control register 2
	;CODEC_CTL2
	;PDAD=0, disable ADC power down
	;BYPS=0, enable high pass filter
	;PDDA=0, disable DAC power down
	;ATC=0,	attenuation of the two channels set indepandently
	;IZD=0, disable infinitely zero detection
	;OUT=1, enable DAC output
	;DEM[1,0]=01, disable de-emphasis
	;MUT=0, disable soft mute
	stm		#0x00,	AR2
	portw	*(AR2),	CODEC_L			
	stm		#0x00,	AR2
	portw	*(AR2),	CODEC_H
	call	wait_codec_cmd_ready

	;set CODEC control register 3
	;LOP=0, disable ADC to DAC loop-back
	;FMT[1,0]=00, Format 0
	;LRP=0, left channel is 'H', right channel is 'L'
	stm		#0x00,	AR2
	portw	*(AR2), CODEC_L
	stm		#0x00,	AR2
	portw	*(AR2),	CODEC_H
	call	wait_codec_cmd_ready

	McBSP2_DISABLE	AR4				;disable McBSP2

	popm	ST1
	popm	ST0

	ret

wait_codec_cmd_ready:
	portr	MISC, *(AL)				;AL<-MISC
	bitf	*(AL), #0x0080			;test CODEC_RDY bit in MISC
	bc		wait_codec_cmd_ready, TC			

	ret

;end of codec_init.s54