📄 boot.s
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# address after the compiler's global data. This memory may be used
# by the application, for memory pool allocations, partitions, etc. */
#
addi r1,r1,4 # move to next available space
mr r3,r1
mr r1,r14 # reset system stack to start
b main_proc
# b INC_Initialize
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Vectors_Loaded */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function returns the flag that indicates whether or not */
#/* all the default vectors have been loaded. If it is false, */
#/* each LISR register also loads the ISR shell into the actual */
#/* vector table. */
#/* */
#/* */
#/*************************************************************************/
#INT INT_Vectors_Loaded(VOID)
#{
.text
.align 2
.globl INT_Vectors_Loaded
INT_Vectors_Loaded:
#
# /* return the value in the INT_Loaded_Flag variable */
#
addis r3,r0,INT_Loaded_Flag@ha # get upper 16 bits < 16 bits
lwz r3,INT_Loaded_Flag@l(r3) # store value to r3 for return
#
# /* Return to caller */
#
blr
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Setup_Vector */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function sets up the specified vector with the new vector */
#/* value. The previous vector value is returned to the caller. */
#/* */
#/* */
#/*************************************************************************/
#VOID *INT_Setup_Vector(INT vector, VOID *new)
#{
#VOID *old_vector; /* Old interrupt vector */
#
.text
.align 2
.globl INT_Setup_Vector
INT_Setup_Vector:
#
# /* Since the complete vector table is copied to DRAM during
# initialization, this function serves no useful purpose. Simply
# return NULL. */
#
li r3,0
blr
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Retrieve_Shell */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function retrieves the pointer to the shell interrupt */
#/* service routine. The shell interrupt service routine calls */
#/* the LISR dispatch routine. */
#/* */
#/*************************************************************************/
#VOID *INT_Retrieve_Shell(INT vector)
#{
.text
.align 2
.globl INT_Retrieve_Shell
INT_Retrieve_Shell:
li r3,0 # just return NULL
blr
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Timer_Interrupt */
#/* */
#/* DESCRIPTION */
#/* */
#/* This shell will handle the interrupt processing for the */
#/* decrementer interrupt. This is what will be used for the */
#/* periodic timer interrupt. */
#/* */
#/* */
#/*************************************************************************/
.text
.align 2
.globl INT_Timer_Interrupt
INT_Timer_Interrupt:
#
# /* Restore CTR */
#
mtspr CTR,r10
#
# /* Reenable the MMU */
#
mfmsr r9
ori r9,r9,0x0030
mtmsr r9
isync
#
# /* Reload the DEC register */
#
li r12,DEC_LOAD # load new value into r12
mtspr DEC,r12 # write out to the DEC register
#
# /* Save the old PC and MSR. */
#
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
mfspr r12,SRR1 # read the MSR value/SRR1
stwu r12,-4(r1) # save on the stack
#
# /* Set the MSR[RI] bit to indicate that system reset and machine check
# exceptions are now recoverable.
#
mtspr EID,0
#
# /* Save LR, CR, XER, and CTR on stack. */
#
mfspr r12,LR # read the old LR
stwu r12,-4(r1) # save on the stack
mfcr r12 # read current Condition Register
stwu r12,-4(r1) # save on the stack
mfspr r12,XER # read the XER value
stwu r12,-4(r1) # save on the stack
mfspr r12,CTR # read the CTR value
stwu r12,-4(r1) # save on the stack
#
# /* call the timer interrupt code */
#
b TMT_Timer_Interrupt
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Shell */
#/* */
#/* DESCRIPTION */
#/* */
#/* This shell handles saving all the registers and passing the */
#/* current vector for the interrupt to the TCC_Dispatch_LISR */
#/* routine. */
#/* */
#/* */
#/*************************************************************************/
.text
.align 2
.globl INT_Shell
INT_Shell:
#
# /* Restore CTR */
#
mtspr CTR,r10
#
# /* Reenable the MMU */
#
mfmsr r9
ori r9,r9,0x0030
mtmsr r9
isync
#
# /* Save the original MSR. */
#
mfspr r12,SRR1 # read the MSR value/SRR1
stwu r12,-4(r1) # save on the stack
#
# /* Set the MSR[RI] bit to indicate that system reset and machine check
# exceptions are now recoverable.
#
mtspr EID,0
#
# /* Save the LR, CR, XER, and CTR registers */
#
mfspr r12,LR # read the old LR
stwu r12,-4(r1) # save on the stack
mfcr r12 # read current Condition Register
stwu r12,-4(r1) # save on the stack
mfspr r12,XER # read the XER value
stwu r12,-4(r1) # save on the stack
mfspr r12,CTR # read the CTR value
stwu r12,-4(r1) # save on the stack
#
# /* call the interrupt context save routine */
#
bl TCT_Interrupt_Context_Save
#
# /* calculate the vector number and put into r3 for TCT_Dispatch_LISR call */
#
cmpi 0,r11,5 # compare to external vector #
bne INT_Finish_Vect_Calc # if not external, skip
mfspr r4,IMMR # get base addr of internal regs
rlwinm r4,r4,0,0,15 # mask lower 16 bits
lbz r11,SIVEC(r4) # get SIU interrupt vector
lwz r5,CICR(r4) # get CPM interrupt config
rlwinm r5,r5,0,16,18 # isolate int level field
li r9,10 # load # of shift bits
srw r5,r5,r9 # shift int level bits over
xor r5,r5,r11 # compare CPM level with SIU
cmpi 0,r5,4 # vector number
beq INT_CPM_Vector # if CPM, go to CPM vect calc
li r9,0 # store 0 on stack to show no
stwu r9,-4(r1) # CPM interrupt occured
li r9,2 # load # of shift bits
srw r11,r11,r9 # shift SIU vector over
addi r11,r11,32 # generate Nucleus vector #
b INT_Finish_Vect_Calc
INT_CPM_Vector:
li r11,1 # load acknowledge bit
sth r11,CIVR(r4) # send IACK to CPM
eieio # force in-order I/O execution
lbz r11,CIVR(r4) # get the vector number
stwu r11,-4(r1) # save on the stack
li r9,3 # load # of shift bits
srw r11,r11,r9 # shift CPM vector over
addi r11,r11,64 # generate Nucleus vector #
INT_Finish_Vect_Calc:
ori r3,r11,0
#
# /* call the vector dispatch code. Note that the vector number has been
# * loaded into r3 for the subroutine call. */
#
bl TCC_Dispatch_LISR
#
# /* if a CPM interrupt occured, clear its in-service bit in the CISR */
#
mfspr r4,IMMR # get base addr of internal reg's
rlwinm r4,r4,0,0,15 # mask lower 16 bits
lwz r6,0(r1) # get saved vector number
addi r1,r1,4 # adjust stack pointer
cmpi 0,r6,0 # check for CPM interrupt
beq INT_Finish_Shell # if no CPM interrupt, skip
li r5,3 # load # of bits to shift
srw r6,r6,r5 # shift to remove trailing zeros
li r5,1 # load a clearing bit
slw r5,r5,r6 # shift bit to interrupt's position in CISR
stw r5,CISR(r4) # clear interrupt's in-service bit
#
# /* call the context restore code, note will not return to this
# * location. */
#
INT_Finish_Shell:
b TCT_Interrupt_Context_Restore
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