📄 boot.s
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.file "boot.s"
##define NU_SOURCE_FILE
#
##include "nucleus.h" /* System constants */
#
#
#/* Define constants used in low-level initialization. */
#
#
# ***** BEGIN board specific code for the FADS board *****
DEC_LOAD .equ 0x30d4 # DEC load value (10ms at 5 MHz)
# ***** END board specific code for the FADS board *****
SYSTEM_SIZE .equ 4096 # Define the system stack size
TIMER_SIZE .equ 4096 # Define timer HISR stack size
# plus 8 extra bytes for the
# EABI stack frame.
TIMER_PRIORITY .equ 2 # Timer HISR priority (values from
# 0 to 2, where 0 is highest)
CACHE_DISABLE .equ 0x0400 # Command to disable cache
CACHE_ENABLE .equ 0x0200 # Command to enable cache
CACHE_UNLK_ALL .equ 0x0a00 # Command to unlock all cache entries
CACHE_INV_ALL .equ 0x0c00 # Command to invalidate all entries
#
#/* Define offsets of memory-mapped registers. All of these are offset
# from the base address contained in the IMMR register */
#
SIUMCR .equ 0x000 # SIU Module Control Register
SYPCR .equ 0x004 # SIU System Protection Control
SIVEC .equ 0x01c # SIU Interrupt Vector
BR0 .equ 0x100 # Base Register 0
OR0 .equ 0x104 # Option Register 0
BR1 .equ 0x108 # Base Register 1
OR1 .equ 0x10C # Option Register 1
BR2 .equ 0x110 # Base Register 2
OR2 .equ 0x114 # Option Register 2
BR3 .equ 0x118 # Base Register 3
OR3 .equ 0x11C # Option Register 3
BR4 .equ 0x120 # Base Register 4
OR4 .equ 0x124 # Option Register 4
BR5 .equ 0x128 # Base Register 5
OR5 .equ 0x12C # Option Register 5
BR6 .equ 0x130 # Base Register 6
OR6 .equ 0x134 # Option Register 6
BR7 .equ 0x138 # Base Register 7
OR7 .equ 0x13C # Option Register 7
MAR .equ 0x164 # Memory Address Register
MCR .equ 0x168 # Memory Command
MAMR .equ 0x170 # Machine A Mode Register
MBMR .equ 0x174 # Machine B Mode Register
MPTPR .equ 0x17A # Memory Periodic Timer Prescaler
MDR .equ 0x17C # Memory Data
TBSCR .equ 0x200 # Time Base Status and Control Register
RTCSC .equ 0x220 # Real-time Clock Status and Control
PISCR .equ 0x240 # PIT Status and Control
SCCR .equ 0x280
PLPRCR .equ 0x284 # PLL Control Register
RTCSCK .equ 0x320 # Real-time Clock Status Control Key
SCCRK .equ 0x380 # system clock control key
PLPRCRK .equ 0x384 # PLL Control Register key
CIVR .equ 0x930 # CP Interrupt Vector Register
CICR .equ 0x940 # CP Interrupt Configuration Register
CISR .equ 0x94C # CP In-Service Register
#
#
#/* End of low-level initialization constants. */
#
#
# ***** BEGIN board specific code for the SDRAM *****
.text
INT_UPM_Table:
#/* single read (offset 0x00 in upm ram) */
.long 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00
.long 0x1ff77c47, 0xfffffc04, 0xfffffc04, 0xfffffc04
#/* burst read (offset 0x08 in upm ram) */
.long 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00
.long 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47
.long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
.long 0xfffffc04, 0x1ff77c35, 0xefeabc34, 0x1fb57c35
#/* single write (offset 0x18 in upm ram) */
.long 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47
.long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
#/* burst write (offset 0x20 in upm ram) */
.long 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00
.long 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, 0xfffffc04
.long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
.long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
#/* refresh (offset 0x30 in upm ram) */
.long 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04
.long 0xfffffc84, 0xfffffc07, 0xfffffc04, 0xfffffc04
.long 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
#/* exception (offset 0x3C in upm ram) */
.long 0x7ffffc07, 0xfffffc04, 0xfffffc04, 0xfffffc04
# ***** END board specific code for the SDRAM *****
#
#/* Begin definition of the processor system clock */
#/* This is an unsigned constant that holds the MHz of the */
#/* processor's crystal, which is used in other Nucleus */
#/* products. Therefore this value needs to be correct. */
#
.sdata2
.size INT_System_Clock,4
.align 2
.globl INT_System_Clock
#
INT_System_Clock:
.long 50000000
#
#/* End of processor system clock definition */
#
# ***** END board specific code for the FADS board *****
#
#
# Global Allocations for module this file
#
.align 2
.data
#
#/* Define the initialization flag that indicates whether or not all of the
# default vectors have been loaded during initialization. */
#
#INT INT_Loaded_Flag;
#
.comm INT_Loaded_Flag,4
#
# /* Define the global task control thread pointer */
#
# extern UNSIGNED *TCD_Current_Thread;
#
#/* Define the global system stack variable. This is setup by the
# initialization routine. */
#
#extern VOID *TCD_System_Stack;
#
#/* Define the global data structures that need to be initialized by this
# routine. These structures are used to define the system timer management
# HISR. */
#
#extern VOID *TMD_HISR_Stack_Ptr;
#extern UNSIGNED TMD_HISR_Stack_Size;
#extern INT TMD_HISR_Priority;
#
#/* Define extern function references. */
#
#VOID INC_Initialize(VOID *first_available_memory);
#VOID TCT_Interrupt_Context_Save(VOID);
#VOID TCT_Interrupt_Context_Restore(VOID);
#VOID TCC_Dispatch_LISR(INT vector_number);
#VOID TMT_Timer_Interrupt(void);
#
.globl INT_Initialize, _start, main, __init_main
.globl TCT_Interrupt_Context_Restore, TCC_Dispatch_LISR
.globl TMT_Timer_Interrupt, INT_Timer_Interrupt, TCT_Interrupt_Context_Save
.globl main_proc
XREF __RTOS_MEMORY
XREF __FLASH_BASE_ADDR
#
.section ".vectors",,x
.align 2
INT_Vectors:
.skip 0x0100-(.-INT_Vectors) # System reset
_start:
lis r3,INT_Initialize@h
ori r3,r3,INT_Initialize@l # Load start address
mtspr CTR,r3
bctr # Jump to _start
.skip 0x0200-(.-INT_Vectors) # Machine check
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,2 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x0500-(.-INT_Vectors) # External interrupt
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,5 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x0600-(.-INT_Vectors) # Alignment error
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,6 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x0700-(.-INT_Vectors) # Program error
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,7 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x0900-(.-INT_Vectors) # Decrementer interrupt
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Timer_Interrupt@h
ori r9,r9,INT_Timer_Interrupt@l # load address of timer handler
mtspr CTR,r9
bctr # jump to timer handler
.skip 0x0C00-(.-INT_Vectors) # System call
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,12 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x0D00-(.-INT_Vectors) # Trace
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,13 # load vector number
mfspr r10,CTR # save CTR temporarily
lis r9,INT_Shell@h
ori r9,r9,INT_Shell@l # load address of INT_Shell
mtspr CTR,r9
bctr # jump to INT_Shell
.skip 0x1000-(.-INT_Vectors) # Software emulation
addi r1,r1,-8 # subtract 8 bytes for EABI
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
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