d860_pub.c

基于vxworks操作系统的电话语音平台系统

#include "PUB\PUB_INCL.H"
#include "DRVS\DRV860\PUB\NETCOMM.H"       /* global defines */
#include "DRVS\DRV860\PUB\D860_PUB.H"
#include "DRVS\DRV860\PUB\mpc860.h"       /* IMMR definitions and declarations */
#include "DRVS\DRV860\PUB\masks860.h"      /* Global masks header file */
#include "DRVS\DRV860\QMC\QMC.H"



extern EPPC *quicc;
extern SCC_TABLE scc_table;


VOID scc_start(SI scc_num)
{
	struct scc_regs      *regs;

	regs = &quicc->scc_regs[scc_num];

	regs->scc_gsmr_l |= GSMR_L1_ENR;
	regs->scc_gsmr_l |= GSMR_L1_ENT;
}

VOID scc_loopback(SI scc_num)
{
	struct scc_regs      *regs;

	regs = &quicc->scc_regs[scc_num];

	regs->scc_gsmr_l |= GSMR_L1_DIAG;
}

VOID issue_cmd (UI cmd, SI scc_num)
{
	volatile UI *cr;

	cr = &quicc->cp_cr;
	switch( scc_num )
	{
		case 0:	scc_num=0x0;	break;
		case 1:	scc_num=0x4;	break;
		case 2:	scc_num=0x8;	break;
		case 3:	scc_num=0xc;	break;
	}

	*cr = ( (cmd | (scc_num<<4)) | CPCR_FLG);
	while( ((*cr)&CPCR_FLG) );
}

VOID ResetRisc( VOID )
{
	volatile UI  *cr;

	cr = &quicc->cp_cr;

	*cr = CPCR_RST|CPCR_FLG;
	while( ((*cr)&CPCR_FLG) );
}

VOID EnableMpc860Interrupt( VOID )
{
#ifdef _NUCLEUS_RTOS
   #ifndef BORLANDC
   asm(" mtspr  80, 0 "); /* Enable EE Bit in MSR */
   #endif
#endif
}

VOID EnableMpc860IRQInterrupt( UI irq_num )
{
	switch( irq_num )
	{
		case MPC860_IRQ1:
			quicc->siu_simask |= SIMASK_IRM1;
			break;
		case MPC860_IRQ2:
			quicc->siu_simask |= SIMASK_IRM2;
			break;
		case MPC860_IRQ3:
			quicc->siu_simask |= SIMASK_IRM3;
			break;
		case MPC860_IRQ4:
			quicc->siu_simask |= SIMASK_IRM4;
			break;
		case MPC860_IRQ5:
			quicc->siu_simask |= SIMASK_IRM5;
			break;
		case MPC860_IRQ6:
			quicc->siu_simask |= SIMASK_IRM6;
			break;
		case MPC860_IRQ7:
			quicc->siu_simask |= SIMASK_IRM7;
			break;
	}
}

UI GetMpc860IRQVector( UI irq_num )
{
	return(irq_num*2);
}

/* 860 control signals sent to wide bus */
VOID CpuEnableWBus( VOID )
{
	/* PB30(Data),PB31(CLK) control 90840 */
	quicc->pip_pbodr &=  0xFFFC ;
	quicc->pip_pbdir |=  0x0003 ;
	quicc->pip_pbpar &=  0xFFFC ;

	quicc->pip_pbdat &=  0xFFFD ; /* Set PB30 low */
	quicc->pip_pbdat &=  0xFFFE ; /* Set PB31 Low */
	quicc->pip_pbdat |=  0x0001 ; /* Set PB31 High */
}

/* 860 control signals sent to narrow bus */
VOID CpuEnableNBus( VOID )
{
	/* PB28(Data),PB29(CLK) control */
	quicc->pip_pbodr &=  0xFFF3;
	quicc->pip_pbdir |=  0x000C;
	quicc->pip_pbpar &=  0xFFF3;

	quicc->pip_pbdat &=  0xFFF7 ; /* Set PB28 low */
	quicc->pip_pbdat &=  0xFFFB ; /* Set PB29 Low */
	quicc->pip_pbdat |=  0x0004 ; /* Set PB29 High */
}


VOID ClearWatchDog( VOID )
{
	quicc->siu_swsr = 0x556C;
	quicc->siu_swsr = 0xAA39;
}