tmp

LINUX NANDFLASH读写函数.实现UBOOTNANDFLSH 启动.并且可以烧写内河.文件系统

+ok_nand_read:
+	@ verify
+	mov	r0, #0
+	ldr	r1, _TEXT_BASE
+	mov	r2, #0x400	@ 4 bytes * 1024 = 4K-bytes
+go_next:
+	ldr	r3, [r0], #4
+	ldr	r4, [r1], #4
+	teq	r3, r4
+	bne	notmatch
+	subs	r2, r2, #4
+	beq	done_nand_read
+	bne	go_next
+notmatch:
+1:	b	1b
+done_nand_read:
+#endif /* NAND_BOOT */
 #endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
 
+#ifndef CONFIG_S3C2410_NAND_BOOT
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
@@ -188,6 +248,7 @@
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
+#endif /* CONFIG_S3C2410_NAND_BOOT */
 
 clear_bss:
 	ldr	r0, _bss_start		/* find start of bss segment        */
diff -urN u-boot-1.2.0.orig/drivers/nand_legacy/nand_legacy.c u-boot-1.2.0/drivers/nand_legacy/nand_legacy.c
--- u-boot-1.2.0.orig/drivers/nand_legacy/nand_legacy.c	2007-01-07 07:13:11.000000000 +0800
+++ u-boot-1.2.0/drivers/nand_legacy/nand_legacy.c	2007-09-19 13:35:43.000000000 +0800
@@ -14,6 +14,7 @@
 #include <malloc.h>
 #include <asm/io.h>
 #include <watchdog.h>
+#include <s3c2410.h>
 
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # include <status_led.h>
@@ -61,6 +62,143 @@
 #define NANDRW_JFFS2	0x02
 #define NANDRW_JFFS2_SKIP	0x04
 
+/*
+ * NAND flash initialization.
+ */
+
+typedef enum {
+	NFCE_LOW,
+	NFCE_HIGH
+} NFCE_STATE;
+
+static inline void NF_Reset(void);
+static inline void NF_Init(void);
+static void NF_Conf(u16 conf);
+
+static void NF_Cmd(u8 cmd);
+static void NF_CmdW(u8 cmd);
+static void NF_Addr(u8 addr);
+static void NF_SetCE(NFCE_STATE s);
+static void NF_WaitRB(void);
+static void NF_Write(u8 data);
+static u8 NF_Read(void);
+static void NF_Init_ECC(void);
+static u32 NF_Read_ECC(void);
+
+static inline void NF_Reset(void)
+{
+	int i;
+
+	NF_SetCE(NFCE_LOW);
+	NF_Cmd(0xFF);			// reset command 
+	for(i = 0; i < 10; i++);	// tWB = 100ns. 
+	NF_WaitRB();			// wait 200~500us; 
+	NF_SetCE(NFCE_HIGH);
+}
+
+void nand_init(void)
+{
+        S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+        NF_Init();
+
+        printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
+}
+
+static inline void NF_Init(void)
+{
+	#if 0		// a little bit too optimistic
+		#define TACLS 0
+		#define TWRPH0 3
+		#define TWRPH1 0
+	#else
+		#define TACLS 0
+		#define TWRPH0 4
+		#define TWRPH1 2
+	#endif
+
+        NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0));
+        // 1  1    1     1,   1      xxx,  r xxx, r xxx
+        // En 512B 4step ECCR nFCE=H tACLS   tWRPH0 tWRPH1
+
+        NF_Reset();
+}
+
+static  void NF_Conf(u16 conf)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF = conf;
+}
+
+static void NF_Cmd(u8 cmd)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCMD = cmd;
+}
+
+static void NF_CmdW(u8 cmd)
+{
+	NF_Cmd(cmd);
+	udelay(1);
+}
+
+static void NF_Addr(u8 addr)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFADDR = addr;
+}
+
+static void NF_SetCE(NFCE_STATE s)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	switch (s) {
+		case NFCE_LOW:
+			nand->NFCONF &= ~(1<<11);
+			break;
+		case NFCE_HIGH:
+			nand->NFCONF |= (1<<11);
+			break;
+	}
+}
+
+static void NF_WaitRB(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	while (!(nand->NFSTAT & (1<<0)));
+}
+
+static void NF_Write(u8 data)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFDATA = data;
+}
+
+static u8 NF_Read(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFDATA);
+}
+
+static void NF_Init_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF |= (1<<12);
+}
+
+static u32 NF_Read_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFECC);
+}
 
 /*
  * Exported variables etc.
@@ -1368,14 +1506,7 @@
 #endif
 	oob_config.badblock_pos = 5;
 
-	for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
-		if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
-			nand = &nand_dev_desc[i];
-			break;
-		}
-	}
-	if (!nand)
-		return (0);
+	nand = &nand_dev_desc[0];
 
 	memset((char *)nand, 0, sizeof(struct nand_chip));
 
diff -urN u-boot-1.2.0.orig/include/configs/smdk2410.h u-boot-1.2.0/include/configs/smdk2410.h
--- u-boot-1.2.0.orig/include/configs/smdk2410.h	2007-01-07 07:13:11.000000000 +0800
+++ u-boot-1.2.0/include/configs/smdk2410.h	2007-09-19 13:47:55.000000000 +0800
@@ -78,23 +78,26 @@
 #define CONFIG_COMMANDS \
 			(CONFIG_CMD_DFL	 | \
 			CFG_CMD_CACHE	 | \
-			/*CFG_CMD_NAND	 |*/ \
+			CFG_CMD_NAND	 | \
+			CFG_CMD_ENV	 | \
 			/*CFG_CMD_EEPROM |*/ \
 			/*CFG_CMD_I2C	 |*/ \
 			/*CFG_CMD_USB	 |*/ \
+			CFG_CMD_NET	 | \
+			CFG_CMD_PING	 | \
 			CFG_CMD_REGINFO  | \
 			CFG_CMD_DATE	 | \
-			CFG_CMD_ELF)
+			CFG_CMD_ELF) & ~CFG_CMD_IMLS & ~CFG_CMD_FLASH
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
 #define CONFIG_BOOTDELAY	3
 /*#define CONFIG_BOOTARGS    	"root=ramfs devfs=mount console=ttySA0,9600" */
-/*#define CONFIG_ETHADDR	08:00:3e:26:0a:5b */
+#define CONFIG_ETHADDR		08:00:3e:26:0a:5b
 #define CONFIG_NETMASK          255.255.255.0
-#define CONFIG_IPADDR		10.0.0.110
-#define CONFIG_SERVERIP		10.0.0.1
+#define CONFIG_IPADDR		192.168.1.110
+#define CONFIG_SERVERIP		192.168.1.216
 /*#define CONFIG_BOOTFILE	"elinos-lart" */
 /*#define CONFIG_BOOTCOMMAND	"tftp; bootm" */
 
@@ -108,7 +111,7 @@
  * Miscellaneous configurable options
  */
 #define	CFG_LONGHELP				/* undef to save memory		*/
-#define	CFG_PROMPT		"SMDK2410 # "	/* Monitor Command Prompt	*/
+#define	CFG_PROMPT		"U-boot # "	/* Monitor Command Prompt	*/
 #define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
 #define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 #define	CFG_MAXARGS		16		/* max number of command args	*/
@@ -149,33 +152,45 @@
 #define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */
 
 #define CFG_FLASH_BASE		PHYS_FLASH_1
+#define CFG_NO_FLASH	1
 
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-#define CONFIG_AMD_LV400	1	/* uncomment this if you have a LV400 flash */
-#if 0
-#define CONFIG_AMD_LV800	1	/* uncomment this if you have a LV800 flash */
-#endif
-
-#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
-#ifdef CONFIG_AMD_LV800
-#define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
-#define CFG_MAX_FLASH_SECT	(19)	/* max number of sectors on one chip */
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
-#endif
-#ifdef CONFIG_AMD_LV400
-#define PHYS_FLASH_SIZE		0x00080000 /* 512KB */
-#define CFG_MAX_FLASH_SECT	(11)	/* max number of sectors on one chip */
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x070000) /* addr of environment */
-#endif
-
-/* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */
+/* Nand Flash Setting */
+#define CONFIG_S3C2410_NAND_BOOT
 
-#define	CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
+#define CFG_ENV_IS_IN_NAND	1
+#define CMD_SAVEENV		1
+#define CFG_ENV_OFFSET		0x20000
+#define CFG_ENV_SIZE		0x20000
+
+#define CFG_UBOOT_SIZE		0x40000
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#define CFG_NAND_LEGACY	1
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices	*/
+#define SECTORSIZE 		512
+#define ADDR_COLUMN		1
+#define ADDR_PAGE		2
+#define ADDR_COLUMN_PAGE	3
+#define NAND_ChipID_UNKNOWN 	0x00
+#define NAND_MAX_FLOORS		1
+#define NAND_MAX_CHIPS		1
+
+#define NAND_WAIT_READY(nand)	NF_WaitRB()
+
+#define NAND_DISABLE_CE(nand)	NF_SetCE(NFCE_HIGH)
+#define NAND_ENABLE_CE(nand)	NF_SetCE(NFCE_LOW)
+
+#define WRITE_NAND_COMMAND(d, adr)	NF_Cmd(d)
+#define WRITE_NAND_COMMANDW(d, adr)	NF_CmdW(d)
+#define WRITE_NAND_ADDRESS(d, adr)	NF_Addr(d)
+#define WRITE_NAND(d, adr)		NF_Write(d)
+#define READ_NAND(adr)			NF_Read()
+/* the following functions are NOP's because S3C24X0 handles this in hardware */
+#define NAND_CTL_CLRALE(nandptr)
+#define NAND_CTL_SETALE(nandptr)
+#define NAND_CTL_CLRCLE(nandptr)
+#define NAND_CTL_SETCLE(nandptr)
+ 
+#endif	/* CONFIG_COMMANDS & CFG_CMD_NAND */
 
 #endif	/* __CONFIG_H */
diff -urN u-boot-1.2.0.orig/include/environment.h u-boot-1.2.0/include/environment.h
--- u-boot-1.2.0.orig/include/environment.h	2007-01-07 07:13:11.000000000 +0800
+++ u-boot-1.2.0/include/environment.h	2007-09-19 13:41:25.000000000 +0800
@@ -102,4 +102,6 @@
 	unsigned char	data[ENV_SIZE]; /* Environment data		*/
 } env_t;
 
+void default_env(void);
+
 #endif	/* _ENVIRONMENT_H_ */
diff -urN u-boot-1.2.0.orig/include/s3c2410.h u-boot-1.2.0/include/s3c2410.h
--- u-boot-1.2.0.orig/include/s3c2410.h	2007-01-07 07:13:11.000000000 +0800
+++ u-boot-1.2.0/include/s3c2410.h	2007-09-19 12:38:31.000000000 +0800
@@ -38,12 +38,6 @@
 #define S3C2410_ECCSIZE		512
 #define S3C2410_ECCBYTES	3
 
-typedef enum {
-	S3C24X0_UART0,
-	S3C24X0_UART1,
-	S3C24X0_UART2
-} S3C24X0_UARTS_NR;
-
 /* S3C2410 device base addresses */
 #define S3C24X0_MEMCTL_BASE		0x48000000
 #define S3C24X0_USB_HOST_BASE		0x49000000
@@ -64,10 +58,23 @@
 #define S3C24X0_SPI_BASE		0x59000000
 #define S3C2410_SDI_BASE		0x5A000000
 
+#define oNFCONF			0x00
+#define oNFCMD			0x04
+#define oNFADDR			0x08
+#define oNFDATA			0x0C
+#define oNFSTAT			0x10
+#define oNFECC			0x14
+
+#ifndef __ASSEMBLER__
 
 /* include common stuff */
 #include <s3c24x0.h>
 
+typedef enum {
+	S3C24X0_UART0,
+	S3C24X0_UART1,
+	S3C24X0_UART2
+} S3C24X0_UARTS_NR;
 
 static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
 {
@@ -224,4 +231,7 @@
 		 rINTPND;\
 		 }
 /* Wait until rINTPND is changed for the case that the ISR is very short. */
+
+#endif /* __ASSEMBLER__ */
+
 #endif /*__S3C2410_H__*/
diff -urN u-boot-1.2.0.orig/lib_arm/board.c u-boot-1.2.0/lib_arm/board.c
--- u-boot-1.2.0.orig/lib_arm/board.c	2007-01-07 07:13:11.000000000 +0800
+++ u-boot-1.2.0/lib_arm/board.c	2007-09-19 13:07:23.000000000 +0800
@@ -38,6 +38,8 @@
  * FIQ Stack: 00ebef7c
  */
 
+#define DEBUG /* open debug switch */
+
 #include <common.h>
 #include <command.h>
 #include <malloc.h>