noname8.asm

一个基于51单片机的报警系统。包含有电路图

D_PORT  EQU P0
RS      EQU P1.6
RW      EQU P1.7
Y0      EQU P2.5
E       EQU P3.5
y2      EQU P2.7
BF      EQU ACC.7
_RD     EQU P3.7
_WR     EQU P3.6



org 0000h
ljmp 0100h


org 0100h
START:
      MOV       SP,#3fh
      CLR       Y0
      CLR       Y2


      lcall     init_lcm
      mov       r7,#10000000b
      mov       dptr,#string1
      lcall     put_string
      setb      Y0
      setb      Y2
      ljmp      $
string1:
        DB      "北京青云",0
put_string:
           mov  a,r7
           orl  a,#80h
           mov  r7,a
           lcall    write1_command
disp_str_loop:
              mov       a,#0
              movc      a,@a+dptr
              cjne      a,#0,cont_str_disp
              ret
cont_str_disp:
              mov       r7,a
              lcall     write_data
              inc       dptr
              sjmp      disp_str_loop
init_lcm:
         mov    r6,#0
         mov    r7,#41
         lcall  delay_ms
         mov    r7,#00110000b
         lcall  write1_command

         mov    r6,#0
         mov    r7,#1
         lcall  delay_us

         mov    r7,#00111001b
         lcall  write1_command

         mov    r6,#0
         mov    r7,#1
         lcall  delay_us

         mov    r7,#00001100b
         lcall  write1_command

         mov    r6,#0
         mov    r7,#1
         lcall  delay_us
         mov    r7,#00000001b
         lcall  write1_command

         mov    r6,#0
         mov    r7,#12
         lcall  delay_ms

         mov    r7,#00000110b
         lcall  write1_command
         ret
wait_free:
          push  acc
          mov   P0,#0FFH
          clr   RS
          setb  RW
          clr   _RD
loop_busy:
          setb  E
          mov   a,P0
          clr   E
          jb    BF,loop_busy
          clr   RS
          clr   RW
          pop   acc
          ret

write_command:
             lcall      wait_free
write1_command:
              clr       RS
              clr       RW
              setb      E
              setb      _WR
              mov       D_PORT,r7
              clr       _WR
              clr       E
              ret

write_data:
 ;         lcall wait_free
          setb  RS
          clr   RW
          setb  E
          setb  _WR
          mov   D_PORT,r7
          clr   _WR
          clr   E
          ret

delay_ms:
         nop
   delay:
         mov    acc,#125
   del:
         nop
         nop
         djnz   acc,del
         djnz   r7,delay
         mov    a,r6
         jz     exit
         djnz   r6,delay
   exit:
         ret

delay_us:
         nop
 delayus:
         mov    acc,#13
   delus:
         nop
         nop
         djnz   acc,delus
         djnz   r7,delayus
         mov    a,r6
         jz     exitus
         djnz   r6,delayus
 exitus:
         ret

        END