dsp28_sysctrl.c

微机通过串口通信精确控制pwm频率和脉宽。

//
//      TMDX ALPHA RELEASE
//      Intended for product evaluation purposes
//
//###########################################################################
//
// FILE:	DSP28_SysCtrl.c
//
// TITLE:	DSP28 Device System Control Initialization & Support Functions.
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
// //step4:初始化所需的外设（包括事件管理器EV模块、ADC模块、CAN总线模块等）InitPeripherals(); //在DSP28_InitPeripherals.c文件中完成//step5: 使用用户所需的函数、重新指定中断矢量（可选择的）、开用户所需中断//重新指定中断矢量EALLOW;// 0.55| 06 May 2002 | L.H. | EzDSP Alpha Release
//  0.56| 20 May 2002 | L.H. | No change
//  0.57| 24 May 2002 | L.H. | Added initialization of RAM control registers
//      |             |      | for TMX samples.
//###########################################################################


#include "DSP28_Device.h"

//---------------------------------------------------------------------------
// InitSysCtrl: 
//---------------------------------------------------------------------------
// This function initializes the System Control registers to a known state.
//
void InitSysCtrl(void)
{

    EALLOW;
   
// On TMX samples, to get the best performance of on chip RAM blocks M0/M1/L0/L1/H0 internal
// control registers bit have to be enabled. The bits are in Device emulation registers.
   DevEmuRegs.M0RAMDFT = 0x0300;
   DevEmuRegs.M1RAMDFT = 0x0300;
   DevEmuRegs.L0RAMDFT = 0x0300;
   DevEmuRegs.L1RAMDFT = 0x0300;
   DevEmuRegs.H0RAMDFT = 0x0300;
   
           
// Disable watchdog module

   SysCtrlRegs.SCSR.all=0x0002;
   SysCtrlRegs.WDKEY= 0x00AA;
   SysCtrlRegs.WDKEY= 0x0055;
   SysCtrlRegs.WDCR= 0x006F;
// Initalize PLL
   SysCtrlRegs.PLLCR = 0x0A;//sysclk=150MHz
 
       
// HISPCP/LOSPCP prescale register settings, normally it will be set to default values
   SysCtrlRegs.HISPCP.all = 0x0000;
   SysCtrlRegs.LOSPCP.all = 0x0002;	//低速时钟=150M/4=37.5MHz;
// Peripheral clock enables set for the selected peripherals.   
   SysCtrlRegs.PCLKCR.bit.EVAENCLK=1;
   SysCtrlRegs.PCLKCR.bit.EVBENCLK=1;
   SysCtrlRegs.PCLKCR.bit.SCIENCLKA=1;
   SysCtrlRegs.PCLKCR.bit.SCIENCLKB=1;
   SysCtrlRegs.PCLKCR.bit.ADCENCLK=1;//该位置1，将使ADC的外设的高速时钟有效。
                //在系统配置（DSP28_SysCtrl.c）中注意启动ADC模块的外部时钟，否则ADC模块初始化时寄存器是不能写入数值的；				
   SysCtrlRegs.PCLKCR.bit.MCBSPENCLK=1;//使能MCBSP外设内部的低速时钟（LCPCLK！）
   SysCtrlRegs.PCLKCR.bit.SPIENCLK=1;
    EDIS;
	
}

//---------------------------------------------------------------------------
// KickDog: 
//---------------------------------------------------------------------------
// This function resets the watchdog timer.
// Enable this function for using KickDog in the application 
/*
void KickDog(void)
{
    EALLOW;
    SysCtrlRegs.WDKEY = 0x0055;
    SysCtrlRegs.WDKEY = 0x00AA;
    EDIS;
}
*/	
	
//===========================================================================
// No more.
//===========================================================================