spi_test.c

s3c6400 ADS下官方测试程序

#include <stdio.h>
#include "string.h"
#include "def.h"
#include "option.h"
#include "library.h"
#include "system.h"
#include "spi.h"
#include "sysc.h"
#include "timer.h"

// Test Vector.
#define SPI_BUFFER_SIZE 0x100000			// Reserved Buffer Size.
#define SPI_SPEED 10000000	// 50Mhz.			// Transfer Speed, that is limit to clock source.
#define SPI_DATA_COUNT (0xfffC)				// max Buffer size.
#define CLK_SOURCE SPI_EPLL_CLK				// SPI Clock Source.
#define TEST_CHANNEL0 0						// SPI Test Peripheral 0
#define TEST_CHANNEL1 1						// SPI Test Peripheral 1
#define SPI_TEST_CPOL	SPI_ACTIVE_HIGH		// SPI Test polarity
#define SPI_TEST_CHANNEL_WIDTH SPI_WORD	// SPI Channel Size
#define SPI_TEST_BUS_WIDTH SPI_WORD		// SPI Bus Size
#define SPI_TEST_DMA_TYPE SPI_DMA_SINGLE	// SPI DMA Mode
#define SPI_TEST_FORMAT SPI_FORMAT_A		// SPI Test Phase
// When polling mode test, must using board to board test.
#define SPI_TEST_TRANSFER_MODE SPI_DMA_MODE	// SPI transfer mode selection.
#define SPI_MIN_ERROR_CNT	72
//////////
// File Name : SPI_getBuffer
// File Description : make buffer on non-cache area.
// Input : index 
// Output : NONE.
// Version : 
u8 * SPI_getBuffer(int index, bool sequence, bool clear) {
	u8* result, *p;
	int buffer_size = SPI_BUFFER_SIZE;
	int i;
	u8 reqNum;
	
	result = (u8*)(CODEC_MEM_ST + index * buffer_size);
	
	if ( clear == TRUE ) {
		memset( result, 0, buffer_size );
	}
	p=result;
	if ( sequence == TRUE ) {
		reqNum = 0xaa;//(u8)(rand() & 0xFF);	// auto offset.//youngbo.song
		for(i=buffer_size;i>0;i--) {
			*p++=reqNum++;
		}
	}
	return result;
}


//////////
// File Name : SPI_CompareData
// File Description : data compare function.
// Input : source data1, source data2, data length
// Output : NONE.
// Version : 
int SPI_CompareData(u8* data1, u8* data2, u32 bytes) {
	u32 i;
	int errorCnt=0;
	// find gargage offset.
	for(i=0;i<SPI_MIN_ERROR_CNT;i++) {
		if( *data1 == *(data2+i) ) {
			printf( "Garbage Offset : [%d]\n" , i );
			data2=data2+i;
			break;
		}
	}
	for (i=0; i<bytes; i++)
	{
		if(*data1 != *data2 )
		{
			if (errorCnt==0)
			{
				printf("%08x=%02x <-> %08x=%02x\n", data1, *data1, data2, *data2);
			}
			errorCnt++;
		}
		data1++;
		data2++;
	}
	if(errorCnt==0) {
		printf("Data Compare Ok\n");
	}
	else {
		printf( "Error Count: %d\n", errorCnt );
	}
	return errorCnt;
}

//////////
// File Name : callback
// File Description : call back function for non-blocking implement.
// Input : SPI_channel
// Output : NONE.
// Version : 
void callback(SPI_channel * ch) {
	printf( "Callback Exe : tx:%d, rx:%d\n", ch->m_uTxRemainDataSize, ch->m_uRxRemainDataSize );
}

// Test Case 0 - DMA, Interrrupt Only.
bool SPI_MasterFullDuplex(void) {
	SPI_channel *ch1, *ch0;
	int DataCnt;
	u32 time = 0;
	u8* uMTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uMRxBufAddr = (u8*)SPI_getBuffer(1, FALSE, TRUE);
	u8* uSTxBufAddr = (u8*)SPI_getBuffer(2, TRUE, TRUE);
	u8* uSRxBufAddr = (u8*)SPI_getBuffer(3, FALSE, TRUE);

	DataCnt = SPI_DATA_COUNT;

// =========== SPI1 Slave Rx/Tx Setting =========== 
	ch1 = SPI_open( TEST_CHANNEL1, SPI_SLAVE, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch1, SPI_DMA_MODE, uSTxBufAddr, uSRxBufAddr, DataCnt, callback);

// =========== SPI0 Master Rx/Tx Setting =========== 
	ch0 = SPI_open( TEST_CHANNEL0, SPI_MASTER, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	StartTimer(0);
	SPI_transaction( ch0, SPI_TEST_TRANSFER_MODE, uMTxBufAddr, uMRxBufAddr, DataCnt, NULL);
	time = StopTimer(0);
	printf( "BPS = %f, time:%d\n", ((float)DataCnt)/((float)time), time );
	while ( ch1->m_uTxRemainDataSize != 0 );
	while ( ch1->m_uRxRemainDataSize != 0 );
	SPI_close( ch0 );
	SPI_close( ch1 );

//	printf( "master to slave\n");
	if ( SPI_CompareData( uMTxBufAddr, uSRxBufAddr, DataCnt ) > SPI_MIN_ERROR_CNT ) {
		printf ( "ERROR 1\n");
		return FALSE;
	}
//	printf( "slave to master\n");
	if ( SPI_CompareData( uSTxBufAddr, uMRxBufAddr, DataCnt ) > SPI_MIN_ERROR_CNT ) {
		printf ( "ERROR 2\n");
		return FALSE;
	}
	return TRUE;
}

// Test Case 1 - DMA, Interrupt Only
bool SPI_SlaveFullDuplex(void) {
	SPI_channel *ch1, *ch0;
	int DataCnt;
	u32 time = 0;
	u8* uMTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uMRxBufAddr = (u8*)SPI_getBuffer(1, FALSE, TRUE);
	u8* uSTxBufAddr = (u8*)SPI_getBuffer(2, TRUE, TRUE);
	u8* uSRxBufAddr = (u8*)SPI_getBuffer(3, FALSE, TRUE);

	DataCnt = SPI_DATA_COUNT;

// =========== SPI1 Slave Rx/Tx Setting =========== 
	ch0 = SPI_open( TEST_CHANNEL0, SPI_SLAVE, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch0, SPI_TEST_TRANSFER_MODE, uSTxBufAddr, uSRxBufAddr, DataCnt, callback);

// =========== SPI0 Master Rx/Tx Setting =========== 
	ch1 = SPI_open( TEST_CHANNEL1, SPI_MASTER, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	StartTimer(0);
	SPI_transaction( ch1, SPI_DMA_MODE, uMTxBufAddr, uMRxBufAddr, DataCnt, NULL);
	time = StopTimer(0);
	printf( "BPS = %f, time:%d\n", ((float)DataCnt)/((float)time), time );
	while ( ch0->m_uTxRemainDataSize != 0 );
	while ( ch0->m_uRxRemainDataSize != 0 );
	SPI_close( ch0 );
	SPI_close( ch1 );

//	printf( "master to slave\n");
	if ( SPI_CompareData( uMTxBufAddr, uSRxBufAddr, DataCnt ) > SPI_MIN_ERROR_CNT ) {
		printf ( "ERROR1\n");
		return FALSE;
	}
//	printf( "slave to master\n");
	if ( SPI_CompareData( uSTxBufAddr, uMRxBufAddr, DataCnt ) > SPI_MIN_ERROR_CNT ) {
		printf( "ERROR2\n");
		return FALSE;
	}
	return TRUE;
	
}

// Test Case 2 - DMA, Interrupt, Polling - Support
bool SPI_MasterTxOnly(void) {
	SPI_channel *ch0, *ch1;
	int DataCnt;
	u32 time=0;
	u8* uTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uRxBufAddr = (u8*)SPI_getBuffer(2, FALSE, TRUE);

	DataCnt = SPI_DATA_COUNT;
// =========== SPI1 Slave Rx Setting =========== 
	ch1 = SPI_open( TEST_CHANNEL1, SPI_SLAVE, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch1, SPI_DMA_MODE, NULL, uRxBufAddr, DataCnt, callback);
	
// =========== SPI0 Master Tx Setting =========== 
	ch0 = SPI_open( TEST_CHANNEL0, SPI_MASTER, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	StartTimer(0);
	SPI_transaction( ch0, SPI_TEST_TRANSFER_MODE, uTxBufAddr, NULL, DataCnt, NULL);
	time = StopTimer(0);
	printf( "BPS = %f, time:%d\n", ((float)DataCnt)/((float)time), time );
	
	while ( ch1->m_uRxRemainDataSize != 0 );
	SPI_close( ch0 );
	SPI_close( ch1 );

	if ( SPI_CompareData( uTxBufAddr, uRxBufAddr, DataCnt ) > 0 ) {
		return FALSE;
	}
	return TRUE;
}

// Test Case 3 - DMA, Interrupt Only.
bool SPI_SlaveRxOnly(void) {
	SPI_channel * ch0, * ch1;
	int DataCnt;
	u32 time = 0;
	u8* uTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uRxBufAddr = (u8*)SPI_getBuffer(2, FALSE, TRUE);
	
	DataCnt = SPI_DATA_COUNT;
 
// =========== SPI0 Slave Rx Setting =========== 
	ch0 = SPI_open( TEST_CHANNEL0, SPI_SLAVE, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch0, SPI_TEST_TRANSFER_MODE, NULL, uRxBufAddr, DataCnt, callback);
// =========== SPI1 Master Tx Setting =========== 
	ch1 = SPI_open( TEST_CHANNEL1, SPI_MASTER, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	StartTimer(0);
	SPI_transaction( ch1, SPI_DMA_MODE, uTxBufAddr, NULL, DataCnt, NULL);
	time = StopTimer(0);
	printf( "BPS = %f, time:%d\n", ((float)DataCnt)/((float)time), time );
	while(ch0->m_uRxRemainDataSize!= 0);
	
	SPI_close( ch0 );
	SPI_close( ch1 );

	if ( SPI_CompareData( uTxBufAddr, uRxBufAddr, DataCnt ) > 0 ) {
		return FALSE;
	}
	return TRUE;
}

// Test Case 4 - DMA, Interrupt, Polling - Support
bool SPI_MasterRxOnly(void) {
	SPI_channel * ch0, *ch1; 
	int DataCnt;
	u8* uTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uRxBufAddr = (u8*)SPI_getBuffer(2, FALSE, TRUE);
	
	DataCnt = SPI_DATA_COUNT;
	
// =========== SPI1 Slave Tx Setting =========== 
	ch1 = SPI_open( TEST_CHANNEL1, SPI_SLAVE, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch1, SPI_DMA_MODE, uTxBufAddr, NULL, DataCnt, callback);
	
// =========== SPI0 Master Rx Setting =========== 
	ch0 = SPI_open( TEST_CHANNEL0, SPI_MASTER, SPI_TEST_CPOL, SPI_TEST_FORMAT, CLK_SOURCE, SPI_SPEED, SPI_TEST_CHANNEL_WIDTH, SPI_TEST_BUS_WIDTH, SPI_TEST_DMA_TYPE );
	SPI_transaction( ch0, SPI_TEST_TRANSFER_MODE, NULL, uRxBufAddr, DataCnt, NULL);

	while( ch1->m_uTxRemainDataSize != 0 );
	SPI_close( ch0 );
	SPI_close( ch1 );
	if ( SPI_CompareData( uTxBufAddr, uRxBufAddr, DataCnt ) > 0 ) {
		return FALSE;
	}
	return TRUE;
}

// Test Case 5 - DMA, Interrupt Only.
bool SPI_SlaveTxOnly(void) {
	SPI_channel * ch0, *ch1;
	int DataCnt;
	u8* uTxBufAddr = (u8*)SPI_getBuffer(0, TRUE, TRUE);
	u8* uRxBufAddr = (u8*)SPI_getBuffer(2, FALSE, TRUE);
	
	DataCnt = SPI_DATA_COUNT;