cs8900.c

s3c6400 ADS下官方测试程序

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "def.h"
#include "option.h"
#include "library.h"
#include "sfr6400.h"
#include "sromc.h"
#include "system.h"
#include "sysc.h"
#include "dma.h"
#include "intc.h"
#include "sromc.h"
#include "gpio.h"

#include "am29f800.h"
#include "cs8900.h"


#if 0
#define CS8900_Tacs	(eCLK0)	// 0clk		address set-up
#define CS8900_Tcos	(eCLK5)	// 4clk		chip selection set-up
#define CS8900_Tacc	(eCLK15)	// 14clk	access cycle
#define CS8900_Tcoh	(eCLK2)	// 1clk		chip selection hold
#define CS8900_Tah	(eCLK5)	// 4clk		address holding time
#define CS8900_Tacp	(eCLK7)	// 6clk		page mode access cycle
#else
#define CS8900_Tacs	(eCLK0)	// 0clk		address set-up
#define CS8900_Tcos	(eCLK3)	// 2clk		chip selection set-up
#define CS8900_Tacc	(eCLK21)	// 20clk	access cycle
#define CS8900_Tcoh	(eCLK0)	// 0clk		chip selection hold
#define CS8900_Tah	(eCLK0)	// 0clk		address holding time
#define CS8900_Tacp	(eCLK2)	// 1clk		page mode access cycle
#endif

#define CS8900_PMC	(0x0)	// normal(1data)

#define PUBLIC
#define PRIVATE						static

#define IOREAD(o)					((unsigned short)*((volatile unsigned short *)(dwEthernetIOBase + (o))))
#define IOWRITE(o, d)				*((volatile unsigned short*)(dwEthernetIOBase + (o))) = (unsigned short)(d)

//#define DBGMSG						EdbgOutputDebugString
#define MAX_COUNT					0x100000

#define CS8900_BASE_ADDRESS			0x10000000	//bank 0
#define CS8900_IOMODE_ASSERT		(0x01000000)	//address24 
#define CS8900_IOBASE_OFFSET		(0x300)	// IO Base Address

#define CS8900DBG_PROBE				(1 << 0)

PRIVATE unsigned int dwEthernetIOBase;

#define READ_REG					ReadReg
#define WRITE_REG					WriteReg

void Detect_CS8900(void);



void * func_cs8900_test[][2]=
{	
    //        				"123456789012345678"
    //Clock test
    (void *)Detect_CS8900,			"Detect CS8900   ",
    0,0
};

void CS8900_Test(void)
{
    int i;

	while(1)
	{
		i=0;
		Disp("\n\n");
		while(1)
		{   //display menu
		    Disp("%2d:%s",i,func_cs8900_test[i][1]);
		    i++;
		    if((int)(func_cs8900_test[i][0])==0)
		    {
			Disp("\n");
			break;
		    }
		    if((i%3)==0)
		    Disp("\n");
	}

	Disp("\nSelect (\"-1\" to exit) : ");
	i = GetIntNum();
	if(i==-1) 
	    break;		// return.
	if(i>=0 && (i<((sizeof(func_cs8900_test)-1)/8)) )	// select and execute...
	    ( (void (*)(void)) (func_cs8900_test[i][0]) )();
    }
    Disp("\nCS8900_Test program end.\n");
}



PRIVATE unsigned short 
ReadReg(unsigned short offset)
{
	IOWRITE(IO_PACKET_PAGE_POINTER, offset);
	return IOREAD(IO_PACKET_PAGE_DATA_0);
}

PRIVATE void 
WriteReg(unsigned short offset, unsigned short data)
{
	IOWRITE(IO_PACKET_PAGE_POINTER, offset);
	IOWRITE(IO_PACKET_PAGE_DATA_0 , data);
}

void Detect_CS8900(void)
{
	unsigned int iobase = 0;
	volatile unsigned short signature=0;
	volatile unsigned short eisa_number=0;
	volatile unsigned short prod_id=0;
	unsigned short offset=0;
	s32	iBankSel = 0;
	s32	iTacs = 0;
	s32	iTcos = 0;
	s32	iTacc = 0;
	s32	iTacp = 0;
	s32	iTcoh = 0;
	s32	iTcah = 0;

	Disp("1)nCS1	2)nCS2	3)nCS3	4)nCS4	5)nCS5\n");
	Disp("\nSelect SROM Bank(\"0\" to exit) : ");
	iBankSel = GetIntNum();
	if(iBankSel==0 || iBankSel > 5) 
	    return;		// return.

	Disp("\nSelect Tacs(0~15, default 0) : ");
	iTacs = GetIntNum();
	if (iTacs == -1) 
		iTacs = eCLK0;
	Disp("\nSelect Tcos(0~15, default 3) : ");
	iTcos = GetIntNum();
	if (iTcos == -1) 
		iTcos = eCLK3;
	Disp("\nSelect Tacc(0~31, default 21) : ");
	iTacc = GetIntNum();
	if (iTacc == -1) 
		iTacc = eCLK21;	
	Disp("\nSelect Tacp(0~15, default 2) : ");
	iTacp = GetIntNum();
	if (iTacp == -1) 
		iTacp = eCLK2;	
	Disp("\nSelect Tcoh(0~15, default 0) : ");
	iTcoh = GetIntNum();
	if (iTcoh == -1) 
		iTcoh = eCLK0;		
	Disp("\nSelect Tcah(0~15, default 0) : ");
	iTcah = GetIntNum();
	if (iTcah == -1) 
		iTcah = eCLK0;		

	
	SROMC_SetBank(iBankSel, eEn_CTL, eEn_WAIT, e16bit, eNor_Mode, 
					(Bank_eTiming)iTacs, (Bank_eTiming)iTcos, (Bank_eTiming)iTacc, (Bank_eTiming)iTcoh, (Bank_eTiming)iTcah, (Bank_eTiming)iTacp);
	GPIO_SetMem0DrvStrength(0x3);		// Drive Strength Control... 0x3 is maximum value(14mA@VDDmem=1.8V)
	
	////////////////////////////////////////////////////////
	// bank5 = 0x14000000
	// cs8900 cs base address 
	// ADDR24 - high -> ioread/write
	// ADDR24 - low --> mem read/write
	////////////////////////////////////////////////////////
	// io read/write base address 
	// = 0x14000000 + 0x01000000 (ADDR24 high) + 0x300 (cs8900 io base offset) = 0x15000300
	//------------------------------------------------------
	// memory read/write base address 
	// = 0x14000000 + 0x00000000 (ADDR24 low) = 0x14000000
	////////////////////////////////////////////////////////
//	iobase = CS8900_BASE_ADDRESS+CS8900_IOMODE_ASSERT+CS8900_IOBASE_OFFSET;
	iobase = CS8900_BASE_ADDRESS+0x08000000*(iBankSel)+CS8900_IOBASE_OFFSET;
	
	Disp(" CS8900 Probe()... CS:%d, IOBASE : 0x%x\r\n", iBankSel, iobase);

	dwEthernetIOBase  = iobase;

	do 
	{			
											/* Check the EISA registration number.	*/
		offset = PKTPG_EISA_NUMBER;
		eisa_number = READ_REG(offset);
		Disp("Eisa Number1 = 0x%04x\r\n", eisa_number);
		if (eisa_number != CS8900_EISA_NUMBER)
		{
			Disp("Eisa Number Error = 0x%04x\r\n", eisa_number);
			break;
		}

		signature = IOREAD(IO_PACKET_PAGE_POINTER);
		Disp("Signature = 0x%04x\r\n", signature);
		if (signature != (CS8900_SIGNATURE+offset))
		{
			Disp("Signature Error = 0x%04x\r\n", signature);
			break;
		}

		offset = PKTPG_PRDCT_ID_CODE;
		prod_id = READ_REG(offset);
		Disp("Product ID = 0x%04x\r\n", prod_id);
		if (( prod_id & CS8900_PRDCT_ID_MASK)!= CS8900_PRDCT_ID)
		{
			Disp("Product ID Error = 0x%04x\r\n", prod_id);
			break;
		}

		signature = IOREAD(IO_PACKET_PAGE_POINTER);
		Disp("Signature = 0x%04x\r\n", signature);
		if (signature != (CS8900_SIGNATURE+offset))
		{
			Disp("Signature Error = 0x%04x\r\n", signature);
			break;
		}

		Disp("CS8900 is Detected..\n");

		WRITE_REG(0, 0);
	} while (0);

}