sblock_test.c

s3c6400 ADS下官方测试程序

	Outp32(0x7D400000, 0x4);
	Outp32(0x7D800000, 0x4);  // FIFO Reset
	SBLK_SetFifo(0x19, 0x30010, 5, 0x10, LASTBYTE_4TH);
	//SBLK_StartFifo();
	Outp32(0x7D400000, 0xB3);		// Rx FIFO Start 
	Outp32(0x7D800000, 0xB3);		// Tx FIFO Start	



	//printf("HASH_CTRL Reg: 0x%x\n", Inp32(0x7D300000));
/*
	// Intermediate FIFO Setting
	Outp32(0x7D400000, 0x04);		// Rx Fifo Host Write Enable/Start
	Outp32(0x7D800000, 0x04);		// Tx Fifo Host Write Enable/Start

	Outp32(0x7D400004, 0x19);		// Rx Fifo Message Length
	Outp32(0x7D400008, 0x30010);	// Full 32bit, block Size 0x10
	Outp32(0x7D40000C, 0x7D300004);	// Rx FIFO Destination Address, HASH Rx DATA

	Outp32(0x7D800004, 0x5);		// Tx FIFO Message Length
	Outp32(0x7D800008, 0x10);
	//Outp32(0x7D80000C, 0x7D300034);	// Tx FIFO Source Address => Rx HASHOUT ??
	Outp32(0x7D80000C, 0x7D700034);	// Tx FIFO Source Address => Rx HASHOUT ??
	
	Outp32(0x7D400000, 0xB3);		// Rx FIFO Start 
	Outp32(0x7D800000, 0xB3);		// Tx FIFO Start	
*/


	
//	while(((Inp32(0x7D400000)>>16)&0xFFFF)<0x10);	//
	SBLK_PutDataToRxFifo((u32)uSha1PlainText16, 16);
//	while(((Inp32(0x7D400000)>>16)&0xFFFF)<0x10);
	SBLK_PutDataToRxFifo((u32)uSha1PlainText16, 9);
       //Outp32(0x7D300000, 0x0C9);
//	Outp32(0x7D400040, 0x64636261);
	//SBLK_PutDataToInReg1((u32)uSha1PlainText47, 25, LASTBYTE_4TH);

	
	//while(!SBLK_IsOutputReady());
	while(!SBLK_IsFifoTransDone());
	//SBLK_GetDataFromOutReg(OUTPUT_BUF, 5);

	SBLK_GetDataFromTxFifo(OUTPUT_BUF, 5);

	Copy((u32)uSha1CipherText_Inter, GOLDEN_BUF, 5);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 5);
	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("HASH_SHA1_CPU 1, LAST_1ST Success \n");
		}
		else
		{
		Disp("HASH_SHA1_CPU 1, LAST_1ST Failed \n");
		}
	}
	else
	{
		if(uRet == false)
			{
				Disp("HASH_SHA1_CPU 1, LAST_1ST Failed \n");
				g_sblock_err =1;
				UART_Getc();
			}
	}

	
	
	
}

#if 0
void Test_SHA1_INTERMEDIATE_T(void)
{
	u32 uRet, i, uTemp, j,k, uShift;

	
while(j<<0x1000)
{
	for(k=0;k<4;k++)
	{
	SBLK_Init(HASH, SHA1, ENC);
	//Outp32(0x7D300000, 0x9);

/*
	// Intermediate FIFO Setting
	Outp32(0x7D400000, 0x04);		// Rx Fifo Host Write Enable/Start
	Outp32(0x7D800000, 0x04);		// Tx Fifo Host Write Enable/Start

	Outp32(0x7D400004, 0x79);		// Rx Fifo Message Length
	Outp32(0x7D400008, 0x30010);	// Full 32bit, block Size 0x10
	Outp32(0x7D40000C, 0x7D300004);	// Rx FIFO Destination Address, HASH Rx DATA

	Outp32(0x7D800004, 0x5);		// Tx FIFO Message Length
	Outp32(0x7D800008, 0x10);
	//Outp32(0x7D80000C, 0x7D300034);	// Tx FIFO Source Address => Rx HASHOUT ??
	Outp32(0x7D80000C, 0x7D700034);	// Tx FIFO Source Address => Rx HASHOUT ??
	
	Outp32(0x7D400000, 0xB3);		// Rx FIFO Start 
	Outp32(0x7D800000, 0xB3);		// Tx FIFO Start	
*/

	SBLK_SetFifo(0x79, 0x30010, 5, 0x10, LASTBYTE_4TH);
	SBLK_StartFifo();

	//for(i=0;i<7;i++){
	for(i=0;i<6;i++){
	//Wait Write Enable...		
	SBLK_PutDataToRxFifo((u32)uSha1PlainText16, 16);
	}
	

	while(((Inp32(0x7D400000)>>8)&0xFF)>1);	// RX_FIFO Empty Polling
	while(((Inp32(0x7D300030)>>3)&0x3)==3);	// Ready to receivce

	Delay(10);
	//SBLK_GetDataFromTxFifo(OUTPUT_BUF, 5);
	
	Copy(0x7D30005c, MID_BUF, 5);


	// HMAC Operating.
	SBLK_Init(HASH, HMAC, ENC);
	SBLK_SetFifo(47, 16, 5, 16, LASTBYTE_4TH);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo((u32)uHmacPlainText47, 47);
	while(!SBLK_IsFifoTransDone());
	SBLK_GetDataFromTxFifo(OUTPUT_BUF, 5);
	Copy((u32)uHmacCiperText47, GOLDEN_BUF, 5);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 5);
	if (uRet)
	{
		//Disp("HASH_HMAC ,  Success \n");
		
	}
	else
	{
		Disp("HASH_HMAC ,  Failed \n" );
	}

	// Start 2nd SHA1 Operation

	
	//Copy(MID_BUF, 0x7D300070, 5);		//Load Back-up Intermediate Value
	//Copy(MID_BUF, 0x7D700070, 5);

/*
	Copy(MID_BUF+0x10, 0x7D300070,1);
	Copy(MID_BUF+0xc, 0x7D300074,1);
	Copy(MID_BUF+8, 0x7D300078,1);
	Copy(MID_BUF+4, 0x7D30007c,1);
	Copy(MID_BUF, 0x7D300080,1);
*/
	

	Outp32(0x7D300070, 0xcd381861);		// Golden Data => MID Value
	Outp32(0x7D300074, 0x1a921f94);
	Outp32(0x7D300078, 0x6e76da53);
	Outp32(0x7D30007c, 0x5c52c230);
	Outp32(0x7D300080, 0x64e696cd);

	
/*
	Outp32(0x7D300070, 0x64e696cd);	//=> Fail... 0x364a80e1
	Outp32(0x7D300074, 0x5c52c230);
	Outp32(0x7D300078, 0x6e76da53);
	Outp32(0x7D30007c, 0x1a921f94);
	Outp32(0x7D300080, 0xcd381861);
*/
/*
	Outp32(0x7D300070, 0xcd96e664);	//=> Fail... 0x364a80e1
	Outp32(0x7D300074, 0x30c2525c);
	Outp32(0x7D300078, 0x53da766e);
	Outp32(0x7D30007c, 0x941f921a);
	Outp32(0x7D300080, 0x611838cd);
*/	
/*
	Outp32(0x7D300080, 0x611838cd);
	Outp32(0x7D30007c, 0x941f921a);
	Outp32(0x7D300078, 0x53da766e);
	Outp32(0x7D300074, 0x30c2525c);
	Outp32(0x7D300070, 0xcd96e664);
*/

	//printf("PRE_MSG_LENGTH 02\n");
	//uTemp = GetIntNum();

	
	//Copy(MID_BUF, 0x7D700070, 5);		//Load Back-up Intermediate Value
	Outp32(0x7D300084, 0x0);
	Outp32(0x7D300088,j<<uShift);
	//Outp32(0x7D300088,0xC0000);
	//Outp32(0x7D300088,0x60000000);
	//Outp32(0x7D700088,0xC00);		// SHA1 Pre Length Load,  96Word => C00

	//Outp32(0x7D300000, 0x109);		// Usign Back-up IV, not SHA1 Constants
	//Outp32(0x7D300000, 0x1c9);		// Usign Back-up IV, not SHA1 Constants
	//Outp32(0x7D300000, 0x109);		// Usign Back-up IV, not SHA1 Constants
	//SBLK_Init_T(HASH, SHA1, ENC);

	//SBLK_Init(HASH, SHA1, ENC);
	
	Outp32(0x7D300000, 0x109);
	//SBLK_PutDataToInReg((u32)uSha1PlainText47, 25, LASTBYTE_4TH);
	//SBLK_PutDataToInReg1((u32)uSha1PlainText47, 25, LASTBYTE_4TH);

	Outp32(0x7D300004, 0x64636261);

	//Outp32(0x7D300000, 0x1);
	for(i=0;i<23;i++){
			Outp32(0x7D300004, 0x64636261);
					}
	Outp32(0x7D300000, 0xD1);
	Outp32(0x7D300004, 0x64636261);

	
	while(!SBLK_IsOutputReady());
	//while(!SBLK_IsFifoTransDone());
	SBLK_GetDataFromOutReg(OUTPUT_BUF, 5);
	//SBLK_GetDataFromTxFifo(OUTPUT_BUF, 5);

	Copy((u32)uSha1CipherText_Inter, GOLDEN_BUF, 5);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 5);
	if (uRet)
	{
		Disp("HASH_SHA1_CPU 1, LAST_1ST Success \n");
		printf("PRE_LENGTH : 0x%x\n",j);
		break;
		
	}
	else
	{
		Disp("HASH_SHA1_CPU 1 0x%x, LAST_1ST Failed \n", j);
	}

	uShift = uShift +8;
	}
	j++;

}	

	Disp(" \n");
	
}
#endif

void Test_CBC_IV_FIFO(eFunction_Test eTest, oFunctionT_AutoVar oAutoVar)
{
	u32 uRet;

	//g_sblock_err =0;

	if(eTest == eTest_Manual)
	{
		printf("[SBLOCK - AES(CBC) IV FIFO Test]\n");

		printf(" Choose AES Key Select :  0 : 128bit,  1:192bit,  2:256bits \n");
		g_AES_Key = GetIntNum();
		
	}
	else
	{
		g_AES_Key = oAutoVar.Test_Parameter[0];
	}

	 switch(g_AES_Key)
	 	{
		case 0:
	 		Copy((u32)uAesCipherText128, GOLDEN_BUF, 16);
	 		Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
		   
			 break;
		case 1:
			Copy((u32)uAesCipherText192, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	
		case 2:
			Copy((u32)uAesCipherText256, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	 	}

	// Encryption
	//SBLK_Init(AES, CBC, ENC);
	SBLK_Init_Test2(AES, CBC, ENC);
	SBLK_SetFifo(8, 4, 8, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo((u32)uAesPlainText, 8);
	
	while(!SBLK_IsFifoTransDone());

	// Intermediate IV Back-up
	Copy(0x7D1000A0, MID_BUF, 4);
	SBLK_GetDataFromTxFifo(OUTPUT_BUF, 8);
	
	//Copy((u32)uAesCipherText[CBC], GOLDEN_BUF, 16);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 8);

	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		DispOperMode(eAesOperMode);
		Disp("_IV_1st_ENC Success..\n");
		}
		else
		{
		Disp("AES");
		DispOperMode(eAesOperMode);
		Disp("_IV_1st_ENC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				printf("_IV_1st_ENC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}
	
	////////////////////////////
	// Decryption
	//SBLK_Init(AES, CBC, DEC);
	SBLK_Init_Test2(AES, CBC, DEC);
	SBLK_SetFifo(8, 4, 8, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo(GOLDEN_BUF, 8);

	while(!SBLK_IsFifoTransDone());

	// Intermediate IV Back-up
	Copy(0x7D1000A0, MID_BUF+0x20, 4);

	SBLK_GetDataFromTxFifo(INPUT_BUF, 8);
	//Copy((u32)uAesPlainText, GOLDEN_BUF, 16);
	uRet = Compare(INPUT_BUF, GOLDEN_BUF1, 8);

	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		DispOperMode(eAesOperMode);
		Disp("_IV_1st_DEC Success..\n");
		}
		else
		{
		Disp("AES");
		DispOperMode(eAesOperMode);
		Disp("_IV_1st_DEC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				printf("_IV_1st_DEC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}

	// 2nd Encryption 
	SBLK_Init_Test2(AES, CBC, ENC);
	Copy(MID_BUF, 0x7D1000A0, 4);	// Intermediate IV
		
	SBLK_SetFifo(8, 4, 8, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo((u32)uAesPlainText+0x20, 8);
	
	while(!SBLK_IsFifoTransDone());

	// Intermediate IV Back-up
	
	SBLK_GetDataFromTxFifo(OUTPUT_BUF+0x20, 8);
	
	//Copy((u32)uAesCipherText[CBC], GOLDEN_BUF, 16);
	uRet = Compare(OUTPUT_BUF+0x20, GOLDEN_BUF+0x20, 8);

	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		DispOperMode(eAesOperMode);
		Disp("_IV_2nd_ENC Success..\n");
		}
		else
		{
		Disp("AES");
		DispOperMode(eAesOperMode);
		Disp("_IV_2nd_ENC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				printf("_IV_2nd_ENC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}


	// 2nd Decryption
	// Decryption

	SBLK_Init_Test2(AES, CBC, DEC);
	Copy(MID_BUF+0x20, 0x7D1000A0, 4);	// Intermediate IV
	SBLK_SetFifo(8, 4, 8, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo(GOLDEN_BUF+0x20, 8);

	while(!SBLK_IsFifoTransDone());

	SBLK_GetDataFromTxFifo(INPUT_BUF+0x20, 8);
	//Copy((u32)uAesPlainText, GOLDEN_BUF, 16);
	uRet = Compare(INPUT_BUF+0x20, GOLDEN_BUF1+0x20, 8);

	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		DispOperMode(eAesOperMode);
		Disp("_IV_2nd_DEC Success..\n");
		}
		else
		{
		Disp("AES");
		DispOperMode(eAesOperMode);
		Disp("_IV_2nd_DEC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				printf("_IV_2nd_DEC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}
	
}

void Test_CTR_Counter(eFunction_Test eTest, oFunctionT_AutoVar oAutoVar)
{
	u32 uRet;

	//g_sblock_err =0;

	if(eTest == eTest_Manual)
	{
		printf("[SBLOCK - AES(CTR) Counter Edge Test]\n");

		printf(" Choose AES Key Select :  0 : 128bit,  1:192bit,  2:256bits \n");
		g_AES_Key = GetIntNum();
		
	}
	else
	{
		g_AES_Key = oAutoVar.Test_Parameter[0];
	}

	 switch(g_AES_Key)
	 	{
		case 0:
	 		Copy((u32)uAesCTRCipherText, GOLDEN_BUF, 16);
	 		Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
		   
			 break;
		case 1:
			Copy((u32)uAesCTRCipherText+0x40, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	
		case 2:
			Copy((u32)uAesCTRCipherText+0xc0, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	 	}

	// Encryption
	//SBLK_Init(AES, CBC, ENC);
	SBLK_Init_Test3(AES, CTR, ENC);
	SBLK_SetFifo(16, 4, 16, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo((u32)uAesPlainText, 16);
	
	while(!SBLK_IsFifoTransDone());

	// Intermediate IV Back-up
	
	SBLK_GetDataFromTxFifo(OUTPUT_BUF, 16);
	
	//Copy((u32)uAesCipherText[CBC], GOLDEN_BUF, 16);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 16);
	
	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		Disp("_CTR_Counter1_ENC Success..\n");
		}
		else
		{
		Disp("AES");
		Disp("_CTR_Counter1_ENC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				Disp("_CTR_Counter1_ENC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}

	// Decryption

	//SBLK_Init(AES, CBC, DEC);
	SBLK_Init_Test3(AES, CTR, ENC);
	SBLK_SetFifo(16, 4,16, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo(GOLDEN_BUF, 16);
	//SBLK_PutDataToRxFifo(OUTPUT_BUF, 16);

	while(!SBLK_IsFifoTransDone());

	// Intermediate IV Back-up
	SBLK_GetDataFromTxFifo(INPUT_BUF, 16);
	//Copy((u32)uAesPlainText, GOLDEN_BUF, 16);
	uRet = Compare(INPUT_BUF, GOLDEN_BUF1, 16);

	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");
		Disp("_CTR_Counter_DEC Success..\n");
		}
		else
		{
		Disp("AES");
		Disp("_CTR_Counter_DEC Failed..\n");
		}
	}
	else
	{
		if(uRet == false)
			{
				Disp("_CTR_Counter_DEC Failed..\n");
				g_sblock_err =1;
				UART_Getc();
			}
	}
	
}

void Test_CTR_ICTR_FIFO(eFunction_Test eTest, oFunctionT_AutoVar oAutoVar)
{
	
	u32 uRet;

	//g_sblock_err =0;

	if(eTest == eTest_Manual)
	{
		printf("[SBLOCK - AES(CTR) INCR FIFO Test]\n");

		printf(" Choose AES Key Select :  0 : 128bit,  1:192bit,  2:256bits \n");
		g_AES_Key = GetIntNum();
		
	}
	else
	{
		g_AES_Key = oAutoVar.Test_Parameter[0];
	}

	 switch(g_AES_Key)
	 	{
		case 0:
	 		Copy((u32)uAesCTRCipherText_, GOLDEN_BUF, 16);
	 		Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
		   
			 break;
		case 1:
			Copy((u32)uAesCTRCipherText_+0x40, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	
		case 2:
			Copy((u32)uAesCTRCipherText_+0x80, GOLDEN_BUF, 16);
			Copy((u32)uAesPlainText, GOLDEN_BUF1, 16);
			 break;
	 	}

	// Encryption
	//SBLK_Init(AES, CBC, ENC);
	SBLK_Init_Test2(AES, CTR, ENC);
	SBLK_SetFifo(8, 4, 8, 4, LASTBYTE_1ST);
	SBLK_StartFifo();
	SBLK_PutDataToRxFifo((u32)uAesPlainText, 8);
	
	while(!SBLK_IsFifoTransDone());

	// Intermediate CTR Back-up
	Copy(0x7D1000B0, MID_BUF, 4);
	SBLK_GetDataFromTxFifo(OUTPUT_BUF, 8);
	
	//Copy((u32)uAesCipherText[CBC], GOLDEN_BUF, 16);
	uRet = Compare(OUTPUT_BUF, GOLDEN_BUF, 8);
	if(eTest == eTest_Manual)
	{
		if (uRet)
		{
		Disp("AES_");