onenand.c

s3c6400 ADS下官方测试程序

	OneNandT_oIntFlag.BlkRwCmpInt = 0;
	OneNandT_oIntFlag.PgmCmpInt = 0;
	
	ONENAND_WriteCmd(Controller, uBlkAddr, uPageAddr, 0x11);
#if 0
	while(!OneNandT_oIntFlag.IntActInt);	//Waiting Interrupt
	while(!OneNandT_oIntFlag.BlkRwCmpInt);	//Waiting Interrupt
	while(!OneNandT_oIntFlag.LoadCmpInt);	//Waiting Interrupt
#else
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<10)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<10));
	while(!OneNandT_oIntFlag.IntActInt);
	
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<7)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<7));
	while(!OneNandT_oIntFlag.BlkRwCmpInt);
	
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<5)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<5));	
	while(!OneNandT_oIntFlag.PgmCmpInt);
#endif
}



//////////
// Function Name : ONENAND_PipelineReadAhead
// Function Description : Initiate a copy of PP pages from the memory to the memory controller
// Input : 	Controller - OneNand Controller Port Number 
//			uBlkAddr - Block Number to write
//			uPageAddr - Page number to write
// Version : v0.1
void ONENAND_PipelineReadAhead(u32 Controller, u32 uBlkAddr, u8 uPageAddr, u8 uPageSize)
{
#if 1
	ONENAND_WriteCmd(Controller, uBlkAddr, uPageAddr, (0x4000|(u16)uPageSize));

	//while(!OneNandT_oIntFlag.IntActInt);
#else
	ONENAND_DirectWrite(Controller, OND_STARTADDR3, uBlkAddr);
	ONENAND_DirectWrite(Controller, OND_STARTADDR4, uPageAddr<<2);
	ONENAND_DirectWrite(Controller, OND_STARTBUF, 0x0800);
	ONENAND_DirectWrite(Controller, OND_STARTADDR1, 0x0800);


#endif
}



//////////
// Function Name : ONENAND_ConfigOTPAccess
// Function Description : Configure the controller to access the OTP area of the flash
// Input : 	Controller - OneNand Controller Port Number 
//			uBlkAddr - Block Number to load
//			uPageAddr - Page number to load
// Version : v0.1
void ONENAND_ConfigOTPAccess(u32 Controller, u32 uBlkAddr, u8 uPageAddr)
{
	OneNandT_oIntFlag.IntActInt = 0;
	
	ONENAND_WriteCmd(Controller, uBlkAddr, uPageAddr, 0x12);
#if 0
	while(!OneNandT_oIntFlag.IntActInt);	//Waiting Interrupt
#else
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<10)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<10));
	while(!OneNandT_oIntFlag.IntActInt);
#endif
}


//////////
// Function Name : ONENAND_ConfigSpareAccess
// Function Description : Configure the controller to access the spare area of the flash
// Input : 	Controller - OneNand Controller Port Number 
//			uBlkAddr - Block Number to load
//			uPageAddr - Page number to load
// Version : v0.1
void ONENAND_ConfigSpareAccess(u32 Controller, u32 uBlkAddr, u8 uPageAddr)
{
	OneNandT_oIntFlag.IntActInt = 0;
	
	ONENAND_WriteCmd(Controller, uBlkAddr, uPageAddr, 0x13);
#if 0
	while(!OneNandT_oIntFlag.IntActInt);	//Waiting Interrupt
#else
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<10)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<10));
	while(!OneNandT_oIntFlag.IntActInt);
#endif
}


//////////
// Function Name : ONENAND_ConfigMainAccess
// Function Description : Configure the controller to access the main area of the flash
// Input : 	Controller - OneNand Controller Port Number 
//			uBlkAddr - Block Number to load
//			uPageAddr - Page number to load
// Version : v0.1
void ONENAND_ConfigMainAccess(u32 Controller, u32 uBlkAddr, u8 uPageAddr)
{
	OneNandT_oIntFlag.IntActInt = 0;
	ONENAND_WriteCmd(Controller, uBlkAddr, uPageAddr, 0x14);
#if 0
	while(!OneNandT_oIntFlag.IntActInt);	//Waiting Interrupt
#else
	//Interrupt肺 背眉 
	//while(!(ONENAND(Controller)->rIntErrStat & (1<<10)));
	//Outp32(&ONENAND(Controller)->rIntErrAck, (1<<10));
	while(!OneNandT_oIntFlag.IntActInt);
#endif
}



//////////
// Function Name : ONENAND_EnableIntPin
// Function Description : Interrupt Pin Enable&Disable
// Input : 	Controller - OneNand Controller Port Number 
//			Enable - 1:Enable, 0: Disable
// Version : v0.1
void ONENAND_EnableIntPin(u32 Controller, u32 Enable)
{
	Outp32(&ONENAND(Controller)->rIntPinEnable, Enable&0x01);
}

//////////
// Function Name : ONENAND_WriteIntoDataram
// Function Description : Write into DataRam(Map00)
// Input : 	Controller - OneNand Controller Port Number 
//			uAddr - XIP buffer Address
//			uData - Data to write
// Version : v0.1
void ONENAND_WriteIntoDataram(u32 Controller, u32 uAddr, u32 uData)
{
	Outp32(OneNAND_BUFFER_BASE[Controller] + ((0x1fffe & uAddr)<<0), uData);
}

//////////
// Function Name : ONENAND_ReadOutDataram
// Function Description : Read from DataRam(Map00)
// Input : 	Controller - OneNand Controller Port Number 
//			uAddr - XIP buffer Address
//			uData - Data to read
// Version : v0.1
void ONENAND_ReadOutDataram(u32 Controller, u32 uAddr, u32 *uData)
{
	*uData = Inp32(OneNAND_BUFFER_BASE[Controller]  + ((0x1fffe & uAddr)<<0));
}

//////////
// Function Name : ONENAND_WriteIntoFlash
// Function Description : Normal high-speed write accesses to the memory array(Map01)
// Input : 	Controller - OneNand Controller Port Number 
//			uBlockAddr - Block Address to write
//			uPageAddr - Page Address to write
//			uData - Data to write
// Version : v0.1
void ONENAND_WriteIntoFlash(u32 Controller, u32 uBlockAddr, u8 uPageAddr, u32 uData)
{
	Outp32(OneNAND_ARRAY_BASE[Controller]  + ((FbaMask[Controller] & uBlockAddr)<<FbaShift[Controller]) +((FpaMask[Controller] & uPageAddr)<<FpaShift[Controller]), uData);
}

//////////
// Function Name : ONENAND_ReadOutFlash
// Function Description : Normal high-speed read accesses to the memory array(Map01)
// Input : 	Controller - OneNand Controller Port Number 
//			uBlockAddr - Block Address to read
//			uPageAddr - Page Address to read
//			uData - Data to read
// Version : v0.1
void ONENAND_ReadOutFlash(u32 Controller, u32 uBlockAddr, u8 uPageAddr, u32 *uData)
{
	*uData = Inp32(OneNAND_ARRAY_BASE[Controller]  + ((FbaMask[Controller] & uBlockAddr)<<FbaShift[Controller]) +((FpaMask[Controller] & uPageAddr)<<FpaShift[Controller]));
}

//////////
// Function Name : ONENAND_WriteCmd
// Function Description : Control the special functions of the memory device(Map10)
// Input : 	Controller - OneNand Controller Port Number 
//			uBlockAddr - Block Address to access
//			uPageAddr - Page Address to access
//			uData - Data to access
// Version : v0.1
void ONENAND_WriteCmd(u32 Controller, u32 uBlockAddr, u8 uPageAddr, u32 uData)
{
	Outp32(OneNAND_CMD_BASE[Controller]  + ((FbaMask[Controller] & uBlockAddr)<<FbaShift[Controller]) +((FpaMask[Controller] & uPageAddr)<<FpaShift[Controller]), uData);
}

//////////
// Function Name : ONENAND_ReadCmd
// Function Description : Control the special functions of the memory device(Map10)
// Input : 	Controller - OneNand Controller Port Number 
//			uBlockAddr - Block Address to access
//			uPageAddr - Page Address to access
//			uData - Data to access
// Version : v0.1
void ONENAND_ReadCmd(u32 Controller, u32 BlockAddr, u8 uPageAddr, u32 *uData)
{
	*uData = Inp32(OneNAND_CMD_BASE[Controller]  + ((FbaMask[Controller] & BlockAddr)<<FbaShift[Controller])+((FpaMask[Controller] & uPageAddr)<<FpaShift[Controller]));
}

//////////
// Function Name : ONENAND_DirectWrite
// Function Description : Direct Memory Access(Map11)
// Input : 	Controller - OneNand Controller Port Number 
//			uDeviceAddr - Memory Device Address
//			uData - Data to write
// Version : v0.1
void ONENAND_DirectWrite(u32 Controller, u32 uDeviceAddr, u32 uData)
{
	Outp32(OneNAND_DIRECT_BASE[Controller]  + uDeviceAddr, uData);
}

//////////
// Function Name : ONENAND_DirectRead
// Function Description : Direct Memory Access(Map11)
// Input : 	Controller - OneNand Controller Port Number 
//			uDeviceAddr - Memory Device Address
//			uData - Data to read
// Version : v0.1
void ONENAND_DirectRead(u32 Controller, u32 uDeviceAddr, u32 *uData)
{
	*uData = Inp32(OneNAND_DIRECT_BASE[Controller]  + uDeviceAddr);
}


//////////
// Function Name : ONENAND_DirectRead_DMA
// Function Description : Direct Memory Access(Map11) using DMA
// Input : 	Controller - OneNand Controller Port Number 
//			uDeviceAddr - Memory Device Address
//			uData - Data to read
// Version : v0.1
#if (OND_TRANS_MODE == OND_DMA)
void ONENAND_DirectRead_DMA(u32 Controller, u32 uDeviceAddr, u32 *uData)
{
	u32 uSrcAddr;

	OneNand_DmaDone = 0;
	uSrcAddr = OneNAND_BUFFER_BASE[Controller]  + ((0x1fffe & uDeviceAddr)<<0);

	DMACH_Setup(DMA_A, 0x0, (u32)uSrcAddr, 0, (u32)uData, 0, WORD, ONENAND_PAGESIZE/4, DEMAND, MEM, MEM, BURST4, &g_oONDDmac0);
				
	DMACH_Start(&g_oONDDmac0);
	while(!OneNand_DmaDone);
}
#endif

//////////
// Function Name : ONENAND_EnableInterrupt
// Function Description : Interrupt Status Enable
// Input : 	Controller - OneNand Controller Port Number 
//			eInterrupt - Interrupt Source
// Version : v0.1
void ONENAND_EnableInterrupt(u32 uController, OneNAND_eINTERROR eInterrupt)
{
	u32 uEnableBit;

	uEnableBit = Inp32(&ONENAND(uController)->rIntErrMask);

	Outp32(&ONENAND(uController)->rIntErrMask, (u32)(uEnableBit | eInterrupt));

#if 0
	if(eInterrupt == eOND_INTACT)
	{
		ONENAND_EnableIOBE(uController, 1);
		Outp32(&ONENAND(uController)->rIntPinEnable, 1);
	}
#endif
}

//////////
// Function Name : ONENAND_EnableAllInterrupt
// Function Description : Interrupt Status All Enable
// Input : 	Controller - OneNand Controller Port Number 
// Version : v0.1
void ONENAND_EnableAllInterrupt(u32 uController)
{
	ONENAND_EnableIOBE(uController, 1);
	Outp32(&ONENAND(uController)->rIntErrMask, (u32)(0x3FFF));
	Outp32(&ONENAND(uController)->rIntPinEnable, 1);	
}

//////////
// Function Name : ONENAND_DisableInterrupt
// Function Description : Interrupt Status Disable
// Input : 	Controller - OneNand Controller Port Number 
//			eInterrupt - Interrupt Source
// Version : v0.1
void ONENAND_DisableInterrupt(u32 uController, OneNAND_eINTERROR eInterrupt)
{
	u32 uDisableBit;

	uDisableBit = Inp32(&ONENAND(uController)->rIntErrMask);
	
	Outp32(&ONENAND(uController)->rIntErrMask, (u32)(uDisableBit & (~eInterrupt)));

	if(eInterrupt == eOND_INTACT)
		Outp32(&ONENAND(uController)->rIntPinEnable, 0);	
}

//////////
// Function Name : ONENAND_DisableAllInterrupt
// Function Description : Interrupt Status All Disable
// Input : 	Controller - OneNand Controller Port Number 
// Version : v0.1
void ONENAND_DisableAllInterrupt(u32 uController)
{
	Outp32(&ONENAND(uController)->rIntErrMask, (u32)(0));

	Outp32(&ONENAND(uController)->rIntPinEnable, 0);
}

//////////
// Function Name : ONENAND_AckInterrupt
// Function Description : Interrupt Status Clear(Ack Interrupt)
// Input : 	Controller - OneNand Controller Port Number 
//			eInterrupt - Interrupt Source
// Version : v0.1
void ONENAND_AckInterrupt(u32 uController, OneNAND_eINTERROR eInterrupt)
{
	Outp32(&ONENAND(uController)->rIntErrAck, (u32)eInterrupt);

	//while((Inp32(&ONENAND(uController)->rIntErrStat) & eInterrupt));	// Wait Interrupt Status Clear
}

//////////
// Function Name : ONENAND_ISR
// Function Description : OneNand IRQ routine
// Input : 	None
// Version : v0.1
void __irq ONENAND_ISR(void)
{
	u32 uController;
	u32 uTemp;

	uTemp = INTC_GetVicIrqStatus(1);
	uTemp = (uTemp&(3<<11))>>11; 
	if(uTemp & 1)
	{
		INTC_Disable(NUM_ONENAND0);
		uController = 0;
	}
	else if(uTemp & 2)
	{
		INTC_Disable(NUM_ONENAND1);
		uController = 1;
	}
	else
	{
		return;
	}

	if(OneNand_ISRCallBack.ONENAND_ISR_Func)
		OneNand_ISRCallBack.ONENAND_ISR_Func(uController);	

	if(uController == 0)
	{
		INTC_Enable(NUM_ONENAND0);
	}
	else if(uController == 1)
	{
		INTC_Enable(NUM_ONENAND1);
	}	
	
	INTC_ClearVectAddr();
}


//////////
// Function Name : ONENAND_EraseBlockDirectAccess
// Function Description : Block Erase using Direct Access
// Input : 	uController - OneNand Controller Port Number 
//			uBlock - Block to erase
//Output : 	TRUE - Erase Error
//			FALSE - Erase Success
// Version : v0.1
bool ONENAND_EraseBlockDirectAccess(u32 uController, u32 uBlock)
{
	u32 uStatus;
	
	ONENAND_DirectWrite(uController, OND_STARTADDR1, (DFS(uBlock) | FBA(uBlock)));
	ONENAND_DirectWrite(uController, OND_INTSTATUS, 0);
	ONENAND_DirectWrite(uController, OND_COMMAND, OND_BLK_ERASE);

	uStatus = 0;
	while(!((uStatus&0xFFFF) & (1<<15)))
	{
		ONENAND_DirectRead(uController, OND_INTSTATUS, &uStatus);
	}

	uStatus = 0;
	ONENAND_DirectRead(uController, OND_STATUS, &uStatus);
	if((uStatus&0xFFFF) & (1<<10))
		return TRUE;
	return FALSE;
}


//////////
// Function Name : ONENAND_WritePageDirectAccess
// Function Description : Page Write using Direct Access
// Input : 	uController - OneNand Controller Port Number 
//			uBlock - Block to write
//			uPage - Page to write
//Output : 	TRUE - Erase Error
//			FALSE - Erase Success
// Version : v0.1
bool ONENAND_WritePageDirectAccess(u32 uController, u32 uBlock, u32 uPage)
{
//	u32 uStatus;

	OneNandT_oIntFlag.IntActInt = 0;
	OneNandT_oIntFlag.BlkRwCmpInt = 0;
	OneNandT_oIntFlag.PgmCmpInt = 0;
	
	ONENAND_DirectWrite(uController, OND_STARTADDR2, DBS(uBlock));
	ONENAND_DirectWrite(uController, OND_STARTADDR1, DFS(uBlock) | FBA(uBlock));
	ONENAND_DirectWrite(uController, OND_STARTADDR8, FPA(uPage) | FSA(0));
	ONENAND_DirectWrite(uController, OND_STARTBUF, BSA(0x8) | BSC(0));
	
	ONENAND_DirectWrite(uController, OND_INTSTATUS, 0);
	ONENAND_DirectWrite(uController, OND_COMMAND, OND_PG_MS_FR_BUF);
#if 0
	uStatus = 0;
	while(!((uStatus&0xFFFF) & (1<<15)))
	{
		ONENAND_DirectRead(uController, OND_INTSTATUS, &uStatus);
	}

	uStatus = 0;
	ONENAND_DirectRead(uController, OND_STATUS, &uStatus);
	if((uStatus&0xFFFF) & (1<<12))
		return TRUE;
	return FALSE;
#endif	
	while(!OneNandT_oIntFlag.IntActInt);
	
	while(!OneNandT_oIntFlag.BlkRwCmpInt);
	
	while(!OneNandT_oIntFlag.PgmCmpInt);

	return FALSE;	
}


//////////
// Function Name : ONENAND_ReadPageDirectAccess
// Function Description : Page Read using Direct Access
// Input : 	uController - OneNand Controller Port Number 
//			uBlock - Block to read
//			uPage - Page to read
//Output : 	TRUE - Erase Error
//			FALSE - Erase Success
// Version : v0.1
bool ONENAND_ReadPageDirectAccess(u32 uController, u32 uBlock, u32 uPage)
{
//	u32 uStatus;

	OneNandT_oIntFlag.IntActInt = 0;
	OneNandT_oIntFlag.BlkRwCmpInt = 0;
	OneNandT_oIntFlag.LoadCmpInt = 0;
	
	ONENAND_DirectWrite(uController, OND_STARTADDR1, DFS(uBlock) | FBA(uBlock));
	ONENAND_DirectWrite(uController, OND_STARTADDR8, FPA(uPage) | FSA(0));
	ONENAND_DirectWrite(uController, OND_STARTBUF, BSA(0x8) | BSC(0));
	ONENAND_DirectWrite(uController, OND_STARTADDR2, DBS(uBlock));
	
	ONENAND_DirectWrite(uController, OND_INTSTATUS, 0);
	ONENAND_DirectWrite(uController, OND_COMMAND, OND_LD_MS_TO_BUF);

#if 0
	uStatus = 0;
	while(!((uStatus&0xFFFF) & (1<<15)))
	{
		ONENAND_DirectRead(uController, OND_INTSTATUS, &uStatus);
	}

	uStatus = 0;
	ONENAND_DirectRead(uController, OND_STATUS, &uStatus);
	if((uStatus&0xFFFF) & (1<<13))
		return TRUE;
	return FALSE;
#endif
	while(!OneNandT_oIntFlag.IntActInt);
	
	while(!OneNandT_oIntFlag.BlkRwCmpInt);
	
	while(!OneNandT_oIntFlag.LoadCmpInt);	

	return FALSE;
}