📄 sromc_test.c

📁 s3c6400 ADS下官方测试程序
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// Function Description : Memory Subsystem Test(EBI Test)
//						1. DMC0				
//						2. SROMC using SRAM	: nCS1
//						3. NAND Flash			: nCS2
// Input : 	None
// Output :	None 
// Version : v0.1
extern void NANDT_Init(void);
void SMC_TestEBIUsingNAND(void)
{
	u32 uLoopCnt = 0;
	u32 uBlock = 0;
	u32 uPage = 0;
	u32 uTempAddr = 0;

	SYSC_CtrlEBIPrio(eEBI_FIX4);
#if (SMC_UDMA_TEST==1)
	//-------- CF Card Setting ----------------
	if (!ATA_Init(ATA_CON0, DIRECT_MODE))
	{
		Disp("Fail to initialize ATA Mode...\n");
		return;
	}
	DelayfrTimer(milli, 100);
	ATA_IdentifyDevice(ATA_CON0);	
	DelayfrTimer(milli, 100);
	ATA_OpenMedia(ATA_CON0, eATA_MODE_UDMA);
#endif	
#if (SMC_NAND_DMA_TEST==1)
	//-------- Nand Flash setting --------------
	for(uLoopCnt=0 ; uLoopCnt<NAND_DATA_SIZE ; uLoopCnt++)
		*(unsigned char *)(0x52000000+uLoopCnt) = eATA_XFR_CMD_START;
	for(uLoopCnt=0 ; uLoopCnt<NAND_SPARE_16 ; uLoopCnt++)
		aSpareBuffer[uLoopCnt] = 0xFF;

	uBlock = 50;
	uPage = 0;

	NANDT_Init();

	NAND_WritePageSLCSetup(0, uBlock, uPage);
	Nand_DmaTestDone = 0;
	EBI_SetDMAParams(eMEM_NAND); 
	// Set LLI parameters for DMA loop operation
	SMC_SetLLI(g_oaEBIInform[eMEM_NAND].uSrcAddr, g_oaEBIInform[eMEM_NAND].uDstAddr, 
				(DATA_SIZE)g_oaEBIInform[eMEM_NAND].eDataSz , (BURST_MODE)g_oaEBIInform[eMEM_NAND].eBurstMode, g_oaEBIInform[eMEM_NAND].uDataCnt);
#endif 

#if (SMC_SRAM_DMA_TEST==1)
	//-------- SROMC(SRAM) setting --------------
	EBI_SetDMAParams(eMEM_SROMC);

	uTempAddr = g_oaEBIInform[eMEM_SROMC].uDstAddr;
	for(uLoopCnt=0 ; uLoopCnt<SRAM_DATA_SIZE ; uLoopCnt++)
		*(volatile u32*)(uTempAddr+4) = 0;
       
#endif

#if (SMC_SRAM_DMA_TEST==1)
	DMACH_Start(&g_oaEBIInform[eMEM_SROMC].oEBIDma);	// SROMC DMA Start
#endif	
#if (SMC_NAND_DMA_TEST==1)
	DMACH_Start(&g_oaEBIInform[eMEM_NAND].oEBIDma);	// NAND DMA Start
#endif
#if (SMC_UDMA_TEST==1)
	ATA_TestUDmaMode_Int_for_EBI();
#endif
#if (SMC_NAND_DMA_TEST==1)
	while(1)
	{
		if(Getc()=='x')
		{
			break;
		}
	}
	while(!Nand_DmaTestDone);	

	NAND_WritePageSLCClose(0, aSpareBuffer);
#endif
#if (SMC_UDMA_TEST==1)
	ATA_CloseMedia(ATA_CON0);
	ATA_SetEnable(ATA_CON0, DISABLE);
	CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);
#endif
//	EBI_CloseDMA(eMEM_DMC0);
#if (SMC_SRAM_DMA_TEST==1)
	EBI_CloseDMA(eMEM_SROMC);
#endif
#if (SMC_NAND_DMA_TEST==1)
	EBI_CloseDMA(eMEM_NAND);
#endif

}

//////////
// Function Name : SMC_TestATAResetBug
// Function Description : Memory Subsystem Test(EBI Test)
//						1. DMC0				
//						2. SROMC using SRAM	: nCS1
//						3. NAND Flash			: nCS2
// Input : 	None
// Output :	None 
// Version : v0.1
void SMC_TestATAResetBug(void)
{
	u32 uLoopCnt = 0;
	u32 uBlock = 0;
	u32 uPage = 0;
	u32 uTempAddr = 0;

	SYSC_CtrlEBIPrio(eEBI_FIX4);
#if (SMC_NAND_DMA_TEST==1)
	//-------- Nand Flash setting --------------
	for(uLoopCnt=0 ; uLoopCnt<NAND_DATA_SIZE ; uLoopCnt++)
		*(unsigned char *)(0x52000000+uLoopCnt) = eATA_XFR_CMD_START;
	for(uLoopCnt=0 ; uLoopCnt<NAND_SPARE_16 ; uLoopCnt++)
		aSpareBuffer[uLoopCnt] = 0xFF;

	uBlock = 50;
	uPage = 0;

	NANDT_Init();

	NAND_WritePageSLCSetup(0, uBlock, uPage);
	Nand_DmaTestDone = 0;
	EBI_SetDMAParams(eMEM_NAND); 
	// Set LLI parameters for DMA loop operation
	SMC_SetLLI(g_oaEBIInform[eMEM_NAND].uSrcAddr, g_oaEBIInform[eMEM_NAND].uDstAddr, 
				(DATA_SIZE)g_oaEBIInform[eMEM_NAND].eDataSz , (BURST_MODE)g_oaEBIInform[eMEM_NAND].eBurstMode, g_oaEBIInform[eMEM_NAND].uDataCnt);
#endif 

#if (SMC_SRAM_DMA_TEST==1)
	//-------- SROMC(SRAM) setting --------------
	EBI_SetDMAParams(eMEM_SROMC);

	uTempAddr = g_oaEBIInform[eMEM_SROMC].uDstAddr;
	for(uLoopCnt=0 ; uLoopCnt<SRAM_DATA_SIZE ; uLoopCnt++)
		*(volatile u32*)(uTempAddr+4) = 1;
       
#endif

#if (SMC_SRAM_DMA_TEST==1)
	DMACH_Start(&g_oaEBIInform[eMEM_SROMC].oEBIDma);	// SROMC DMA Start
#endif	
#if (SMC_NAND_DMA_TEST==1)
	DMACH_Start(&g_oaEBIInform[eMEM_NAND].oEBIDma);	// NAND DMA Start
#endif
#if (SMC_UDMA_TEST==1)
	while(1)
	{
		ATA_SetRst( 0, NORESET);		// ata device reset.	
		Disp("*");
	}
#endif


}

void SMC_TestEBIUsingOneNAND(void)
{
	u32 uLoopCnt = 0;
	u32 uStartBlock = 0;
	u32 uStartPage = 0;

	SYSC_CtrlEBIPrio(eEBI_FIX4);

	//-------- CF Card Setting ----------------
	ATA_Init(ATA_CON0, DIRECT_MODE);
	ATA_OpenMedia(ATA_CON0, eATA_MODE_UDMA);
	
	Getc();	
#if 1
	//-------- OneNand setting --------------
	for(uLoopCnt=0; uLoopCnt<ONENAND_PAGESIZE/4; uLoopCnt++)
		aReadData[uLoopCnt] = 0;
	
	uStartBlock	=	0;
	uStartPage	=	1;

//	OneNANDT_Init();
//	g_uOneNANDSrcAddr = OneNandT_MemoryReadSetup(0,uStartBlock, uStartPage);

	printf("\n");
	printf("[%d block, %d page]", uStartBlock, uStartPage);
	for(uLoopCnt=0 ; uLoopCnt<ONENAND_PAGESIZE/4 ; uLoopCnt++)
	{
		if(!(uLoopCnt%4))
		{
			printf("\n");
			printf("0x%04x : ",uLoopCnt*4);
		}
		printf("0x%08x  ", aReadData[uLoopCnt]);
	}
	printf("\n");
	
#else
#endif
	EBI_SetDMAParams(eMEM_OneNAND);
	DMACH_Start(&g_oaEBIInform[eMEM_OneNAND].oEBIDma);	// OneNAND DMA Start
#if 0
	EBI_SetDMAParams(eMEM_DMC0);
	EBI_SetDMAParams(eMEM_SROMC);
	EBI_SetDMAParams(eMEM_OneNAND);

        // Enable DMAs
	DMACH_Start(&g_oaEBIInform[eMEM_DMC0].oEBIDma);	// DMC0 	DMA Start
	DMACH_Start(&g_oaEBIInform[eMEM_SROMC].oEBIDma);	// SROMC DMA Start
	DMACH_Start(&g_oaEBIInform[eMEM_OneNAND].oEBIDma);	// OneNAND DMA Start
#endif
//	ATA_TestUDmaMode_Int_for_EBI();
	while(1)
	{
		if(Getc()=='x')
		{
			break;
		}
	}

	ATA_CloseMedia(ATA_CON0);
	ATA_SetEnable(ATA_CON0, DISABLE);
	CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);

//	NAND_ReadPageSLCClose(0, aSpareBuffer);
	EBI_CloseDMA(eMEM_DMC0);
	EBI_CloseDMA(eMEM_SROMC);
	EBI_CloseDMA(eMEM_OneNAND);

}

void SMC_TestEBI(void)
{
	u32 uLoopCnt = 0;

	SYSC_CtrlEBIPrio(eEBI_FIX4);

	//-------- Nand Flash setting --------------
	for(uLoopCnt=0 ; uLoopCnt<NAND_DATA_SIZE ; uLoopCnt++)
		aBuffer[uLoopCnt] = eATA_XFR_CMD_ABORT;
	for(uLoopCnt=0 ; uLoopCnt<NAND_SPARE_16 ; uLoopCnt++)
		aSpareBuffer[uLoopCnt] = 0xFF;
#if 1
	//-------- CF Card Setting ----------------
	if (!ATA_Init(ATA_CON0, DIRECT_MODE))
	{
		Disp("Fail to initialize ATA Mode...\n");
		return;
	}
	DelayfrTimer(milli, 100);
	ATA_IdentifyDevice(ATA_CON0);	
	DelayfrTimer(milli, 100);
	ATA_OpenMedia(ATA_CON0, eATA_MODE_UDMA);
#endif	

        // Enable DMAs
//	DMACH_Start(&g_oaEBIInform[eMEM_DMC0].oEBIDma);	// DMC0 	DMA Start
//	DMACH_Start(&g_oaEBIInform[eMEM_SROMC].oEBIDma);	// SROMC DMA Start
	DMACH_Start(&g_oaEBIInform[eMEM_NAND].oEBIDma);	// NAND DMA Start

	ATA_TestUDmaMode_Int_for_EBI();
	ATA_TestPDmaMode_Int_for_EBI(); 
	while(1)
	{
		if(Getc()=='x')
		{
			break;
		}
	}

	ATA_CloseMedia(ATA_CON0);
	ATA_SetEnable(ATA_CON0, DISABLE);
	CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);

//	NAND_ReadPageSLCClose(0, aSpareBuffer);
//	EBI_CloseDMA(eMEM_DMC0);
//	EBI_CloseDMA(eMEM_SROMC);
//	EBI_CloseDMA(eMEM_NAND);

}

//////////
// Function Name : SMC_SetLLI 
// Function Description : This function set the DMA LLI feature for NAND DMA operation
// Input : 	uSrcAddr - Source Address of Data
//			uDstAddr - Dest Address of Data
//			eTransferWidth - BYTE/HWORD/WORD
//			eBurst	- Burst mode
//			uDataCnts - data number which user inputs
// Output : 	None
// Version : v0.1
void SMC_SetLLI(u32 uSrcAddr, u32 uDstAddr, DATA_SIZE eTransferWidth, BURST_MODE eBurst, u32 uDataCnts)
{
	u32	*pLLI_Base = NULL;
	u32	uLoopCnt = 0; 
	u32	uOneTimeTxDataSize = 0;
	u32	uTotTxDataSize		= 0;
	u32	uMaxLoopCnt 		= 0;

	uOneTimeTxDataSize 	= eTransferWidth*DMAT_GetBurstSize(eBurst);
	uTotTxDataSize		= eTransferWidth*uDataCnts;
	uMaxLoopCnt 			= (uTotTxDataSize%uOneTimeTxDataSize == 0) ? uTotTxDataSize/uOneTimeTxDataSize : (uTotTxDataSize/uOneTimeTxDataSize + 1);

	pLLI_Base = (u32 *)g_uLLIBaseAddr;

	for(uLoopCnt=0 ; uLoopCnt<uMaxLoopCnt; uLoopCnt++)
	{
		*pLLI_Base++ = uSrcAddr + (uLoopCnt*uOneTimeTxDataSize);
		*pLLI_Base++ = uDstAddr;		// NAND Data Register
		*pLLI_Base++ = (g_uLLIBaseAddr + ((uLoopCnt+1)*0x20));
		*pLLI_Base++ = (eFIX<<27) | (eINCREMENT<<26) | (1<<25) | (0<<24) | ((eTransferWidth>>1)<<21)|((eTransferWidth>>1)<<18)|
						(eBurst<<15)|(eBurst<<12);
		*pLLI_Base++ = uOneTimeTxDataSize;
		pLLI_Base += 3;
	}

	*pLLI_Base++ = uSrcAddr + (uLoopCnt*uOneTimeTxDataSize);
	*pLLI_Base++ = uDstAddr;			// NAND Data Register
//	*pLLI_Base++ = 0;				// 	Finish LLI operation
	*pLLI_Base++ = g_uLLIBaseAddr;		// 	Loop DMA LLI operation
	*pLLI_Base++ = (1<<31) | (eFIX<<27) | (eINCREMENT<<26) | (1<<25) | (0<<24) | ((eTransferWidth>>1)<<21)|((eTransferWidth>>1)<<18)|(eBurst<<15)|(eBurst<<12);
	*pLLI_Base++ = uOneTimeTxDataSize;
}

void SMC_TestATABug(void)
{
	u32 uLoopCnt = 0;

	SYSC_CtrlEBIPrio(eEBI_FIX4);

#if (SMC_UDMA_TEST==1)
	//-------- CF Card Setting ----------------
	if (!ATA_Init(ATA_CON0, DIRECT_MODE))
	{
		Disp("Fail to initialize ATA Mode...\n");
		return;
	}
	DelayfrTimer(milli, 100);
	ATA_IdentifyDevice(ATA_CON0);	
	DelayfrTimer(milli, 100);
	ATA_OpenMedia(ATA_CON0, eATA_MODE_UDMA);
#endif	

#if (SMC_NAND_DMA_TEST==1)
	//-------- Nand Flash setting --------------
	for(uLoopCnt=0 ; uLoopCnt<NAND_DATA_SIZE ; uLoopCnt++)
		*(unsigned char *)(0x52000000+uLoopCnt) = eATA_XFR_CMD_START;
	for(uLoopCnt=0 ; uLoopCnt<NAND_SPARE_16 ; uLoopCnt++)
		aSpareBuffer[uLoopCnt] = 0xFF;

//	NANDT_Init();
#endif	

#if (SMC_NAND_DMA_TEST==1)
//	NAND_WritePageSLCSetup(0, uBlock, uPage);
	Nand_DmaTestDone = 0;
	EBI_SetDMAParams(eMEM_NAND); 
	// Set LLI parameters for DMA loop operation
	SMC_SetLLI(g_oaEBIInform[eMEM_NAND].uSrcAddr, g_oaEBIInform[eMEM_NAND].uDstAddr, 
				(DATA_SIZE)g_oaEBIInform[eMEM_NAND].eDataSz , (BURST_MODE)g_oaEBIInform[eMEM_NAND].eBurstMode, g_oaEBIInform[eMEM_NAND].uDataCnt);

	DMACH_Start(&g_oaEBIInform[eMEM_NAND].oEBIDma);	// NAND DMA Start
#endif	

#if (SMC_UDMA_TEST==1)
	ATA_TestUDmaMode_Int_for_EBI();
#endif	

#if (SMC_NAND_DMA_TEST==1)
	while(1)
	{
		if(Getc()=='x')
		{
//			EBI_CloseDMA(eMEM_NAND);
			Disp("Nand_DmaTestDone Count : %d\n", Nand_DmaTestDone);
			break;
		}
	}	
	while(!Nand_DmaTestDone);	
	
//	NAND_WritePageSLCClose(0, aSpareBuffer);
	EBI_CloseDMA(eMEM_NAND);
#endif	

#if (SMC_UDMA_TEST==1)
	ATA_CloseMedia(ATA_CON0);
	ATA_SetEnable(ATA_CON0, DISABLE);
	CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);
#endif

}
///////////////////////////////////////////////////////////////////////////////////
////////////////////                    SMC Main Test                  /////////////////////////// 
///////////////////////////////////////////////////////////////////////////////////

const testFuncMenu smc_menu[] =
{
		0,                      	"Exit",
		AMD_Test,					"NorFlash(AM29LVxxx) Test",
		SRAM_Test,					"SRAM Test",
		ProgramAM29F800,			"ProgramAM29F800",
		CS8900_Test,				"CS8900 Test",
		SMC_TestEBIUsingNAND,		"Test Memory Subsystem(EBI) Using NAND",
		SMC_TestATABug,				"Test ATA Bug",
		SMC_TestATAResetBug,		"Test ATA Reset Bug Test Using NAND",
		0,0
};

void EBI_Test(void)
{
	*(volatile u32*)(0x50200010) = 0x55555555;
	*(volatile u32*)(0x50200014) = 0xaaaaaaaa;
	*(volatile u32*)(0x50200018) = 0xffffffff;
	*(volatile u32*)(0x5020001C) = 0x11111111;

	*(volatile u32*)(0x7030193C) = 0x5a5a5a5a;	
	
	EBI_Test_Assem();

}

void SMC_Test(void)
{
	u32 i;
	s32 uSel;

	printf("[DMC_Test]\n\n");
	

	while(1)
	{
		for (i=0; (u32)(smc_menu[i].desc)!=0; i++)
			printf("%2d: %s\n", i, smc_menu[i].desc);

		printf("\nSelect the function to test : ");
		uSel =GetIntNum();
		printf("\n");
		if(uSel == -1) 
			break;
		if (uSel==0)
			break;
		if (uSel>=0 && uSel<(sizeof(smc_menu)/8-1))
			(smc_menu[uSel].func) ();
	}
}
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