onenand_test.c

s3c6400 ADS下官方测试程序

/**************************************************************************************
* 
*	Project Name : S3C6400 Validation
*
*	Copyright 2006 by Samsung Electronics, Inc.
*	All rights reserved.
*
*	Project Description :
*		This software is only for validating functions of the S3C6400.
*		Anybody can use this software without our permission.
*  
*--------------------------------------------------------------------------------------
* 
*	File Name : onenand_test.c
*  
*	File Description : This file implements the functons for OneNand controller test.
*
*	Author : Heemyung.noh
*	Dept. : AP Development Team
*	Created Date : 2006/11/10
*	Version : 0.1 
* 
*	History
*	- Created(Heemyung.noh 2006/11/10)
*  
**************************************************************************************/

#include <stdio.h>
#include <stdlib.h>

#include "def.h"
#include "option.h"
#include "library.h"
#include "sfr6400.h"
#include "system.h"
#include "sysc.h"
#include "intc.h"
#include "onenand.h"
#include "dma.h"
#include "timer.h"

#define ONENAND0	0
#define ONENAND1	1

#define ONDT_DATARAM0				(0x200*4)
#define ONENANDT_FULLBLOCKERASE		(FALSE)

#define ONDT_ISR_DEBUG			(FALSE)

#define ONDT_ASYNC				(0)
#define ONDT_SYNC				(1)

#define ONDT_CONTINUE				(0)
#define ONDT_BURST4				(1)
#define ONDT_BURST8				(2)
#define ONDT_BURST16				(3)
#define ONDT_BURST32				(4)

u32 g_OneNandContNum;

extern volatile ONENAND_oInform	OneNand_Inform[2];
extern OneNandT_oInterruptFlag 	OneNandT_oIntFlag; 
void *OneNandT_ISRCallBack = 0;

//extern u32 OneNand_DmaDone;
//extern DMAC g_oONDDmac0;

//////////
// Function Name : OneNandT_DevInformDisplay
// Function Description : Display the information of OneNand Memory device
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_DevInformDisplay(u32 uController)
{
	u32	uManufID, uDeviceID, uDataBufSize, uBootBufSize, uAmountOfBuf, uTechnology;
	float fFlashClcok;
	
	uManufID = OneNand_Inform[uController].uManufID;
	uDeviceID = OneNand_Inform[uController].uDeviceID;
	uDataBufSize = OneNand_Inform[uController].uDataBufSize;
	uBootBufSize = OneNand_Inform[uController].uBootBufSize;
	uAmountOfBuf = OneNand_Inform[uController].uAmountOfBuf;
	uTechnology = OneNand_Inform[uController].uTechnology;
	fFlashClcok = (float)OneNand_Inform[uController].uFlashClock/(float)1000000;
	
	UART_Printf("OneNand Core Clock : %.04fMHz\n", fFlashClcok);
	UART_Printf("OneNand Interface Clock : %.04fMHz\n", fFlashClcok/2);
	UART_Printf("\n");
	UART_Printf("Manufacturer ID : 0x%04x\n", uManufID);
	UART_Printf("Device ID Reg.: 0x%04x\n", uDeviceID);
	switch((uDeviceID & 0xF0)>>4)
	{
		case 0	:	UART_Printf("Density of OneNand : 128Mb\n");
					break;
		case 1	: 	UART_Printf("Density of OneNand : 256Mb\n");
					break;
		case 2	: 	UART_Printf("Density of OneNand : 512Mb\n");
					break;
		case 3	: 	UART_Printf("Density of OneNand : 1Gb\n");
					break;
		case 4	: 	UART_Printf("Density of OneNand : 2Gb\n");
					break;
		case 5	: 	UART_Printf("Density of OneNand : 4Gb\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}
	switch((uDeviceID & 0x8)>>3)
	{
		case 0	:	UART_Printf("DDP : Single Data Path\n");
					break;
		case 1	: 	UART_Printf("DDP : Dual Data Path\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}	
	switch((uDeviceID & 0x4)>>2)
	{
		case 0	:	UART_Printf("Type : Muxed OneNand\n");
					break;
		case 1	: 	UART_Printf("Type : Demuxed OneNand\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}
	
	UART_Printf("Data Buffer Size : 0x%x\n", uDataBufSize);
	UART_Printf("Boot Buffer Size : 0x%x\n", uBootBufSize);
	UART_Printf("Number of Data Buffer Register : %d\n", uAmountOfBuf>>8);
	UART_Printf("Number of Boot Buffer Register : %d\n", uAmountOfBuf&0xFF);
	UART_Printf("Technology : 0x%04x\n", uTechnology);
	UART_Printf("\n\n");
}



//////////
// Function Name : OneNandT_DisplayInterfaceCondition
// Function Description : Display the information of OneNand Interface Condition
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_DisplayInterfaceCondition(u32 uController)
{
	u32	uMemConfig, uReadMode, uBurstLatency, uBurstLength, uWriteMode, uBurstLenDevice;
	float fFlashClcok;
	
	uMemConfig = ONENAND_GetMemCfg(uController);
	uReadMode = (uMemConfig & (1<<15))>>15;
	uBurstLatency = (uMemConfig & (7<<12))>>12;
	uBurstLength = (uMemConfig & (7<<9))>>9;
	uWriteMode = (uMemConfig & (1<<1))>>1;
	uBurstLenDevice = ONENAND_GetBurstLength(uController);
	
	fFlashClcok = (float)OneNand_Inform[uController].uFlashClock/(float)1000000;
	
	UART_Printf("OneNand Core Clock : %.04fMHz\n", fFlashClcok);
	UART_Printf("OneNand Interface Clock : %.04fMHz\n", fFlashClcok/2);
	UART_Printf("\n");
	switch(uReadMode)
	{
		case 0	:	UART_Printf("Read Mode     : Asynchronous\n");
					break;
		case 1	: 	UART_Printf("Read Mode     : Synchronous\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}
	switch(uWriteMode)
	{
		case 0	:	UART_Printf("Write Mode    : Asynchronous\n");
					break;
		case 1	: 	UART_Printf("Write Mode    : Synchronous\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}
	
	UART_Printf("Burst Latency : %d\n", uBurstLatency);
	
	switch(uBurstLength)
	{
		case 0	:	UART_Printf("Burst Length  : Continuous\n");
					break;
		case 1	: 	UART_Printf("Burst Length  : 4 halfwords\n");
					break;
		case 2	: 	UART_Printf("Burst Length  : 8 halfwords\n");
					break;
		case 3	: 	UART_Printf("Burst Length  : 16 halfwords\n");
					break;
		case 4	: 	UART_Printf("Burst Length  : 32 halfwords\n");
					break;
		case 5	: 	UART_Printf("Burst Length  : 1K halfwords\n");
					break;
		default	:	UART_Printf("Reserved\n");
					break;
	}

	UART_Printf("Burst Length(Device) : %d\n", uBurstLenDevice);
}


///////////////////////////////////////////////////////////////////////////////////
///////////////////                     Interrupt ISR Routine                ///////////////////////// 
//////////////////////////////////////////////////////////////////////////////////

//////////
// Function Name : OneNandT_ISR_LdFailEccErr
// Function Description : OneNand IRQ routine(Load Operation Fail or ECC Error)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_LdFailEccErr(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_LDFAILECCERR);
//#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENANDT_ISR_LdFailEccErr(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.LdFailEccErrInt = 1;
}

//////////
// Function Name : OneNandT_ISR_IntTo
// Function Description : OneNand IRQ routine(Interrupt Time-out)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_IntTo(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_INTTO);
//#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_IntTo(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.IntToInt = 1;

}

//////////
// Function Name : OneNandT_ISR_PgmFail
// Function Description : OneNand IRQ routine(Program Operation Fail)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_PgmFail(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_PGMFAIL);
//#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_PgmFail(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.PgmFailInt = 1;
}

//////////
// Function Name : OneNandT_ISR_ErsFail
// Function Description : OneNand IRQ routine(Erase Operation Fail)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_ErsFail(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_ERSFAIL);
//#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_ErsFail(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.ErsFailInt = 1;
}


//////////
// Function Name : OneNandT_ISR_LoadCmp
// Function Description : OneNand IRQ routine(Load Operation has been completed)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_LoadCmp(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_LOADCMP);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_LoadCmp(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.LoadCmpInt = 1;

}

//////////
// Function Name : OneNandT_ISR_PgmCmp
// Function Description : OneNand IRQ routine(Program Operation has been completed)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_PgmCmp(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_PGMCMP);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_PgmCmp(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.PgmCmpInt = 1;
}

//////////
// Function Name : OneNandT_ISR_ErsCmp
// Function Description : OneNand IRQ routine(Erase Operation has been completed)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_ErsCmp(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_ERSCMP);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_ErsCmp(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.ErsCmpInt = 1;

}

//////////
// Function Name : OneNandT_ISR_BlkRwCmp
// Function Description : OneNand IRQ routine(Teh Block read or write transfer has been completed)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_BlkRwCmp(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_BLKRWCMP);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_BlkRwCmp(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.BlkRwCmpInt = 1;
}

//////////
// Function Name : OneNandT_ISR_LockedBlk
// Function Description : OneNand IRQ routine(The address to program or erase is in a protected block)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_LockedBlk(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_LOCKEDBLK);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_LockedBlk(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.LockedBlkInt = 1;

}

//////////
// Function Name : OneNandT_ISR_UnsupCmd
// Function Description : OneNand IRQ routine(Unsupported command)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_UnsupCmd(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_UNSUPCMD);
//#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_UnsupCmd(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.UnsupCmdInt = 1;

}

//////////
// Function Name : OneNandT_ISR_IntAct
// Function Description : OneNand IRQ routine(Device's INT pin is actively transitioning)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_IntAct(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_INTACT);
//#if (ONDT_ISR_DEBUG)
//	UART_Printf("[ONENAND_ISR_IntAct(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.IntActInt = 1;
	OneNandT_oIntFlag.IntActInt_Count ++;
}

//////////
// Function Name : OneNandT_ISR_RdyAct
// Function Description : OneNand IRQ routine(Device's RDY pin is actively transitioning)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_RdyAct(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_RDYACT);
//#if (ONDT_ISR_DEBUG)	
//	UART_Printf("[ONENAND_ISR_RdyAct(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.RdyActInt = 1;
}

//////////
// Function Name : OneNandT_ISR_RstCmp
// Function Description : OneNand IRQ routine(Reset and Initialization has been completed)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_RstCmp(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_RSTCMP);
//#if (ONDT_ISR_DEBUG)
//	UART_Printf("[ONENAND_ISR_RstCmp(%d)]\n",uController);
//#endif
	OneNandT_oIntFlag.RstCmpInt = 1;
}


//////////
// Function Name : OneNandT_ISR_CacheOpErr
// Function Description : OneNand IRQ routine(An error occurred during a cache read or write setup or operation)
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_CacheOpErr(u32 uController)
{
	ONENAND_AckInterrupt(uController, (OneNAND_eINTERROR)eOND_CACHEOPERR);
#if (ONDT_ISR_DEBUG)
	UART_Printf("[ONENAND_ISR_CacheOpErr(%d)]\n",uController);
#endif
	OneNandT_oIntFlag.CacheOpErrInt = 1;

}


//////////
// Function Name : OneNandT_ISR_Handler
// Function Description : OneNand IRQ Main Routine
// Input : 	uController - OneNand Controller Number
// Version : v0.1
void OneNandT_ISR_Handler(u32 uController)
{
	u32 uInterrupt;
	
	uInterrupt = ONENAND_GetInterruptStatus(uController);
	uInterrupt &= ONENAND_GetInterruptMask(uController);		//Enabled Interrupt Check

	if(uInterrupt & (eOND_LDFAILECCERR))
	{
		OneNandT_ISR_LdFailEccErr(uController);			
	}
	else if(uInterrupt & (eOND_INTTO))
	{
		OneNandT_ISR_IntTo(uController);			
	}
	else if(uInterrupt & (eOND_PGMFAIL))
	{
		OneNandT_ISR_PgmFail(uController);			
	}
	else if(uInterrupt & (eOND_ERSFAIL))
	{
		OneNandT_ISR_ErsFail(uController);			
	}
	else if(uInterrupt & (eOND_LOADCMP))
	{
		OneNandT_ISR_LoadCmp(uController);			
	}
	else if(uInterrupt & (eOND_PGMCMP))
	{
		OneNandT_ISR_PgmCmp(uController);			
	}
	else if(uInterrupt & (eOND_ERSCMP))
	{
		OneNandT_ISR_ErsCmp(uController);			
	}
	else if(uInterrupt & (eOND_BLKRWCMP))
	{
		OneNandT_ISR_BlkRwCmp(uController);			
	}
	else if(uInterrupt & (eOND_LOCKEDBLK))
	{
		OneNandT_ISR_LockedBlk(uController);			
	}
	else if(uInterrupt & (eOND_UNSUPCMD))
	{
		OneNandT_ISR_UnsupCmd(uController);			
	}
	else if(uInterrupt & (eOND_INTACT))
	{
		OneNandT_ISR_IntAct(uController);			
	}