⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 lcd.h

📁 s3c6400 ADS下官方测试程序
💻 H
📖 第 1 页 / 共 3 页
字号:
#define IN_LOCAL_YUV            (1<<13)
#define INRGB_MASK              (1<<13)

// WINCON1,2,3,4 SFR's
#define BITSWP_DISABLE          (0<<18)
#define BITSWP_ENABLE           (1<<18)
#define BYTSWP_DISABLE          (0<<17)
#define BYTSWP_ENABLE           (1<<17)
#define HAWSWP_DISABLE          (0<<16)
#define HAWSWP_ENABLE           (1<<16)

#define MAX_BURSTLEN_16WORD     (0<<9)
#define MAX_BURSTLEN_8WORD      (1<<9)
#define MAX_BURSTLEN_4WORD      (2<<9)

#define MIN_BURSTLEN_16WORD     (0<<11)
#define MIN_BURSTLEN_8WORD      (1<<11)
#define MIN_BURSTLEN_4WORD      (2<<11)

#define BLD_PIX_PLANE           (0<<6)
#define BLD_PIX_PIXEL           (1<<6)
#define BLD_PIX_MASK            (1<<6)

#define BPPMODE_F_1BPP          (0<<2)
#define BPPMODE_F_2BPP          (1<<2)
#define BPPMODE_F_4BPP          (2<<2)
#define BPPMODE_F_8BPP_PAL      (3<<2)
#define BPPMODE_F_8BPP_NOPAL    (4<<2)
#define BPPMODE_F_16BPP_565     (5<<2)
#define BPPMODE_F_16BPP_A555    (6<<2)
#define BPPMODE_F_18BPP_666     (8<<2)
#define BPPMODE_F_24BPP_888     (11<<2)
#define BPPMODE_F_24BPP_A887    (0xc<<2)
#define BPPMODE_F_MASK          (0xf<<2)

// BLEND_SELECT_MODE
#define BLEND_ALPHA0_PLANE      (0<<1)
#define BLEND_ALPHA1_PLANE      (1<<1)

#define BLEND_AEN_PIXEL         (0<<1)
#define BLEND_DATA_PIXEL        (1<<1)

#define ALPHA_SEL_0             ~(1<<1)

#define BLEND_COLORKEY_AREA     (0<<1)

#define BLEND_SEL_MASK          (1<<1)

#define ENWIN_F_DISABLE         (0<<0)
#define ENWIN_F_ENABLE          (1<<0)

#define COLOR_MAP_ENABLE        (1<<24)

// WINDOW POSITION CONTROL A REGISTER
#define OSD_LTX_F(n)            (((n)&0x7FF)<<11)
#define OSD_LTY_F(n)            (((n)&0x7FF)<<0)

// WINDOW POSITION CONTROL B REGISTER
#define OSD_RBX_F(n)            (((n)&0x7FF)<<11)
#define OSD_RBY_F(n)            (((n)&0x7FF)<<0)

// WINDOW0 POSITION CONTROL C REGISTER
#define OSDEN_DISABLE           (0<<24)
#define OSDEN_ENABLE            (1<<24)
#define OSDSIZE(n)              (((n)&0xFFFFFF)<<0)

// WINDOW1,2,3,4 POSITION CONTROL C REGISTER
#define ALPHA0_R(n)             (((n)&0xF)<<20)
#define ALPHA0_G(n)             (((n)&0xF)<<16)
#define ALPHA0_B(n)             (((n)&0xF)<<12)
#define ALPHA1_R(n)             (((n)&0xF)<<8)
#define ALPHA1_G(n)             (((n)&0xF)<<4)
#define ALPHA1_B(n)             (((n)&0xF)<<0)

// Color Key Control Register (W1KEYCON0)
#if 1
#define KEYBLEN_DISABLE         (0<<26)
#else
#define KEYBLEN_DISABLE         ~(1<<26)
#endif
#define KEYBLEN_ENABLE          (1<<26)
#define KEYEN_F_DISABLE         ~(1<<25)
#define KEYEN_F_ENABLE          (1<<25)
#define DIRCON_MATCH_FG_IMAGE   (0<<24)
#define DIRCON_MATCH_BG_IMAGE   (1<<24)

// LCD INTERRUPT CONTROL REGISTER (VIDINTCON)
#define SYSMAINCON_DISABLE      (0<<19)
#define SYSMAINCON_ENABLE       (1<<19)
#define SYSSUBCON_DISABLE       (0<<18)
#define SYSSUBCON_ENABLE        (1<<18)
#define SYSIFDONE_DISABLE       (0<<17)
#define SYSIFDONE_ENABLE        (1<<17)
#define FRAMESEL0_BACK          (0<<15)
#define FRAMESEL0_VSYNC         (1<<15)
#define FRAMESEL0_ACTIVE        (2<<15)
#define FRAMESEL0_FRONT         (3<<15)
#define FRAMESEL1_NONE          (0<<13)
#define FRAMESEL1_BACK          (1<<13)
#define FRAMESEL1_VSYNC         (2<<13)
#define FRAMESEL1_FRONT         (3<<13)
#define INTFRMEN_DISABLE        (0<<12)
#define INTFRMEN_ENABLE         (1<<12)
#define FRAMEINT_MASK           (0x1f<<12)
#define FIFOSEL_WIN4            (1<<11)
#define FIFOSEL_WIN3            (1<<10)
#define FIFOSEL_WIN2            (1<<9)
#define FIFOSEL_WIN1            (1<<6)
#define FIFOSEL_WIN0            (1<<5)
#define FIFOSEL_ALL             (FIFOSEL_WIN0 | FIFOSEL_WIN1 | FIFOSEL_WIN2 | FIFOSEL_WIN3 | FIFOSEL_WIN4)
#define FIFOLEVEL_25            (0<<2)
#define FIFOLEVEL_50            (1<<2)
#define FIFOLEVEL_75            (2<<2)
#define FIFOLEVEL_EMPTY         (3<<2)
#define FIFOLEVEL_FULL          (4<<2)
#define INTFIFOEN_DISABLE       (0<<1)
#define INTFIFOEN_ENABLE        (1<<1)
#define INTEN_DISABLE           (0<<0)
#define INTEN_ENABLE            (1<<0)
#define INTEN_MASK              (1<<0)

#define INTI80PEND_CLEAR        (1<<2)
#define INTFRMPEND_CLEAR        (1<<1)
#define INTFIFOPEND_CLEAR       (1<<0)

// DITHERING CONTROL 1 REGISTER (DITHMODE)
#define RDITHPOS_8BIT           (0<<5)
#define RDITHPOS_6BIT           (1<<5)
#define RDITHPOS_5BIT           (2<<5)
#define GDITHPOS_8BIT           (0<<3)
#define GDITHPOS_6BIT           (1<<3)
#define GDITHPOS_5BIT           (2<<3)
#define BDITHPOS_8BIT           (0<<1)
#define BDITHPOS_6BIT           (1<<1)
#define BDITHPOS_5BIT           (2<<1)
#define RGB_DITHPOS_MASK        (0x3f<<1)
#define DITHERING_DISABLE       (0<<0)
#define DITHERING_ENABLE        (1<<0)
#define DITHERING_MASK          (1<<0)

// Main LCD System Interface Control
#define LCD_CS_SETUP(n)         (((n)&0xF)<<16)
#define LCD_WR_SETUP(n)         (((n)&0xF)<<12)
#define LCD_WR_ACT(n)           (((n)&0xF)<<8)
#define LCD_WR_HOLD(n)	        (((n)&0xF)<<4)
#define RSPOL_LOW               (0<<2)
#define RSPOL_HIGH              (1<<2)
#define SUCCEUP_ONETIME         (0<<1)
#define SUCCEUP_TRIGGERED       (1<<1)
#define SYSIFEN_DISABLE         (0<<0)
#define SYSIFEN_ENABLE          (1<<0)

// added for V3.2
#define RSADD_MSB_HIGH          (1<<2)
#define RSADD_MSB_LOW           (0<<2)

#define VIDEO_STOP              (0)
#define VIDEO_START             (1)

#define WINDOW_STOP             (0)
#define WINDOW_START            (1)

//Timing parameter for LTV350QV(SAMSUNG)
#define VBPD_LTV350QV           ((5-1)&0xff)
#define VFPD_LTV350QV           ((3-1)&0xff)
#define VSPW_LTV350QV           ((4-1)&0xff)
#define HBPD_LTV350QV           ((5-1)&0xff)
#define HFPD_LTV350QV           ((3-1)&0xff)			
#define HSPW_LTV350QV           ((10-1)&0xff)

//Timing parameter for LTP700WV(SAMSUNG)
#define VBPD_LTP700WV           ((7-1)&0xff)
#define VFPD_LTP700WV           ((5-1)&0xff)
#define VSPW_LTP700WV           ((1-1)&0xff)
#define HBPD_LTP700WV           ((13-1)&0xff)
#define HFPD_LTP700WV           ((8-1)&0xff)			
#define HSPW_LTP700WV           ((3-1)&0xff)

//Timing parameter for LTS222Q
#define VBPD_LTS222QV           ((7-1)&0xff) 
#define VFPD_LTS222QV           ((10-1)&0xff)
#define VSPW_LTS222QV           ((3-1)&0xff)
#define HBPD_LTS222QV           ((2-1)&0xff) 
#define HFPD_LTS222QV           ((2-1)&0xff)			
#define HSPW_LTS222QV           ((1-1)&0xff)

//Timing parameter for LTS_222Q I80 I/F
#define CS_SETUP_TIME           (0&0xf)
#define WR_SETUP_TIME           (1&0xf)
#define WR_ACT_TIME             (6&0xf)
#define WR_HOLD_TIME            (0&0xf)

//Timing parameter for LTV300GV(SAMSUNG)
#define VBPD_LTV300GV           ((26-1)&0xff)
#define VFPD_LTV300GV           ((18-1)&0xff)
#define VSPW_LTV300GV           ((1-1)&0xff)
#define HBPD_LTV300GV           ((135-1)&0xff)
#define HFPD_LTV300GV           ((24-1)&0xff)			
#define HSPW_LTV300GV           ((1-1)&0xff)

// RGB macro will be used to V3.3
// RGB Writer (WINCONw-0x0014c)
#define ONETIME_WRITE           (0<<22)
#define ENABLE_RGBWR            (1<<0)
#define DISBALE_RGBWR           (0<<0)

// CPU I/F Masking
#define LCD_OUT_MASKING         ~(0X3<<26)
#define MAIN_DATA_MASKING       ~(0X7<<20)
#define SUB_DATA_MASKING        ~(0X7<<23)

// Trigger // In V4.0, offset 1B8, 1BC
#define SW_TRIG_MODE            (0X1<<0)
#define SW_TRIGGER              (0x1<<1)

#define H_CLK_INPUT             (0x0<<2)
#define EXT_CLK_0_INPUT         (0X1<<2)
#define EXT_CLK_1_INPUT         (0x3<<2)

// RGB I/F Mode
#define RGB_PARALLEL_MODE       (0x0<<17)
#define BGR_PARALLEL_MODE       (0x1<<17)
#define RGB_SERIAL_MODE         (0x2<<17)
#define BGR_SERIAL_MODE         (0x3<<17)


/////////////////////////////////////////////////////
//typedef

typedef enum 
{
	MAIN, SUB
} CPUIF_LDI;

typedef enum 
{
	DISABLE_AUTO_FRM,
	PER_TWO_FRM,
	PER_FOUR_FRM,
	PER_SIX_FRM,	
	PER_EIGHT_FRM,
	PER_TEN_FRM,
	PER_TWELVE_FRM,	
	PER_FOURTEEN_FRM,
	PER_SIXTEEN_FRM,
	PER_EIGHTEEN_FRM,
	PER_TWENTY_FRM,
	PER_TWENTY_TWO_FRM,
	PER_TWENTY_FOUR_FRM,
	PER_TWENTY_SIX_FRM,
	PER_TWENTY_EIGHT_FRM,
	PER_THIRTY_FRM
} CPU_AUTO_CMD_RATE;

typedef enum 
{
	LCD_DISABLE_CMD, LCD_NORMAL_CMD, LCD_AUTO_CMD, LCD_NORMAL_N_AUTO_CMD, LCD_MANUAL_CMD
} CPU_COMMAND_MODE;

typedef enum 
{
	CPU_16BIT, CPU_16_2BIT, CPU_9_9BIT, CPU_16_8BIT, CPU_18BIT, CPU_8_8BIT
} CPU_OUTPUT_DATAFORMAT;

typedef enum 
{
	WIN0, WIN1, WIN2, WIN3, WIN4
}LCD_WINDOW;

#if 0
typedef enum
{
	PAL1, PAL2, PAL4, PAL8,
	RGB8, ARGB8, RGB16, ARGB16, RGB18, RGB24, RGB30, ARGB24,
	YC420, YC422, // Non-interleave
	CRYCBY, CBYCRY, YCRYCB, YCBYCR, YUV444 // Interleave
} CSPACE;
#endif

typedef enum 
{
	MATCH_FG_IMAGE, MATCH_BG_IMAGE
} COLOR_KEY_DIRECTION;

typedef enum 
{
	PER_PLANE, PER_PIXEL
} BLENDING_APPLIED_UNIT;

typedef enum 
{
	ALPHA0_PLANE, ALPHA1_PLANE, DATA_PIXEL, AEN_PIXEL, COLORKEY_AREA
} BLENDING_SELECT_MODE;

typedef enum 
{
	IN_POST, IN_CIM
} LCD_LOCAL_INPUT;

typedef enum
{
	LOCALIN_RGB,
	LOCALIN_YCbCr
} LOCAL_INPUT_COLORSPACE;

typedef enum
{
	LCD_RGB, LCD_TV, LCD_I80F, LCD_I80S,
	LCD_TVRGB, LCD_TVI80F, LCD_TVI80S
} LCD_LOCAL_OUTPUT;

typedef enum
{
	SRC_HCLK, SRC_MOUT_EPLL, SRC_DOUT_MPLL, SRC_FIN_EPLL, SRC_27M
} CLK_SRC;

typedef enum
{
	HCLK_SRC, ECLK0_SRC, ECLK1_SRC
} CLK_SRC1;	//This is added for code compatibility with other Multimedia IP for example TV Scaler. 07/05/10

typedef enum
{
	MOUT_EPLL, DOUT_MPLL, FIN_EPLL
} CLK_SRC_FROMSYSCON;

typedef enum
{
	PROGRESSIVE_MODE, INTERLACE_MODE
} LCD_SCAN_MODE;

typedef enum 
{
	LCD_FIFO_INT, LCD_FRAME_INT, LCD_SYSIF_INT
}LCD_INT;

typedef enum 

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -