main.h

AT91BootSAM9261.zip,atmelsam9261微处理器启动初始化源代码

//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : main.h
//* Object              : main application header
//* Creation            : FBr   04/22/2004
//*----------------------------------------------------------------------------

#ifndef MAIN_H
#define MAIN_H

#include <stdio.h>

// Autobaudrate State Machine Phases
#define AT91C_INIT				0
#define AT91C_OSC_FREQ_1ST_PASS	1
#define AT91C_OSC_FREQ_2ND_PASS	2
#define AT91C_SET_BAUDRATE		3
#define AT91C_TEST_UART			4
#define AT91C_FINAL				5

#ifdef AT91SAM7S32
#include "AT91SAM7S32.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM7SE32
#include "AT91SAM7SE32.h"
#define AT91C_MASTER_CLOCK 		48000000
#define AT91C_INT_UDP_TXV       1
#define AT91C_DTXD AT91C_PA10_DTXD
#define AT91C_DRXD AT91C_PA9_DRXD

#endif


#ifdef AT91SAM7S64
#include "AT91SAM7S64.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM7S256
#include "AT91SAM7S256.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM7S512
#include "AT91SAM7S512.h"
#define AT91C_MASTER_CLOCK 		48000000
#define AT91C_DTXD AT91C_PA10_DTXD
#define AT91C_DRXD AT91C_PA9_DRXD

#endif

#ifdef AT91SAM7SE512
#include "AT91SAM7SE512.h"
#define AT91C_MASTER_CLOCK 		48000000
#define AT91C_INT_UDP_TXV       1
#define AT91C_DTXD AT91C_PA10_DTXD
#define AT91C_DRXD AT91C_PA9_DRXD

#endif

#ifdef AT91SAM7X512
#include "AT91SAM7X512.h"
#define AT91C_MASTER_CLOCK 		48000000
#define AT91C_INT_UDP_TXV       1
#define AT91C_DTXD AT91C_PA28_DTXD
#define AT91C_DRXD AT91C_PA27_DRXD

#endif

#ifdef AT91SAM7X
#include "AT91SAM7X256.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM7X256
#include "AT91SAM7X256.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM7A3
#include "AT91SAM7A3.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef AT91SAM9XE512
#include "AT91SAM9XE512.h"
#include "lib_AT91SAM9XE512.h"
#define AT91C_MASTER_CLOCK 		48000000

#define AT91C_DRXD		AT91C_PB14_DRXD
#define AT91C_DTXD		AT91C_PB15_DTXD

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIOB->PIO_ASR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
	AT91C_BASE_PIOB->PIO_PDR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIOB->PIO_ODR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
	AT91C_BASE_PIOB->PIO_PER = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
}

#endif

#ifdef AT91SAM9260
#include "AT91SAM9260.h"
#include "lib_AT91SAM9260.h"
#define AT91C_MASTER_CLOCK 		48000000

#define AT91C_DRXD		AT91C_PB14_DRXD
#define AT91C_DTXD		AT91C_PB15_DTXD

#define AT91f_OpenSpiPIO() { \
	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK | AT91C_PA3_SPI0_NPCS0; \
	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK | AT91C_PA3_SPI0_NPCS0; \
	AT91C_BASE_PIOC->PIO_BSR = AT91C_PC11_SPI0_NPCS1; \
	AT91C_BASE_PIOC->PIO_PDR = AT91C_PC11_SPI0_NPCS1; \
}

#define AT91f_CloseSpiPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK | AT91C_PA3_SPI0_NPCS0; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK | AT91C_PA3_SPI0_NPCS0; \
	AT91C_BASE_PIOC->PIO_ODR = AT91C_PC11_SPI0_NPCS1; \
	AT91C_BASE_PIOC->PIO_PER = AT91C_PC11_SPI0_NPCS1; \
}

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIOB->PIO_ASR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
	AT91C_BASE_PIOB->PIO_PDR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIOB->PIO_ODR = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
	AT91C_BASE_PIOB->PIO_PER = AT91C_PB15_DTXD | AT91C_PB14_DRXD; \
}

#define AT91f_OpenNandFlashPIO() { \
	AT91C_BASE_PIOC->PIO_ODR = AT91C_PIO_PC13; \
	AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC13 | AT91C_PIO_PC14; \
	AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC14; \
}

#define AT91f_CloseNandFlashPIO() { \
	AT91C_BASE_PIOC->PIO_ODR = AT91C_PIO_PC13 | AT91C_PIO_PC14; \
	AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC13 | AT91C_PIO_PC14; \
}

#endif

#ifdef AT91SAM9261
#include "AT91SAM9261.h"
#include "lib_AT91SAM9261.h"
#define AT91C_MASTER_CLOCK 		48000000


#define AT91f_OpenSpiPIO() { \
	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA1_MOSI0 | AT91C_PA0_MISO0 | AT91C_PA2_SPCK0 | AT91C_PA3_NPCS00; \
	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA1_MOSI0 | AT91C_PA0_MISO0 | AT91C_PA2_SPCK0 | AT91C_PA3_NPCS00; \
}

#define AT91f_CloseSpiPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PA1_MOSI0 | AT91C_PA0_MISO0 | AT91C_PA2_SPCK0 | AT91C_PA3_NPCS00; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PA1_MOSI0 | AT91C_PA0_MISO0 | AT91C_PA2_SPCK0 | AT91C_PA3_NPCS00; \
}

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA10_DTXD | AT91C_PA9_DRXD; \
	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA10_DTXD | AT91C_PA9_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PA10_DTXD | AT91C_PA9_DRXD; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PA10_DTXD | AT91C_PA9_DRXD; \
}
#endif

#ifdef AT91C340
#include "AT91C340.h"
#include "lib_AT91C340.h"
#define AT91C_MASTER_CLOCK 		48000000

#define AT91f_OpenSpiPIO() { \
	AT91C_BASE_PIOD->PIO_ASR = AT91C_PD12_NPCS00; \
	AT91C_BASE_PIOD->PIO_BSR = AT91C_PD1_MOSI0 | AT91C_PD0_MISO0 | AT91C_PD2_SPCK0; \
	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD12_NPCS00 | AT91C_PD1_MOSI0 | AT91C_PD0_MISO0 | AT91C_PD2_SPCK0; \
}

#define AT91f_CloseSpiPIO() { \
	AT91C_BASE_PIOD->PIO_ODR = AT91C_PD12_NPCS00 | AT91C_PD1_MOSI0 | AT91C_PD0_MISO0 | AT91C_PD2_SPCK0; \
	AT91C_BASE_PIOD->PIO_PER = AT91C_PD12_NPCS00 | AT91C_PD1_MOSI0 | AT91C_PD0_MISO0 | AT91C_PD2_SPCK0; \
}

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIOC->PIO_ASR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
	AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIOC->PIO_ODR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
	AT91C_BASE_PIOC->PIO_PER = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
}

#endif

#ifdef AT91SAM9262
#include "AT91SAM9262.h"
#include "lib_AT91SAM9262.h"
#define AT91C_MASTER_CLOCK 		48000000

#define AT91f_OpenSpiPIO() { \
	AT91C_BASE_PIOA->PIO_BSR = AT91C_PA5_SPI0_NPCS0 | AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK; \
	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA5_SPI0_NPCS0 | AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK; \
}

#define AT91f_CloseSpiPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PA5_SPI0_NPCS0 | AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PA5_SPI0_NPCS0 | AT91C_PA1_SPI0_MOSI | AT91C_PA0_SPI0_MISO | AT91C_PA2_SPI0_SPCK; \
}

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIOC->PIO_ASR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
	AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIOC->PIO_ODR = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
	AT91C_BASE_PIOC->PIO_PER = AT91C_PC31_DTXD | AT91C_PC30_DRXD; \
}

#define AT91f_OpenNandFlashPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PIO_PA22; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PA22; \
	AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15; \
	AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15; \
}

#define AT91f_CloseNandFlashPIO() { \
	AT91C_BASE_PIOA->PIO_ODR = AT91C_PIO_PA22; \
	AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PA22; \
	AT91C_BASE_PIOD->PIO_ODR = AT91C_PIO_PD15; \
	AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15; \
}

#endif

#ifdef IGS036
#include "IGS036.h"
#include "lib_IGS036.h"
#define AT91C_MASTER_CLOCK 		10000000

#define AT91f_OpenDbguPIO() { \
	AT91C_BASE_PIO->PIO_ASR = AT91C_PA15_DTXD | AT91C_PA14_DRXD; \
	AT91C_BASE_PIO->PIO_PDR = AT91C_PA15_DTXD | AT91C_PA14_DRXD; \
}

#define AT91f_CloseDbguPIO() { \
	AT91C_BASE_PIO->PIO_ODR = AT91C_PA15_DTXD | AT91C_PA14_DRXD; \
	AT91C_BASE_PIO->PIO_PER = AT91C_PA15_DTXD | AT91C_PA14_DRXD; \
}

#endif

#ifdef AT91RM9200
#include "AT91RM9200.h"
#define AT91C_MASTER_CLOCK 		48000000
#endif

#ifdef MISTRAL9261
#include "AT91SAM9261.h"
#define AT91C_MASTER_CLOCK 		33330000
#endif

#ifdef M9261
#include "M9261.h"
#define AT91C_MASTER_CLOCK 		33330000
#endif

#ifndef IGS036
#include "cdc_enumerate.h"
#endif

/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
// MISCELLANEOUS
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////

#ifndef TRUE
#define	TRUE					1
#endif
#ifndef FALSE
#define	FALSE					0
#endif

#define	DELAY					1000000

#define AT91C_BAUDRATE_115200	115200

// -------- DBGU_CIDR : (DBGU Offset: 0x40) Debug Unit Chip ID Register --------
#define AT91C_DBGU_CIDR_VER				((unsigned int) 0x1F <<  0) // (DBGU) Part of the version of the device
#define AT91C_DBGU_CIDR_VER_S32_MASK	((unsigned int) 0x3 <<  0) // (DBGU) Part of the version of the device
#define AT91C_DBGU_CIDR_VER_S32_USB		((unsigned int) 0x2 <<  0) // (DBGU) USB S32 versions

#define AT91C_CIDR_SAM7S32 			0x27080340	// SAM7S32 chip id Version 0

#define SIZEBUFMAX 				64
#define AT91C_DBGU_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
                        		AT91C_US_NBSTOP_1_BIT + \
                        		AT91C_US_PAR_NONE + \
                        		AT91C_US_CHRL_8_BITS + \
                        		AT91C_US_CLKS_CLOCK )
#define AT91C_DBGU_ERRORS		(AT91C_US_OVRE|AT91C_US_FRAME|AT91C_US_PARE)

typedef struct _AT91S_XMODEM
{
	// Public Methods:
	void (*AT91F_XMD_Xup)   (char *pData, unsigned int length);
	void (*AT91F_XMD_Xdown) (char *pData, unsigned int length);
} AT91S_XMODEM, *AT91PS_XMODEM;

/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////////////////////////////////////////

#endif