ipath_common.h
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/* * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */#ifndef _IPATH_COMMON_H#define _IPATH_COMMON_H/* * This file contains defines, structures, etc. that are used * to communicate between kernel and user code. *//* This is the IEEE-assigned OUI for PathScale, Inc. */#define IPATH_SRC_OUI_1 0x00#define IPATH_SRC_OUI_2 0x11#define IPATH_SRC_OUI_3 0x75/* version of protocol header (known to chip also). In the long run, * we should be able to generate and accept a range of version numbers; * for now we only accept one, and it's compiled in. */#define IPS_PROTO_VERSION 2/* * These are compile time constants that you may want to enable or disable * if you are trying to debug problems with code or performance. * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in * fastpath code * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be * traced in faspath code * _IPATH_TRACING define as 0 if you want to remove all tracing in a * compilation unit * _IPATH_DEBUGGING define as 0 if you want to remove debug prints *//* * The value in the BTH QP field that InfiniPath uses to differentiate * an infinipath protocol IB packet vs standard IB transport */#define IPATH_KD_QP 0x656b79/* * valid states passed to ipath_set_linkstate() user call */#define IPATH_IB_LINKDOWN 0#define IPATH_IB_LINKARM 1#define IPATH_IB_LINKACTIVE 2#define IPATH_IB_LINKINIT 3#define IPATH_IB_LINKDOWN_SLEEP 4#define IPATH_IB_LINKDOWN_DISABLE 5/* * stats maintained by the driver. For now, at least, this is global * to all minor devices. */struct infinipath_stats { /* number of interrupts taken */ __u64 sps_ints; /* number of interrupts for errors */ __u64 sps_errints; /* number of errors from chip (not incl. packet errors or CRC) */ __u64 sps_errs; /* number of packet errors from chip other than CRC */ __u64 sps_pkterrs; /* number of packets with CRC errors (ICRC and VCRC) */ __u64 sps_crcerrs; /* number of hardware errors reported (parity, etc.) */ __u64 sps_hwerrs; /* number of times IB link changed state unexpectedly */ __u64 sps_iblink; /* no longer used; left for compatibility */ __u64 sps_unused3; /* number of kernel (port0) packets received */ __u64 sps_port0pkts; /* number of "ethernet" packets sent by driver */ __u64 sps_ether_spkts; /* number of "ethernet" packets received by driver */ __u64 sps_ether_rpkts; /* number of SMA packets sent by driver */ __u64 sps_sma_spkts; /* number of SMA packets received by driver */ __u64 sps_sma_rpkts; /* number of times all ports rcvhdrq was full and packet dropped */ __u64 sps_hdrqfull; /* number of times all ports egrtid was full and packet dropped */ __u64 sps_etidfull; /* * number of times we tried to send from driver, but no pio buffers * avail */ __u64 sps_nopiobufs; /* number of ports currently open */ __u64 sps_ports; /* list of pkeys (other than default) accepted (0 means not set) */ __u16 sps_pkeys[4]; /* lids for up to 4 infinipaths, indexed by infinipath # */ __u16 sps_lid[4]; /* number of user ports per chip (not IB ports) */ __u32 sps_nports; /* not our interrupt, or already handled */ __u32 sps_nullintr; /* max number of packets handled per receive call */ __u32 sps_maxpkts_call; /* avg number of packets handled per receive call */ __u32 sps_avgpkts_call; /* total number of pages locked */ __u64 sps_pagelocks; /* total number of pages unlocked */ __u64 sps_pageunlocks; /* * Number of packets dropped in kernel other than errors (ether * packets if ipath not configured, sma/mad, etc.) */ __u64 sps_krdrops; /* mlids for up to 4 infinipaths, indexed by infinipath # */ __u16 sps_mlid[4]; /* pad for future growth */ __u64 __sps_pad[45];};/* * These are the status bits readable (in ascii form, 64bit value) * from the "status" sysfs file. */#define IPATH_STATUS_INITTED 0x1 /* basic initialization done */#define IPATH_STATUS_DISABLED 0x2 /* hardware disabled *//* Device has been disabled via admin request */#define IPATH_STATUS_ADMIN_DISABLED 0x4#define IPATH_STATUS_OIB_SMA 0x8 /* ipath_mad kernel SMA running */#define IPATH_STATUS_SMA 0x10 /* user SMA running *//* Chip has been found and initted */#define IPATH_STATUS_CHIP_PRESENT 0x20/* IB link is at ACTIVE, usable for data traffic */#define IPATH_STATUS_IB_READY 0x40/* link is configured, LID, MTU, etc. have been set */#define IPATH_STATUS_IB_CONF 0x80/* no link established, probably no cable */#define IPATH_STATUS_IB_NOCABLE 0x100/* A Fatal hardware error has occurred. */#define IPATH_STATUS_HWERROR 0x200/* * The list of usermode accessible registers. Also see Reg_* later in file. */typedef enum _ipath_ureg { /* (RO) DMA RcvHdr to be used next. */ ur_rcvhdrtail = 0, /* (RW) RcvHdr entry to be processed next by host. */ ur_rcvhdrhead = 1, /* (RO) Index of next Eager index to use. */ ur_rcvegrindextail = 2, /* (RW) Eager TID to be processed next */ ur_rcvegrindexhead = 3, /* For internal use only; max register number. */ _IPATH_UregMax} ipath_ureg;/* bit values for spi_runtime_flags */#define IPATH_RUNTIME_HT 0x1#define IPATH_RUNTIME_PCIE 0x2#define IPATH_RUNTIME_FORCE_WC_ORDER 0x4#define IPATH_RUNTIME_RCVHDR_COPY 0x8/* * This structure is returned by ipath_userinit() immediately after * open to get implementation-specific info, and info specific to this * instance. * * This struct must have explict pad fields where type sizes * may result in different alignments between 32 and 64 bit * programs, since the 64 bit * bit kernel requires the user code * to have matching offsets */struct ipath_base_info { /* version of hardware, for feature checking. */ __u32 spi_hw_version; /* version of software, for feature checking. */ __u32 spi_sw_version; /* InfiniPath port assigned, goes into sent packets */ __u32 spi_port; /* * IB MTU, packets IB data must be less than this. * The MTU is in bytes, and will be a multiple of 4 bytes. */ __u32 spi_mtu; /* * Size of a PIO buffer. Any given packet's total size must be less * than this (in words). Included is the starting control word, so * if 513 is returned, then total pkt size is 512 words or less. */ __u32 spi_piosize; /* size of the TID cache in infinipath, in entries */ __u32 spi_tidcnt; /* size of the TID Eager list in infinipath, in entries */ __u32 spi_tidegrcnt; /* size of a single receive header queue entry. */ __u32 spi_rcvhdrent_size; /* * Count of receive header queue entries allocated. * This may be less than the spu_rcvhdrcnt passed in!. */ __u32 spi_rcvhdr_cnt; /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */ __u32 spi_runtime_flags; /* address where receive buffer queue is mapped into */ __u64 spi_rcvhdr_base; /* user program. */ /* base address of eager TID receive buffers. */ __u64 spi_rcv_egrbufs; /* Allocated by initialization code, not by protocol. */ /* * Size of each TID buffer in host memory, starting at * spi_rcv_egrbufs. The buffers are virtually contiguous. */ __u32 spi_rcv_egrbufsize; /* * The special QP (queue pair) value that identifies an infinipath * protocol packet from standard IB packets. More, probably much * more, to be added. */ __u32 spi_qpair; /* * User register base for init code, not to be used directly by * protocol or applications. */ __u64 __spi_uregbase; /* * Maximum buffer size in bytes that can be used in a single TID * entry (assuming the buffer is aligned to this boundary). This is * the minimum of what the hardware and software support Guaranteed * to be a power of 2. */ __u32 spi_tid_maxsize; /* * alignment of each pio send buffer (byte count * to add to spi_piobufbase to get to second buffer) */ __u32 spi_pioalign; /* * The index of the first pio buffer available to this process; * needed to do lookup in spi_pioavailaddr; not added to * spi_piobufbase. */ __u32 spi_pioindex; /* number of buffers mapped for this process */ __u32 spi_piocnt; /* * Base address of writeonly pio buffers for this process. * Each buffer has spi_piosize words, and is aligned on spi_pioalign * boundaries. spi_piocnt buffers are mapped from this address */ __u64 spi_piobufbase; /* * Base address of readonly memory copy of the pioavail registers. * There are 2 bits for each buffer. */ __u64 spi_pioavailaddr; /* * Address where driver updates a copy of the interface and driver * status (IPATH_STATUS_*) as a 64 bit value. It's followed by a * string indicating hardware error, if there was one. */ __u64 spi_status; /* number of chip ports available to user processes */ __u32 spi_nports; /* unit number of chip we are using */ __u32 spi_unit; /* num bufs in each contiguous set */ __u32 spi_rcv_egrperchunk; /* size in bytes of each contiguous set */
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