ipath_kernel.h

来自「LINUX 2.6.17.4的源码」· C头文件 代码 · 共 884 行 · 第 1/2 页

H
884
字号
	u32 ipath_rcvegrbase;	/* kr_rcvegrcnt value */	u32 ipath_rcvegrcnt;	/* kr_rcvtidbase value */	u32 ipath_rcvtidbase;	/* kr_rcvtidcnt value */	u32 ipath_rcvtidcnt;	/* kr_sendregbase */	u32 ipath_sregbase;	/* kr_userregbase */	u32 ipath_uregbase;	/* kr_counterregbase */	u32 ipath_cregbase;	/* shadow the control register contents */	u32 ipath_control;	/* shadow the gpio output contents */	u32 ipath_extctrl;	/* PCI revision register (HTC rev on FPGA) */	u32 ipath_pcirev;	/* chip address space used by 4k pio buffers */	u32 ipath_4kalign;	/* The MTU programmed for this unit */	u32 ipath_ibmtu;	/*	 * The max size IB packet, included IB headers that we can send.	 * Starts same as ipath_piosize, but is affected when ibmtu is	 * changed, or by size of eager buffers	 */	u32 ipath_ibmaxlen;	/*	 * ibmaxlen at init time, limited by chip and by receive buffer	 * size.  Not changed after init.	 */	u32 ipath_init_ibmaxlen;	/* size of each rcvegrbuffer */	u32 ipath_rcvegrbufsize;	/* width (2,4,8,16,32) from HT config reg */	u32 ipath_htwidth;	/* HT speed (200,400,800,1000) from HT config */	u32 ipath_htspeed;	/* ports waiting for PIOavail intr */	unsigned long ipath_portpiowait;	/*	 * number of sequential ibcstatus change for polling active/quiet	 * (i.e., link not coming up).	 */	u32 ipath_ibpollcnt;	/* low and high portions of MSI capability/vector */	u32 ipath_msi_lo;	/* saved after PCIe init for restore after reset */	u32 ipath_msi_hi;	/* MSI data (vector) saved for restore */	u16 ipath_msi_data;	/* MLID programmed for this instance */	u16 ipath_mlid;	/* LID programmed for this instance */	u16 ipath_lid;	/* list of pkeys programmed; 0 if not set */	u16 ipath_pkeys[4];	/* ASCII serial number, from flash */	u8 ipath_serial[12];	/* human readable board version */	u8 ipath_boardversion[80];	/* chip major rev, from ipath_revision */	u8 ipath_majrev;	/* chip minor rev, from ipath_revision */	u8 ipath_minrev;	/* board rev, from ipath_revision */	u8 ipath_boardrev;	/* unit # of this chip, if present */	int ipath_unit;	/* saved for restore after reset */	u8 ipath_pci_cacheline;	/* LID mask control */	u8 ipath_lmc;};extern volatile __le64 *ipath_port0_rcvhdrtail;extern dma_addr_t ipath_port0_rcvhdrtail_dma;#define IPATH_PORT0_RCVHDRTAIL_SIZE PAGE_SIZEextern struct list_head ipath_dev_list;extern spinlock_t ipath_devs_lock;extern struct ipath_devdata *ipath_lookup(int unit);extern u16 ipath_layer_rcv_opcode;extern int __ipath_layer_intr(struct ipath_devdata *, u32);extern int ipath_layer_intr(struct ipath_devdata *, u32);extern int __ipath_layer_rcv(struct ipath_devdata *, void *,			     struct sk_buff *);extern int __ipath_layer_rcv_lid(struct ipath_devdata *, void *);extern int __ipath_verbs_piobufavail(struct ipath_devdata *);extern int __ipath_verbs_rcv(struct ipath_devdata *, void *, void *, u32);void ipath_layer_add(struct ipath_devdata *);void ipath_layer_del(struct ipath_devdata *);int ipath_init_chip(struct ipath_devdata *, int);int ipath_enable_wc(struct ipath_devdata *dd);void ipath_disable_wc(struct ipath_devdata *dd);int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp);void ipath_shutdown_device(struct ipath_devdata *);struct file_operations;int ipath_cdev_init(int minor, char *name, struct file_operations *fops,		    struct cdev **cdevp, struct class_device **class_devp);void ipath_cdev_cleanup(struct cdev **cdevp,			struct class_device **class_devp);int ipath_diag_init(void);void ipath_diag_cleanup(void);void ipath_diag_bringup_link(struct ipath_devdata *);extern wait_queue_head_t ipath_sma_state_wait;int ipath_user_add(struct ipath_devdata *dd);void ipath_user_del(struct ipath_devdata *dd);struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);extern int ipath_diag_inuse;irqreturn_t ipath_intr(int irq, void *devid, struct pt_regs *regs);void ipath_decode_err(char *buf, size_t blen, ipath_err_t err);#if __IPATH_INFO || __IPATH_DBGextern const char *ipath_ibcstatus_str[];#endif/* clean up any per-chip chip-specific stuff */void ipath_chip_cleanup(struct ipath_devdata *);/* clean up any chip type-specific stuff */void ipath_chip_done(void);/* check to see if we have to force ordering for write combining */int ipath_unordered_wc(void);void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,			  unsigned cnt);int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);void ipath_free_pddata(struct ipath_devdata *, u32, int);int ipath_parse_ushort(const char *str, unsigned short *valp);int ipath_wait_linkstate(struct ipath_devdata *, u32, int);void ipath_set_ib_lstate(struct ipath_devdata *, int);void ipath_kreceive(struct ipath_devdata *);int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);int ipath_reset_device(int);void ipath_get_faststats(unsigned long);/* for use in system calls, where we want to know device type, etc. */#define port_fp(fp) ((struct ipath_portdata *) (fp)->private_data)/* * values for ipath_flags *//* The chip is up and initted */#define IPATH_INITTED       0x2		/* set if any user code has set kr_rcvhdrsize */#define IPATH_RCVHDRSZ_SET  0x4		/* The chip is present and valid for accesses */#define IPATH_PRESENT       0x8		/* HT link0 is only 8 bits wide, ignore upper byte crc		 * errors, etc. */#define IPATH_8BIT_IN_HT0   0x10		/* HT link1 is only 8 bits wide, ignore upper byte crc		 * errors, etc. */#define IPATH_8BIT_IN_HT1   0x20		/* The link is down */#define IPATH_LINKDOWN      0x40		/* The link level is up (0x11) */#define IPATH_LINKINIT      0x80		/* The link is in the armed (0x21) state */#define IPATH_LINKARMED     0x100		/* The link is in the active (0x31) state */#define IPATH_LINKACTIVE    0x200		/* link current state is unknown */#define IPATH_LINKUNK       0x400		/* no IB cable, or no device on IB cable */#define IPATH_NOCABLE       0x4000		/* Supports port zero per packet receive interrupts via		 * GPIO */#define IPATH_GPIO_INTR     0x8000		/* uses the coded 4byte TID, not 8 byte */#define IPATH_4BYTE_TID     0x10000		/* packet/word counters are 32 bit, else those 4 counters		 * are 64bit */#define IPATH_32BITCOUNTERS 0x20000		/* can miss port0 rx interrupts */#define IPATH_POLL_RX_INTR  0x40000#define IPATH_DISABLED      0x80000 /* administratively disabled *//* portdata flag bit offsets */		/* waiting for a packet to arrive */#define IPATH_PORT_WAITING_RCV   2		/* waiting for a PIO buffer to be available */#define IPATH_PORT_WAITING_PIO   3/* free up any allocated data at closes */void ipath_free_data(struct ipath_portdata *dd);int ipath_waitfor_mdio_cmdready(struct ipath_devdata *);int ipath_waitfor_complete(struct ipath_devdata *, ipath_kreg, u64, u64 *);u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);/* init PE-800-specific func */void ipath_init_pe800_funcs(struct ipath_devdata *);/* init HT-400-specific func */void ipath_init_ht400_funcs(struct ipath_devdata *);void ipath_get_eeprom_info(struct ipath_devdata *);u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);/* * number of words used for protocol header if not set by ipath_userinit(); */#define IPATH_DFLT_RCVHDRSIZE 9#define IPATH_MDIO_CMD_WRITE   1#define IPATH_MDIO_CMD_READ    2#define IPATH_MDIO_CLD_DIV     25	/* to get 2.5 Mhz mdio clock */#define IPATH_MDIO_CMDVALID    0x40000000	/* bit 30 */#define IPATH_MDIO_DATAVALID   0x80000000	/* bit 31 */#define IPATH_MDIO_CTRL_STD    0x0static inline u64 ipath_mdio_req(int cmd, int dev, int reg, int data){	return (((u64) IPATH_MDIO_CLD_DIV) << 32) |		(cmd << 26) |		(dev << 21) |		(reg << 16) |		(data & 0xFFFF);}		/* signal and fifo status, in bank 31 */#define IPATH_MDIO_CTRL_XGXS_REG_8  0x8		/* controls loopback, redundancy */#define IPATH_MDIO_CTRL_8355_REG_1  0x10		/* premph, encdec, etc. */#define IPATH_MDIO_CTRL_8355_REG_2  0x11		/* Kchars, etc. */#define IPATH_MDIO_CTRL_8355_REG_6  0x15#define IPATH_MDIO_CTRL_8355_REG_9  0x18#define IPATH_MDIO_CTRL_8355_REG_10 0x1Dint ipath_get_user_pages(unsigned long, size_t, struct page **);int ipath_get_user_pages_nocopy(unsigned long, struct page **);void ipath_release_user_pages(struct page **, size_t);void ipath_release_user_pages_on_close(struct page **, size_t);int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);/* these are used for the registers that vary with port */void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,			   unsigned, u64);u64 ipath_read_kreg64_port(const struct ipath_devdata *, ipath_kreg,			   unsigned);/* * We could have a single register get/put routine, that takes a group type, * but this is somewhat clearer and cleaner.  It also gives us some error * checking.  64 bit register reads should always work, but are inefficient * on opteron (the northbridge always generates 2 separate HT 32 bit reads), * so we use kreg32 wherever possible.  User register and counter register * reads are always 32 bit reads, so only one form of those routines. *//* * At the moment, none of the s-registers are writable, so no * ipath_write_sreg(), and none of the c-registers are writable, so no * ipath_write_creg(). *//** * ipath_read_ureg32 - read 32-bit virtualized per-port register * @dd: device * @regno: register number * @port: port number * * Return the contents of a register that is virtualized to be per port. * Prints a debug message and returns -1 on errors (not distinguishable from * valid contents at runtime; we may add a separate error variable at some * point). * * This is normally not used by the kernel, but may be for debugging, and * has a different implementation than user mode, which is why it's not in * _common.h. */static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,				    ipath_ureg regno, int port){	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))		return 0;	return readl(regno + (u64 __iomem *)		     (dd->ipath_uregbase +		      (char __iomem *)dd->ipath_kregbase +		      dd->ipath_palign * port));}/** * ipath_write_ureg - write 32-bit virtualized per-port register * @dd: device * @regno: register number * @value: value * @port: port * * Write the contents of a register that is virtualized to be per port. */static inline void ipath_write_ureg(const struct ipath_devdata *dd,				    ipath_ureg regno, u64 value, int port){	u64 __iomem *ubase = (u64 __iomem *)		(dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +		 dd->ipath_palign * port);	if (dd->ipath_kregbase)		writeq(value, &ubase[regno]);}static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,				    ipath_kreg regno){	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))		return -1;	return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);}static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,				    ipath_kreg regno){	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))		return -1;	return readq(&dd->ipath_kregbase[regno]);}static inline void ipath_write_kreg(const struct ipath_devdata *dd,				    ipath_kreg regno, u64 value){	if (dd->ipath_kregbase)		writeq(value, &dd->ipath_kregbase[regno]);}static inline u64 ipath_read_creg(const struct ipath_devdata *dd,				  ipath_sreg regno){	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))		return 0;	return readq(regno + (u64 __iomem *)		     (dd->ipath_cregbase +		      (char __iomem *)dd->ipath_kregbase));}static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,					 ipath_sreg regno){	if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))		return 0;	return readl(regno + (u64 __iomem *)		     (dd->ipath_cregbase +		      (char __iomem *)dd->ipath_kregbase));}/* * sysfs interface. */struct device_driver;extern const char ipath_core_version[];int ipath_driver_create_group(struct device_driver *);void ipath_driver_remove_group(struct device_driver *);int ipath_device_create_group(struct device *, struct ipath_devdata *);void ipath_device_remove_group(struct device *, struct ipath_devdata *);int ipath_expose_reset(struct device *);int ipath_init_ipathfs(void);void ipath_exit_ipathfs(void);int ipathfs_add_device(struct ipath_devdata *);int ipathfs_remove_device(struct ipath_devdata *);/* * Flush write combining store buffers (if present) and perform a write * barrier. */#if defined(CONFIG_X86_64)#define ipath_flush_wc() asm volatile("sfence" ::: "memory")#else#define ipath_flush_wc() wmb()#endifextern unsigned ipath_debug; /* debugging bit mask */const char *ipath_get_unit_name(int unit);extern struct mutex ipath_mutex;#define IPATH_DRV_NAME		"ipath_core"#define IPATH_MAJOR		233#define IPATH_SMA_MINOR		128#define IPATH_DIAG_MINOR	129#define IPATH_NMINORS		130#define ipath_dev_err(dd,fmt,...) \	do { \		const struct ipath_devdata *__dd = (dd); \		if (__dd->pcidev) \			dev_err(&__dd->pcidev->dev, "%s: " fmt, \				ipath_get_unit_name(__dd->ipath_unit), \				##__VA_ARGS__); \		else \			printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \			       ipath_get_unit_name(__dd->ipath_unit), \			       ##__VA_ARGS__); \	} while (0)#if _IPATH_DEBUGGING# define __IPATH_DBG_WHICH(which,fmt,...) \	do { \		if(unlikely(ipath_debug&(which))) \			printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \			       __func__,##__VA_ARGS__); \	} while(0)# define ipath_dbg(fmt,...) \	__IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)# define ipath_cdbg(which,fmt,...) \	__IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)#else /* ! _IPATH_DEBUGGING */# define ipath_dbg(fmt,...)# define ipath_cdbg(which,fmt,...)#endif /* _IPATH_DEBUGGING */#endif				/* _IPATH_KERNEL_H */

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?