pci_common.c
来自「LINUX 2.6.17.4的源码」· C语言 代码 · 共 1,088 行 · 第 1/2 页
C
1,088 行
struct pci_dev *toplevel_pdev, struct pci_dev *pdev, unsigned int interrupt){ unsigned int ret; if (unlikely(interrupt < 1 || interrupt > 4)) { printk("%s: Device %s interrupt value of %u is strange.\n", pbm->name, pci_name(pdev), interrupt); return interrupt; } ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1; printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n", pbm->name, pci_name(toplevel_pdev), pci_name(pdev), interrupt, PCI_SLOT(pdev->devfn), ret); return ret;}static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm, struct pci_dev *toplevel_pdev, struct pci_dev *pbus, struct pci_dev *pdev, unsigned int interrupt, unsigned int *cnode){ struct linux_prom_pci_intmap imap[PROM_PCIIMAP_MAX]; struct linux_prom_pci_intmask imask; struct pcidev_cookie *pbus_pcp = pbus->sysdata; struct pcidev_cookie *pdev_pcp = pdev->sysdata; struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs; int plen, num_imap, i; unsigned int hi, mid, lo, irq, orig_interrupt; *cnode = pbus_pcp->prom_node; plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map", (char *) &imap[0], sizeof(imap)); if (plen <= 0 || (plen % sizeof(struct linux_prom_pci_intmap)) != 0) { printk("%s: Device %s interrupt-map has bad len %d\n", pbm->name, pci_name(pbus), plen); goto no_intmap; } num_imap = plen / sizeof(struct linux_prom_pci_intmap); plen = prom_getproperty(pbus_pcp->prom_node, "interrupt-map-mask", (char *) &imask, sizeof(imask)); if (plen <= 0 || (plen % sizeof(struct linux_prom_pci_intmask)) != 0) { printk("%s: Device %s interrupt-map-mask has bad len %d\n", pbm->name, pci_name(pbus), plen); goto no_intmap; } orig_interrupt = interrupt; hi = pregs->phys_hi & imask.phys_hi; mid = pregs->phys_mid & imask.phys_mid; lo = pregs->phys_lo & imask.phys_lo; irq = interrupt & imask.interrupt; for (i = 0; i < num_imap; i++) { if (imap[i].phys_hi == hi && imap[i].phys_mid == mid && imap[i].phys_lo == lo && imap[i].interrupt == irq) { *cnode = imap[i].cnode; interrupt = imap[i].cinterrupt; } } printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n", pbm->name, pci_name(toplevel_pdev), pci_name(pbus), pci_name(pdev), orig_interrupt, interrupt);no_intmap: return interrupt;}/* For each PCI bus on the way to the root: * 1) If it has an interrupt-map property, apply it. * 2) Else, swivel the interrupt number based upon the PCI device number. * * Return the "IRQ controller" node. If this is the PBM's device node, * all interrupt translations are complete, else we should use that node's * "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt. */static unsigned int __init pci_intmap_match_to_root(struct pci_pbm_info *pbm, struct pci_dev *pdev, unsigned int *interrupt){ struct pci_dev *toplevel_pdev = pdev; struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata; unsigned int cnode = toplevel_pcp->prom_node; while (pdev->bus->number != pbm->pci_first_busno) { struct pci_dev *pbus = pdev->bus->self; struct pcidev_cookie *pcp = pbus->sysdata; int plen; plen = prom_getproplen(pcp->prom_node, "interrupt-map"); if (plen <= 0) { *interrupt = pci_slot_swivel(pbm, toplevel_pdev, pdev, *interrupt); cnode = pcp->prom_node; } else { *interrupt = pci_apply_intmap(pbm, toplevel_pdev, pbus, pdev, *interrupt, &cnode); while (pcp->prom_node != cnode && pbus->bus->number != pbm->pci_first_busno) { pbus = pbus->bus->self; pcp = pbus->sysdata; } } pdev = pbus; if (cnode == pbm->prom_node) break; } return cnode;}static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt){ struct pcidev_cookie *dev_pcp = pdev->sysdata; struct pci_pbm_info *pbm = dev_pcp->pbm; struct linux_prom_pci_registers reg[PROMREG_MAX]; unsigned int hi, mid, lo, irq; int i, cnode, plen; cnode = pci_intmap_match_to_root(pbm, pdev, interrupt); if (cnode == pbm->prom_node) goto success; plen = prom_getproperty(cnode, "reg", (char *) reg, sizeof(reg)); if (plen <= 0 || (plen % sizeof(struct linux_prom_pci_registers)) != 0) { printk("%s: OBP node %x reg property has bad len %d\n", pbm->name, cnode, plen); goto fail; } hi = reg[0].phys_hi & pbm->pbm_intmask.phys_hi; mid = reg[0].phys_mid & pbm->pbm_intmask.phys_mid; lo = reg[0].phys_lo & pbm->pbm_intmask.phys_lo; irq = *interrupt & pbm->pbm_intmask.interrupt; for (i = 0; i < pbm->num_pbm_intmap; i++) { struct linux_prom_pci_intmap *intmap; intmap = &pbm->pbm_intmap[i]; if (intmap->phys_hi == hi && intmap->phys_mid == mid && intmap->phys_lo == lo && intmap->interrupt == irq) { *interrupt = intmap->cinterrupt; goto success; } }fail: return 0;success: printk("PCI-IRQ: Routing bus[%2x] slot[%2x] to INO[%02x]\n", pdev->bus->number, PCI_SLOT(pdev->devfn), *interrupt); return 1;}static void __init pdev_fixup_irq(struct pci_dev *pdev){ struct pcidev_cookie *pcp = pdev->sysdata; struct pci_pbm_info *pbm = pcp->pbm; struct pci_controller_info *p = pbm->parent; unsigned int portid = pbm->portid; unsigned int prom_irq; int prom_node = pcp->prom_node; int err; /* If this is an empty EBUS device, sometimes OBP fails to * give it a valid fully specified interrupts property. * The EBUS hooked up to SunHME on PCI I/O boards of * Ex000 systems is one such case. * * The interrupt is not important so just ignore it. */ if (pdev->vendor == PCI_VENDOR_ID_SUN && pdev->device == PCI_DEVICE_ID_SUN_EBUS && !prom_getchild(prom_node)) { pdev->irq = 0; return; } err = prom_getproperty(prom_node, "interrupts", (char *)&prom_irq, sizeof(prom_irq)); if (err == 0 || err == -1) { pdev->irq = 0; return; } if (tlb_type != hypervisor) { /* Fully specified already? */ if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) { pdev->irq = p->irq_build(pbm, pdev, prom_irq); goto have_irq; } /* An onboard device? (bit 5 set) */ if ((prom_irq & PCI_IRQ_INO) & 0x20) { pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq)); goto have_irq; } } /* Can we find a matching entry in the interrupt-map? */ if (pci_intmap_match(pdev, &prom_irq)) { pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq); goto have_irq; } /* Ok, we have to do it the hard way. */ { unsigned int bus, slot, line; bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0; /* If we have a legal interrupt property, use it as * the IRQ line. */ if (prom_irq > 0 && prom_irq < 5) { line = ((prom_irq - 1) & 3); } else { u8 pci_irq_line; /* Else just directly consult PCI config space. */ pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line); line = ((pci_irq_line - 1) & 3); } /* Now figure out the slot. * * Basically, device number zero on the top-level bus is * always the PCI host controller. Slot 0 is then device 1. * PBM A supports two external slots (0 and 1), and PBM B * supports 4 external slots (0, 1, 2, and 3). On-board PCI * devices are wired to device numbers outside of these * ranges. -DaveM */ if (pdev->bus->number == pbm->pci_first_busno) { slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot; } else { struct pci_dev *bus_dev; /* Underneath a bridge, use slot number of parent * bridge which is closest to the PBM. */ bus_dev = pdev->bus->self; while (bus_dev->bus && bus_dev->bus->number != pbm->pci_first_busno) bus_dev = bus_dev->bus->self; slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot; } slot = slot << 2; pdev->irq = p->irq_build(pbm, pdev, ((portid << 6) & PCI_IRQ_IGN) | (bus | slot | line)); }have_irq: pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, pdev->irq & PCI_IRQ_INO);}void __init pci_fixup_irq(struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *dev; struct pci_bus *bus; list_for_each_entry(dev, &pbus->devices, bus_list) pdev_fixup_irq(dev); list_for_each_entry(bus, &pbus->children, node) pci_fixup_irq(pbm, bus);}static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz){ u16 cmd; u8 hdr_type, min_gnt, ltimer; pci_read_config_word(pdev, PCI_COMMAND, &cmd); cmd |= PCI_COMMAND_MASTER; pci_write_config_word(pdev, PCI_COMMAND, cmd); /* Read it back, if the mastering bit did not * get set, the device does not support bus * mastering so we have nothing to do here. */ pci_read_config_word(pdev, PCI_COMMAND, &cmd); if ((cmd & PCI_COMMAND_MASTER) == 0) return; /* Set correct cache line size, 64-byte on all * Sparc64 PCI systems. Note that the value is * measured in 32-bit words. */ pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 64 / sizeof(u32)); pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type); hdr_type &= ~0x80; if (hdr_type != PCI_HEADER_TYPE_NORMAL) return; /* If the latency timer is already programmed with a non-zero * value, assume whoever set it (OBP or whoever) knows what * they are doing. */ pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer); if (ltimer != 0) return; /* XXX Since I'm tipping off the min grant value to * XXX choose a suitable latency timer value, I also * XXX considered making use of the max latency value * XXX as well. Unfortunately I've seen too many bogusly * XXX low settings for it to the point where it lacks * XXX any usefulness. In one case, an ethernet card * XXX claimed a min grant of 10 and a max latency of 5. * XXX Now, if I had two such cards on the same bus I * XXX could not set the desired burst period (calculated * XXX from min grant) without violating the max latency * XXX bound. Duh... * XXX * XXX I blame dumb PC bios implementors for stuff like * XXX this, most of them don't even try to do something * XXX sensible with latency timer values and just set some * XXX default value (usually 32) into every device. */ pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt); if (min_gnt == 0) { /* If no min_gnt setting then use a default * value. */ if (is_66mhz) ltimer = 16; else ltimer = 32; } else { int shift_factor; if (is_66mhz) shift_factor = 2; else shift_factor = 3; /* Use a default value when the min_gnt value * is erroneously high. */ if (((unsigned int) min_gnt << shift_factor) > 512 || ((min_gnt << shift_factor) & 0xff) == 0) { ltimer = 8 << shift_factor; } else { ltimer = min_gnt << shift_factor; } } pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);}void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *pdev; int all_are_66mhz; u16 status; if (pbm->is_66mhz_capable == 0) { all_are_66mhz = 0; goto out; } all_are_66mhz = 1; list_for_each_entry(pdev, &pbus->devices, bus_list) { pci_read_config_word(pdev, PCI_STATUS, &status); if (!(status & PCI_STATUS_66MHZ)) { all_are_66mhz = 0; break; } }out: pbm->all_devs_66mhz = all_are_66mhz; printk("PCI%d(PBM%c): Bus running at %dMHz\n", pbm->parent->index, (pbm == &pbm->parent->pbm_A) ? 'A' : 'B', (all_are_66mhz ? 66 : 33));}void pci_setup_busmastering(struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *dev; struct pci_bus *bus; int is_66mhz; is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz; list_for_each_entry(dev, &pbus->devices, bus_list) pdev_setup_busmastering(dev, is_66mhz); list_for_each_entry(bus, &pbus->children, node) pci_setup_busmastering(pbm, bus);}void pci_register_legacy_regions(struct resource *io_res, struct resource *mem_res){ struct resource *p; /* VGA Video RAM. */ p = kzalloc(sizeof(*p), GFP_KERNEL); if (!p) return; p->name = "Video RAM area"; p->start = mem_res->start + 0xa0000UL; p->end = p->start + 0x1ffffUL; p->flags = IORESOURCE_BUSY; request_resource(mem_res, p); p = kzalloc(sizeof(*p), GFP_KERNEL); if (!p) return; p->name = "System ROM"; p->start = mem_res->start + 0xf0000UL; p->end = p->start + 0xffffUL; p->flags = IORESOURCE_BUSY; request_resource(mem_res, p); p = kzalloc(sizeof(*p), GFP_KERNEL); if (!p) return; p->name = "Video ROM"; p->start = mem_res->start + 0xc0000UL; p->end = p->start + 0x7fffUL; p->flags = IORESOURCE_BUSY; request_resource(mem_res, p);}/* Generic helper routines for PCI error reporting. */void pci_scan_for_target_abort(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *pdev; struct pci_bus *bus; list_for_each_entry(pdev, &pbus->devices, bus_list) { u16 status, error_bits; pci_read_config_word(pdev, PCI_STATUS, &status); error_bits = (status & (PCI_STATUS_SIG_TARGET_ABORT | PCI_STATUS_REC_TARGET_ABORT)); if (error_bits) { pci_write_config_word(pdev, PCI_STATUS, error_bits); printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n", p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), pci_name(pdev), status); } } list_for_each_entry(bus, &pbus->children, node) pci_scan_for_target_abort(p, pbm, bus);}void pci_scan_for_master_abort(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *pdev; struct pci_bus *bus; list_for_each_entry(pdev, &pbus->devices, bus_list) { u16 status, error_bits; pci_read_config_word(pdev, PCI_STATUS, &status); error_bits = (status & (PCI_STATUS_REC_MASTER_ABORT)); if (error_bits) { pci_write_config_word(pdev, PCI_STATUS, error_bits); printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n", p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), pci_name(pdev), status); } } list_for_each_entry(bus, &pbus->children, node) pci_scan_for_master_abort(p, pbm, bus);}void pci_scan_for_parity_error(struct pci_controller_info *p, struct pci_pbm_info *pbm, struct pci_bus *pbus){ struct pci_dev *pdev; struct pci_bus *bus; list_for_each_entry(pdev, &pbus->devices, bus_list) { u16 status, error_bits; pci_read_config_word(pdev, PCI_STATUS, &status); error_bits = (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)); if (error_bits) { pci_write_config_word(pdev, PCI_STATUS, error_bits); printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n", p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'), pci_name(pdev), status); } } list_for_each_entry(bus, &pbus->children, node) pci_scan_for_parity_error(p, pbm, bus);}
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