📄 digit_clock_top.v
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begin keydown_slowcnt <= keydown_slowcnt + 1; if(keydown_slowcnt==KEYDLY1S_CKS-1 && keydown_fastcnt==0) begin down_slow <= 1'b0; // no action at up key press 1st second. keydown_fastcnt <= keydown_fastcnt + 1; end else if(keydown_slowcnt==KEYDLY1S_CKS-1) begin down_slow <= 1'b1; keydown_fastcnt <= keydown_fastcnt + 1; end else begin down_slow <= 1'b0; keydown_fastcnt <= keydown_fastcnt; end end else begin down_slow <= 1'b0; keydown_slowcnt <= 3'b000; keydown_fastcnt <= 3'b000; endendalways @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) down_fast <= 1'b0; else if(keydown_fastcnt>=KEYDLYSEC) down_fast <= 1'b1; else down_fast <= 1'b0;endassign down_en = down_slow || down_fast || key_downp; // key_upp ensure to press key 1 time.//===================================================================// Set Time(Data Flow--Processor)//===================================================================/*always @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) t1s_count <= 3'b000; else if(set_time_state==2'b00) t1s_count <= t1s_count + 1; else t1s_count <= 3'b000;end*/always @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) begin setsec <= 8'h00; setmin <= 8'h00; sethour <= 8'h00; t1s_count <= 3'b000; end else case(set_time_state) 2'b00: // timing state. begin t1s_count <= t1s_count + 1; if(t1s_count==3'b111) // 1 second timing. begin //t1s_count <= 0; // automaticly back to 0. if(sethour==8'h23 && setmin==8'h59 && setsec==8'h59) begin setsec <= 8'h00; setmin <= 8'h00; sethour <= 8'h00; end else if(sethour[3:0]==4'h9 && setmin==8'h59 && setsec==8'h59) begin sethour[3:0] <= 4'h0; sethour[7:4] <= sethour[7:4] + 1; setmin <= 8'h00; setsec <= 8'h00; end else if(setmin==8'h59 && setsec==8'h59) begin sethour[3:0] <= sethour[3:0] + 1; setmin <= 8'h00; setsec <= 8'h00; end else if(setmin[3:0]==4'h9 && setsec==8'h59) begin setmin[7:4] <= setmin[7:4] + 1; setmin[3:0] <= 4'h0; setsec <= 8'h00; end else if(setsec==8'h59) begin setmin[3:0] <= setmin[3:0] + 1; setsec <= 8'h00; end else if(setsec[3:0]==4'h9) begin setsec[7:4] <= setsec[7:4] + 1; setsec[3:0] <= 4'h0; end else begin setsec[3:0] <= setsec[3:0] + 1; end end else begin setsec <= setsec; setmin <= setmin; sethour <= sethour; //t1s_count <= t1s_count; //如果有该句,t1s_count将一直为0 end end 2'b01: // set min time state. begin t1s_count <= 3'b000; setsec <= 8'h00; if(up_en) begin if(setmin==8'h59) setmin <= 8'h00; else if(setmin[3:0]==4'h9) begin setmin[3:0] <= 4'h0; setmin[7:4] <= setmin[7:4] + 1; end else setmin[3:0] <= setmin[3:0] + 1; end else if(down_en) begin if(setmin==8'h00) setmin <= 8'h59; else if(setmin[3:0]==4'h0) begin setmin[3:0] <= 4'h9; setmin[7:4] <= setmin[7:4] - 1; end else setmin[3:0] <= setmin[3:0] - 1; end // do not timing. end 2'b10: // set hour time state. begin t1s_count <= 3'b000; setsec <= 8'h00; if(up_en) // up prior to down. begin if(sethour==8'h23) sethour <= 8'h00; else if(sethour[3:0]==4'h9) begin sethour[3:0] <= 4'h0; sethour[7:4] <= sethour[7:4] + 1; end else sethour[3:0] <= sethour[3:0] + 1; end else if(down_en) begin if(sethour==8'h00) sethour <= 8'h23; else if(sethour[3:0]==4'h0) begin sethour[3:0] <= 4'h9; sethour[7:4] <= sethour[7:4] - 1; end else sethour[3:0] <= sethour[3:0] - 1; end end default: begin setsec <= setsec; setmin <= setmin; sethour <= sethour; t1s_count <= 3'b000; end endcaseend//===================================================================// Alarm Count Process(amin & ahour)//===================================================================always @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) begin amin <= 8'h00; ahour <= 8'h00; end else case(set_alarm_state) 2'b01: begin if(up_en) // up prior to down. begin if(amin==8'h59) amin <= 8'h00; else if(amin[3:0]==4'h9) begin amin[3:0] <= 4'h0; amin[7:4] <= amin[7:4] + 1; end else amin[3:0] <= amin[3:0] + 1; end else if(down_en) begin if(amin==8'h00) amin <= 8'h59; else if(amin[3:0]==4'h0) begin amin[3:0] <= 4'h9; amin[7:4] <= amin[7:4] - 1; end else amin[3:0] <= amin[3:0] - 1; end end 2'b10: begin if(up_en) begin if(ahour==8'h23) ahour <= 8'h00; else if(ahour[3:0]==4'h9) begin ahour[3:0] <= 4'h0; ahour[7:4] <= ahour[7:4] + 1; end else ahour[3:0] <= ahour[3:0] + 1; end else if(down_en) begin if(ahour==8'h00) ahour <= 8'h23; else if(ahour[3:0]==4'h0) begin ahour[3:0] <= 4'h9; ahour[7:4] <= ahour[7:4] - 1; end else ahour[3:0] <= ahour[3:0] - 1; end end default: begin amin <= amin; ahour <= ahour; end endcaseend//===================================================================// Alarm Clock Process//===================================================================always @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) alarm_en <= 1'b0; else if(alarm_valid && set_alarm_state==2'b00 && set_time_state==2'b00) if(sethour==ahour && setmin==amin) alarm_en <= 1'b1; else alarm_en <= 1'b0; else alarm_en <= 1'b0;endalways @(posedge clk_in or negedge rst_n) if(!rst_n) clk_cnt <= 24'b0; else clk_cnt <= clk_cnt + 1;assign clk_6mhz = (clk_cnt[2]||(clk_cnt[1]&&clk_cnt[0]));assign clk_4hz = (clk_cnt[22]&&clk_cnt[23]);SPEAKER SPEAKER( .clk_6mhz(clk_6mhz), .clk_4hz(clk_4hz), .rstn(rst_n), .en(alarm_en && !key_disable), .sp(alert));//key disable alarm speakeralways @(posedge clk_8Hz or negedge rst_n)begin if(!rst_n) key_disable <= 1'b0; //else if((sethour==ahour) && (setmin==amin) && alarm_valid)
else if(set_alarm_state==2'b00) if(disalarm0 || disalarm1) key_disable <= 1'b1; else if(sethour!=ahour || setmin!=amin) key_disable <= 1'b0;
else if((sethour==ahour) && (setmin==amin))
key_disable <= key_disable; else key_disable <= 1'b0;end//===================================================================// Decoder & SEG7 LED Display//===================================================================assign cnt0 = (mode) ? amin[3:0] : setmin[3:0];assign cnt1 = (mode) ? amin[7:4] : setmin[7:4];assign cnt2 = (mode) ? ahour[3:0] : sethour[3:0];assign cnt3 = (mode) ? ahour[7:4] : sethour[7:4];SEG7LED_ITF SEG7LED_ITF( .clk(clk_1k), .rstn(rst_n), .load(1'b1), .disable_en(mode && !alarm_valid), // alarm set valid to display. .bcd0(cnt0), .bcd1(cnt1), .bcd2(cnt2), .bcd3(cnt3), .dp0(alarm_valid), // dp0 shows if alarm is set. .dp1(1'b0),//alarm_en .dp2(clk_1Hz || mode), .dp3(1'b0),//key_disable .seg_en0(min_en), .seg_en1(min_en), .seg_en2(hour_en), .seg_en3(hour_en), .seg7_bit({SEG_LED_S0,SEG_LED_S1,SEG_LED_S2,SEG_LED_S3}), .seg7_led({data7,data6,data5,data4,data3,data2,data1,data0}));endmodule
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