📄 gdb.h
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#ifndef GDB_H#define GDB_H#ifdef GDB#include "spr_defs.h"//--------------------------------------------------------------------------// Utilities// Move from architecture special register (SPR)#define MFSPR(_spr_) \({ long _result_; \ asm volatile ("l.mfspr %0, r0, %1;" \ : "=r"(_result_) \ : "K"(_spr_) \ ); \ _result_;})// Move data to architecture special registers (SPR)#define MTSPR(_spr_, _val_) \({ long val = _val_; \ asm volatile ("l.mtspr r0, %0, %1;" \ : \ : "r"(val), "K"(_spr_) \ ); \ })#ifndef WRITE_REG_32#define WRITE_REG_32(A,B) (*(volatile unsigned long *)(A)) = (B)#define READ_REG_32(A) (*(volatile unsigned long *)(A))#endif//--------------------------------------------------------------------------// support// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to// occur if executed.// HAL_BREAKINST is the value of the breakpoint instruction and...// HAL_BREAKINST_SIZE is its size in bytes and...// HAL_BREAKINST_TYPE is its type.#define HAL_SET_STACK_PTR() \({ asm volatile ("l.movhi r1,0xf001"); \ asm volatile ("l.ori r1,r1,0x6800"); \ })#define HAL_GDB_INIT_PPTR ((void(**)(void))0xf0017008)#define HAL_BREAKPOINT_PPTR ((void(**)(void))0xf0017004)// Enable both tick timer and external interrupts in the Supervisor Register#define HAL_ENABLE_INTERRUPTS() \ MTSPR(SPR_SR, MFSPR(SPR_SR) | (SPR_SR_IEE|SPR_SR_TEE))#define HAL_GDB_INIT() \({ HAL_SET_STACK_PTR(); \ WRITE_REG_32(0x10000000, READ_REG_32(0x10000000) | 0x00001000); \ (**HAL_GDB_INIT_PPTR)(); \ HAL_ENABLE_INTERRUPTS(); \ })#define HAL_BREAKPOINT() (**HAL_BREAKPOINT_PPTR)()#else#define HAL_ENABLE_INTERRUPTS()#define HAL_GDB_INIT()#define HAL_BREAKPOINT()#endif#endif
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