📄 fuzzypid.mdl
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BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType TransferFcn
Numerator "[1]"
Denominator "[1 2 1]"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType TransportDelay
DelayTime "1"
InitialInput "0"
BufferSize "1024"
PadeOrder "0"
TransDelayFeedthrough off
}
Block {
BlockType ZeroPole
Zeros "[1]"
Poles "[0 1]"
Gain "[1]"
AbsoluteTolerance "auto"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "fuzzypid"
Location [2, 80, 1278, 754]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Sum
Name "Add"
Ports [3, 1]
Position [625, 399, 655, 431]
Inputs "+++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add1"
Ports [2, 1]
Position [100, 217, 130, 248]
Inputs "+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sum
Name "Add2"
Ports [2, 1]
Position [995, 242, 1025, 273]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
SaturateOnIntegerOverflow off
}
Block {
BlockType Demux
Name "Demux"
Ports [1, 3]
Position [420, 186, 425, 224]
BackgroundColor "black"
ShowName off
Outputs "3"
DisplayOption "bar"
}
Block {
BlockType Derivative
Name "Derivative"
Position [205, 180, 235, 210]
}
Block {
BlockType Derivative
Name "Derivative1"
Position [335, 445, 365, 475]
}
Block {
BlockType Display
Name "Display"
Ports [1]
Position [1120, 300, 1210, 330]
Decimation "1"
}
Block {
BlockType Reference
Name "Fuzzy Logic \nController"
Ports [1, 1]
Position [335, 181, 395, 229]
FontName "Arial"
SourceBlock "fuzblock/Fuzzy Logic \nController"
SourceType "FIS"
ShowPortLabels on
fis "fuzzpidrules"
}
Block {
BlockType Gain
Name "Gain"
Position [255, 177, 290, 213]
Gain "0.1"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Gain1"
Position [250, 225, 280, 255]
Gain "100"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Gain
Name "Gain2"
Position [695, 385, 725, 415]
Gain "0.2"
ParameterDataTypeMode "Inherit via internal rule"
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [335, 395, 365, 425]
}
Block {
BlockType Mux
Name "Mux"
Ports [2, 1]
Position [305, 186, 310, 224]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Reference
Name "PID Controller"
Ports [1, 1]
Position [600, 120, 630, 150]
SourceBlock "simulink_extras/Additional\nLinear/PID Controll"
"er"
SourceType "PID Controller"
ShowPortLabels on
P "0.2"
I "0.0077"
D "0.5"
}
Block {
BlockType Scope
Name "Scope"
Ports [1]
Position [665, 209, 695, 241]
Location [1, 52, 1281, 773]
Open off
NumInputPorts "1"
ZoomMode "yonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
DataFormat "StructureWithTime"
}
Block {
BlockType Scope
Name "Scope1"
Ports [1]
Position [1155, 228, 1185, 262]
Location [5, 56, 1285, 777]
Open off
NumInputPorts "1"
ZoomMode "yonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
TimeRange "1000"
YMin "9.88372"
YMax "10.2527"
SaveName "ScopeData1"
DataFormat "StructureWithTime"
}
Block {
BlockType Step
Name "Step"
Position [15, 210, 45, 240]
After "10"
SampleTime "0"
}
Block {
BlockType Step
Name "Step2"
Position [745, 15, 775, 45]
SampleTime "0"
}
Block {
BlockType Switch
Name "Switch"
Position [755, 70, 785, 100]
Threshold "1"
InputSameDT off
SaturateOnIntegerOverflow off
}
Block {
BlockType TransferFcn
Name "Transfer Fcn"
Position [810, 142, 870, 178]
Numerator "4"
Denominator "[5 1]"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay1"
Position [885, 145, 915, 175]
DelayTime "5"
}
Block {
BlockType ZeroPole
Name "Zero-Pole1"
Position [865, 12, 925, 48]
Zeros "[]"
Poles "[-2 -1]"
Gain "[0.5]"
}
Block {
BlockType Product
Name "d"
Ports [2, 1]
Position [475, 437, 505, 468]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "i"
Ports [2, 1]
Position [475, 387, 505, 418]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "p"
Ports [2, 1]
Position [475, 327, 505, 358]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Line {
SrcBlock "Step"
SrcPort 1
DstBlock "Add1"
DstPort 1
}
Line {
SrcBlock "Add1"
SrcPort 1
Points [15, 0; 0, 0]
Branch {
Points [0, -100]
DstBlock "PID Controller"
DstPort 1
}
Branch {
Points [0, 0]
Branch {
Points [35, 0]
Branch {
Points [50, 0]
DstBlock "Gain1"
DstPort 1
}
Branch {
Points [0, -40]
DstBlock "Derivative"
DstPort 1
}
Branch {
Points [0, 115]
Branch {
Points [0, 60]
Branch {
Points [0, 0]
DstBlock "Integrator"
DstPort 1
}
Branch {
Points [0, 50]
DstBlock "Derivative1"
DstPort 1
}
}
Branch {
Points [0, 0]
DstBlock "p"
DstPort 2
}
}
}
Branch {
Points [0, 0; 0, -150]
DstBlock "Switch"
DstPort 2
}
}
}
Line {
SrcBlock "Derivative"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Gain1"
SrcPort 1
Points [5, 0]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fuzzy Logic \nController"
DstPort 1
}
Line {
SrcBlock "Fuzzy Logic \nController"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 1
Points [20, 0; 0, 140]
DstBlock "p"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 2
Points [10, 0; 0, 190]
DstBlock "i"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 3
Points [0, 230]
DstBlock "d"
DstPort 1
}
Line {
SrcBlock "Derivative1"
SrcPort 1
DstBlock "d"
DstPort 2
}
Line {
SrcBlock "Integrator"
SrcPort 1
DstBlock "i"
DstPort 2
}
Line {
SrcBlock "Transfer Fcn"
SrcPort 1
DstBlock "Transport\nDelay1"
DstPort 1
}
Line {
SrcBlock "i"
SrcPort 1
Points [10, 0; 0, 10]
DstBlock "Add"
DstPort 2
}
Line {
SrcBlock "p"
SrcPort 1
Points [95, 0; 0, 60]
DstBlock "Add"
DstPort 1
}
Line {
SrcBlock "d"
SrcPort 1
Points [100, 0]
DstBlock "Add"
DstPort 3
}
Line {
SrcBlock "Add"
SrcPort 1
Points [10, 0; 0, -15]
DstBlock "Gain2"
DstPort 1
}
Line {
SrcBlock "PID Controller"
SrcPort 1
Points [20, 0]
Branch {
Points [85, 0]
DstBlock "Switch"
DstPort 3
}
Branch {
Points [-5, 0]
DstBlock "Scope"
DstPort 1
}
}
Line {
SrcBlock "Gain2"
SrcPort 1
Points [5, 0; 0, -325]
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Switch"
SrcPort 1
Points [0, 75]
DstBlock "Transfer Fcn"
DstPort 1
}
Line {
SrcBlock "Step2"
SrcPort 1
DstBlock "Zero-Pole1"
DstPort 1
}
Line {
SrcBlock "Zero-Pole1"
SrcPort 1
Points [25, 0; 0, 220]
DstBlock "Add2"
DstPort 1
}
Line {
SrcBlock "Transport\nDelay1"
SrcPort 1
Points [30, 0; 0, 105]
DstBlock "Add2"
DstPort 2
}
Line {
SrcBlock "Add2"
SrcPort 1
Points [25, 0; 0, 0]
Branch {
Points [50, 0]
DstBlock "Display"
DstPort 1
}
Branch {
Points [0, 260; -970, 0]
DstBlock "Add1"
DstPort 2
}
Branch {
Labels [1, 0]
Points [0, -15]
DstBlock "Scope1"
DstPort 1
}
}
}
}
# Finite State Machines
#
# Stateflow Version 6.0 (R14) dated Apr 30 2004, 06:19:14
#
#
Stateflow {
machine {
id 1
name "fuzzypid"
created "24-May-2008 15:08:23"
isLibrary 0
firstTarget 2
sfVersion 60014000.000006
}
target {
id 2
name "sfun"
description "Default Simulink S-Function Target."
machine 1
linkNode [1 0 0]
}
}
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