📄 allpid.mdl
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BlockType TransferFcn
Name "Transfer Fcn2"
Position [530, 917, 590, 953]
Numerator "[4]"
Denominator "[5 1]"
}
Block {
BlockType TransferFcn
Name "Transfer Fcn3"
Position [455, 567, 515, 603]
Numerator "[4]"
Denominator "[5 1]"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay1"
Position [885, 90, 915, 120]
DelayTime "5"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay2"
Position [620, 915, 650, 945]
DelayTime "5"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay3"
Position [575, 570, 605, 600]
DelayTime "5"
}
Block {
BlockType ZeroPole
Name "Zero-Pole1"
Position [585, 742, 645, 778]
Zeros "[]"
Poles "[-2 -1]"
Gain "[0.5]"
}
Block {
BlockType ZeroPole
Name "Zero-Pole2"
Position [360, 782, 420, 818]
Zeros "[ -0.2]"
Poles "[-2 -1]"
Gain "[-0.25]"
}
Block {
BlockType ZeroPole
Name "Zero-Pole3"
Position [890, 12, 950, 48]
Zeros "[]"
Poles "[-2 -1]"
Gain "[0.5]"
}
Block {
BlockType ZeroPole
Name "Zero-Pole4"
Position [545, 502, 605, 538]
Zeros "[]"
Poles "[-2 -1]"
Gain "[0.5]"
}
Block {
BlockType Product
Name "d"
Ports [2, 1]
Position [475, 382, 505, 413]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "i"
Ports [2, 1]
Position [475, 332, 505, 363]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "p"
Ports [2, 1]
Position [475, 272, 505, 303]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Line {
SrcBlock "Step"
SrcPort 1
DstBlock "Add1"
DstPort 1
}
Line {
SrcBlock "Add1"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 0]
Branch {
Points [0, -150]
DstBlock "Switch"
DstPort 2
}
Branch {
Points [35, 0]
Branch {
Points [0, 115]
Branch {
DstBlock "p"
DstPort 2
}
Branch {
Points [0, 60]
Branch {
Points [0, 50]
DstBlock "Derivative1"
DstPort 1
}
Branch {
DstBlock "Integrator"
DstPort 1
}
}
}
Branch {
Points [0, -40]
DstBlock "Derivative"
DstPort 1
}
Branch {
Points [50, 0]
DstBlock "Gain1"
DstPort 1
}
}
}
Branch {
Points [0, -100]
DstBlock "PID Controller"
DstPort 1
}
}
Line {
SrcBlock "Derivative"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Gain1"
SrcPort 1
Points [5, 0]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fuzzy Logic \nController"
DstPort 1
}
Line {
SrcBlock "Fuzzy Logic \nController"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 1
Points [20, 0; 0, 140]
DstBlock "p"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 2
Points [10, 0; 0, 190]
DstBlock "i"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 3
Points [0, 230]
DstBlock "d"
DstPort 1
}
Line {
SrcBlock "Derivative1"
SrcPort 1
DstBlock "d"
DstPort 2
}
Line {
SrcBlock "Integrator"
SrcPort 1
DstBlock "i"
DstPort 2
}
Line {
SrcBlock "Transfer Fcn"
SrcPort 1
DstBlock "Transport\nDelay1"
DstPort 1
}
Line {
SrcBlock "i"
SrcPort 1
Points [10, 0; 0, 10]
DstBlock "Add"
DstPort 2
}
Line {
SrcBlock "p"
SrcPort 1
Points [95, 0; 0, 60]
DstBlock "Add"
DstPort 1
}
Line {
SrcBlock "d"
SrcPort 1
Points [100, 0]
DstBlock "Add"
DstPort 3
}
Line {
SrcBlock "Add"
SrcPort 1
Points [10, 0; 0, -15]
DstBlock "Gain2"
DstPort 1
}
Line {
SrcBlock "PID Controller"
SrcPort 1
Points [0, 0; 20, 0]
Branch {
Points [-5, 0]
DstBlock "Scope"
DstPort 1
}
Branch {
Points [85, 0]
DstBlock "Switch"
DstPort 3
}
}
Line {
SrcBlock "Gain2"
SrcPort 1
Points [5, 0; 0, -325]
DstBlock "Switch"
DstPort 1
}
Line {
SrcBlock "Switch"
SrcPort 1
Points [0, 75]
DstBlock "Transfer Fcn"
DstPort 1
}
Line {
SrcBlock "Mux1"
SrcPort 1
Points [25, 0; 0, -155; 5, 0]
Branch {
DstBlock "Scope1"
DstPort 1
}
Branch {
Points [-5, 0]
DstBlock "Display"
DstPort 1
}
}
Line {
SrcBlock "Step3"
SrcPort 1
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "Transfer Fcn2"
SrcPort 1
Points [0, -5]
DstBlock "Transport\nDelay2"
DstPort 1
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "PID Controller2"
DstPort 1
}
Line {
SrcBlock "Transport\nDelay2"
SrcPort 1
DstBlock "Add2"
DstPort 2
}
Line {
SrcBlock "Add2"
SrcPort 1
Points [0, 0; 70, 0]
Branch {
Points [0, -70]
DstBlock "Display1"
DstPort 1
}
Branch {
Points [0, 130; -525, 0]
DstBlock "Sum1"
DstPort 2
}
Branch {
Points [350, 0]
DstBlock "Mux1"
DstPort 3
}
}
Line {
SrcBlock "PID Controller2"
SrcPort 1
Points [45, 0]
DstBlock "Add3"
DstPort 2
}
Line {
SrcBlock "Add3"
SrcPort 1
DstBlock "Transfer Fcn2"
DstPort 1
}
Line {
SrcBlock "Zero-Pole1"
SrcPort 1
Points [30, 0]
DstBlock "Add2"
DstPort 1
}
Line {
SrcBlock "Step2"
SrcPort 1
Points [0, 0; 40, 0]
Branch {
DstBlock "Zero-Pole1"
DstPort 1
}
Branch {
Points [0, 40]
DstBlock "Zero-Pole2"
DstPort 1
}
}
Line {
SrcBlock "Zero-Pole2"
SrcPort 1
Points [5, 0]
DstBlock "Add3"
DstPort 1
}
Line {
SrcBlock "Step4"
SrcPort 1
DstBlock "Zero-Pole3"
DstPort 1
}
Line {
SrcBlock "Transport\nDelay1"
SrcPort 1
Points [25, 0; 0, -25]
DstBlock "Add4"
DstPort 2
}
Line {
SrcBlock "Zero-Pole3"
SrcPort 1
Points [10, 0; 0, 35]
DstBlock "Add4"
DstPort 1
}
Line {
SrcBlock "Add4"
SrcPort 1
Points [30, 0; 0, 405; 5, 0]
Branch {
DstBlock "Mux1"
DstPort 1
}
Branch {
Points [-975, 0]
DstBlock "Add1"
DstPort 2
}
}
Line {
SrcBlock "Step5"
SrcPort 1
Points [5, 0; 0, -5]
DstBlock "Sum2"
DstPort 1
}
Line {
SrcBlock "Transfer Fcn3"
SrcPort 1
DstBlock "Transport\nDelay3"
DstPort 1
}
Line {
SrcBlock "PID Controller3"
SrcPort 1
DstBlock "Transfer Fcn3"
DstPort 1
}
Line {
SrcBlock "Sum2"
SrcPort 1
DstBlock "PID Controller3"
DstPort 1
}
Line {
SrcBlock "Step6"
SrcPort 1
Points [80, 0]
DstBlock "Zero-Pole4"
DstPort 1
}
Line {
SrcBlock "Transport\nDelay3"
SrcPort 1
DstBlock "Add5"
DstPort 2
}
Line {
SrcBlock "Zero-Pole4"
SrcPort 1
Points [90, 0]
DstBlock "Add5"
DstPort 1
}
Line {
SrcBlock "Add5"
SrcPort 1
Points [0, 0; 15, 0]
Branch {
Points [0, -60]
DstBlock "Display2"
DstPort 1
}
Branch {
Points [0, 90; -495, 0]
DstBlock "Sum2"
DstPort 2
}
Branch {
Points [215, 0; 0, -90]
DstBlock "Mux1"
DstPort 2
}
}
}
}
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