de2_tv.smp_dump.txt

本源码是用verilog编写控制LCD——使用Quartusii

State Machine - |DE2_LCD|LCD_TEST:u1|mLCD_ST
Name mLCD_ST.000011 mLCD_ST.000001 mLCD_ST.000010 mLCD_ST.000000 
mLCD_ST.000000 0 0 0 0 
mLCD_ST.000010 0 0 1 1 
mLCD_ST.000001 0 1 0 1 
mLCD_ST.000011 1 0 0 1 

State Machine - |DE2_LCD|LCD_TEST:u1|LCD_Controller:u0|ST
Name ST.11 ST.01 ST.10 ST.00 
ST.00 0 0 0 0 
ST.10 0 0 1 1 
ST.01 0 1 0 1 
ST.11 1 0 0 1