de2_tv.fit.talkback.xml
来自「本源码是用verilog编写控制LCD——使用Quartusii」· XML 代码 · 共 1,976 行 · 第 1/5 页
XML
1,976 行
<x_coordinate>0</x_coordinate>
<y_coordinate>15</y_coordinate>
<cell_number>2</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[1]</name>
<pin__>P6</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>15</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[2]</name>
<pin__>P7</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>15</y_coordinate>
<cell_number>0</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[3]</name>
<pin__>T9</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>16</y_coordinate>
<cell_number>3</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[4]</name>
<pin__>R5</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>16</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[5]</name>
<pin__>R4</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>16</y_coordinate>
<cell_number>0</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX5[6]</name>
<pin__>R3</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>17</y_coordinate>
<cell_number>3</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[0]</name>
<pin__>R2</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>17</y_coordinate>
<cell_number>2</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[1]</name>
<pin__>P4</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>17</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[2]</name>
<pin__>P3</pin__>
<i_o_bank>1</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>17</y_coordinate>
<cell_number>0</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[3]</name>
<pin__>M2</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>23</y_coordinate>
<cell_number>4</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[4]</name>
<pin__>M3</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>23</y_coordinate>
<cell_number>3</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[5]</name>
<pin__>M5</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>23</y_coordinate>
<cell_number>2</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX6[6]</name>
<pin__>M4</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>23</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX7[0]</name>
<pin__>L3</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>24</y_coordinate>
<cell_number>4</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX7[1]</name>
<pin__>L2</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>24</y_coordinate>
<cell_number>3</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX7[2]</name>
<pin__>L9</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>24</y_coordinate>
<cell_number>2</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX7[3]</name>
<pin__>L6</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>24</y_coordinate>
<cell_number>1</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
<name>HEX7[4]</name>
<pin__>L7</pin__>
<i_o_bank>2</i_o_bank>
<x_coordinate>0</x_coordinate>
<y_coordinate>24</y_coordinate>
<cell_number>0</cell_number>
<output_register>no</output_register>
<output_enable_register>no</output_enable_register>
<power_up_high>no</power_up_high>
<pci_i_o_enabled>no</pci_i_o_enabled>
<open_drain>no</open_drain>
<tri_primitive>no</tri_primitive>
<bus_hold>no</bus_hold>
<weak_pull_up>Off</weak_pull_up>
<i_o_standard>LVTTL</i_o_standard>
<current_strength>24mA</current_strength>
<termination>Off</termination>
<location_assigned_by>User</location_assigned_by>
<load units="pF">0</load>
</row>
<row>
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