pmlgates.abl

自己编写的GAL可编程逻辑电路的编译软件abel4的windows界面

module PMLGATES
title 'Simple Gate Implementations  Signetics PLHS501 Application Note 1
Joe Peterson    Data I/O Corp.   6 Aug 1990'

        pmlgates        device  'PML501';

        A,B,C,D                         pin  9,10,11,12;
        F1,F2,F3,F4,F5,F6               pin 40,15,39,16,38,17;
        F1o,F2o,F3o,F4o,F5o,F6o         pin 24,19,25,21,26,22;
        F1x,F2x,F3x,F4x,F5x,F6x,F7x     pin 28,29,30,31,32,33,35;

        "The 72 foldback NAND gates are Nodes 53 to 124
        N53,N54,N55                     node 53,54,55;

equations

        !N53 = A & B;
        !N54 = C & D;

equations "B Outputs
         F1  =    !N53 # !N54;    "AND-OR using !B output
         F2  =  !(!N53 # !N54);   "AND-OR-INVERT using  B output
         F3  =  !(A & B & C & D); "NAND using !B output
         F4  =    A & B & C & D;  "AND  using  B output
         F5  =    A # B # C # D;  "OR   using !B output
         F6  =  !(A # B # C # D); "NOR  using  B output

test_vectors    'B Outputs'
       ([A,B,C,D] -> [N53,N54,F1,F2,F3,F4,F5,F6])
        [0,0,0,0] -> [ 1 , 1 , 0, 1, 1, 0, 0, 1];
        [0,0,0,1] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [0,0,1,0] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [0,0,1,1] -> [ 1 , 0 , 1, 0, 1, 0, 1, 0];
        [0,1,0,0] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [0,1,0,1] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [0,1,1,0] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [0,1,1,1] -> [ 1 , 0 , 1, 0, 1, 0, 1, 0];
        [1,0,0,0] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [1,0,0,1] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [1,0,1,0] -> [ 1 , 1 , 0, 1, 1, 0, 1, 0];
        [1,0,1,1] -> [ 1 , 0 , 1, 0, 1, 0, 1, 0];
        [1,1,0,0] -> [ 0 , 1 , 1, 0, 1, 0, 1, 0];
        [1,1,0,1] -> [ 0 , 1 , 1, 0, 1, 0, 1, 0];
        [1,1,1,0] -> [ 0 , 1 , 1, 0, 1, 0, 1, 0];
        [1,1,1,1] -> [ 0 , 0 , 1, 0, 0, 1, 1, 0];

equations "XOR Outputs
        !N55 = 0;
         F1x = (N53 & N54) $ N55;         "AND-OR using XOR output
         F2x = (N53 & N54);               "AND-OR-INVERT using XOR output
         F3x = (A & B & C & D) $ N55;     "NAND using XOR output
         F4x = (A & B & C & D);           "AND  using XOR output
         F5x = (!A & !B & !C & !D) $ N55; "OR   using XOR output
         F6x = (!A & !B & !C & !D);       "NOR  using XOR output
         F7x =   A $ B;                   "XOR  using XOR output

test_vectors   'XOR Outputs'
       ([A,B,C,D] -> [N53,N54,N55,F1x,F2x,F3x,F4x,F5x,F6x,F7x])
        [0,0,0,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 0 , 1 , 0 ];
        [0,0,0,1] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 0 ];
        [0,0,1,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 0 ];
        [0,0,1,1] -> [ 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 0 ];
        [0,1,0,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [0,1,0,1] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [0,1,1,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [0,1,1,1] -> [ 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 1 ];
        [1,0,0,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [1,0,0,1] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [1,0,1,0] -> [ 1 , 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 ];
        [1,0,1,1] -> [ 1 , 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 1 ];
        [1,1,0,0] -> [ 0 , 1 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 0 ];
        [1,1,0,1] -> [ 0 , 1 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 0 ];
        [1,1,1,0] -> [ 0 , 1 , 1 , 1 , 0 , 1 , 0 , 1 , 0 , 0 ];
        [1,1,1,1] -> [ 0 , 0 , 1 , 1 , 0 , 0 , 1 , 1 , 0 , 0 ];
 
equations "O Outputs
        !F1o = (N53 & N54);         "AND-OR using !O output
         F2o = (N53 & N54);         "AND-OR-INVERT using O output
        !F3o = (A & B & C & D);     "NAND using !O output
         F4o = (A & B & C & D);     "AND  using  O output
        !F5o = (!A & !B & !C & !D); "OR   using !O output
         F6o = (!A & !B & !C & !D); "NOR  using  O output

test_vectors   'O Outputs'
       ([A,B,C,D] -> [N53,N54,F1o,F2o,F3o,F4o,F5o,F6o])
        [0,0,0,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 0 , 1 ];
        [0,0,0,1] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [0,0,1,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [0,0,1,1] -> [ 1 , 0 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [0,1,0,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [0,1,0,1] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [0,1,1,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [0,1,1,1] -> [ 1 , 0 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [1,0,0,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [1,0,0,1] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [1,0,1,0] -> [ 1 , 1 , 0 , 1 , 1 , 0 , 1 , 0 ];
        [1,0,1,1] -> [ 1 , 0 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [1,1,0,0] -> [ 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [1,1,0,1] -> [ 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [1,1,1,0] -> [ 0 , 1 , 1 , 0 , 1 , 0 , 1 , 0 ];
        [1,1,1,1] -> [ 0 , 0 , 1 , 0 , 0 , 1 , 1 , 0 ];

end