abelerr.mnu

自己编写的GAL可编程逻辑电路的编译软件abel4的windows界面

Syntax Error 1067: Only one label allowed.

You have specified a list of labels in a macro definition. Only one
label is allowed for each macro.
*1068,A
Syntax Error 1068: Block expected

A block was expected following a macro keyword or directive. A
block is a section of ABEL-HDL source statements enclosed by
braces.
*1069,A
Syntax Error 1069: Closing '}' of block not found.

A terminating '}' (right brace) delimiter was not found in the
source file.
*1070,A
Warning 1070: Pin number nn is already declared as 'xxxx'.

You have declared the same pin number for two different named
signals.
*1071,A
Syntax Error 1071: Closing ''' of string not found.

The terminating ''' (single quote) character was omitted from a
string. This Error can occur if a single quote (or back quote)
character is imbedded in a string without being prefixed by a '\'
(backslash) character.
*1072,A
Syntax Error 1072: ':+:' or ':*:' expected

You have specified @ALTERNATE (use alternate operators) and have
incorrectly specified an XOR or XNOR operation.
*1073,A
Syntax Error 1073: Constant label expected

The @CONST directive requires a constant label. This label must not
have been previously declared (as a signal, macro or other
identifier) except that it can be used in previous @CONST directive
statement.
*1074,A
Syntax Error 1074: '=' expected

The '=' (assignment operator) was omitted from an @CONST directive
or from a fuse assignment statement.

Syntax Error 1075: Undefined operation on signal.

A signal identifier is not legal in the current context.
*1076,A
Syntax Error 1076: Number is too large.

Numbers (either literal values or values produced by complex
expressions) must not exceed the maximum size of 32 bits
(unsigned).
*1077,A
Syntax Error 1077: ':>>' or '->>' expected

The ':>>' or '->>' operator was expected to delimit the input and
output portions of a test vector header or entry line.
*1078,A
Syntax Error 1078: ':>>' expected

The ':>>' operator was expected in a test vector entry line to
match the ':>>' operator found in the test vector header.
*1079,A
Syntax Error 1079: Radix nn is not one of 2, 8, 10 or 16.

The radix value specified in a @RADIX statement must be either 2
(binary), 8 (octal), 10 (decimal) or 16 (hexadecimal).
*1080,A
Syntax Error 1080: nn actual arguments expected

A macro or module was invoked with an incorrect number of actual
arguments.
*1081,A
Syntax Error 1081: Dummy argument expected

The '?' character indicates that the following sequence
of characters is a dummy argument. The Error indicates that the
dummy argument label does not match any of the dummy arguments
listed in the macro or module declaration.
*1082,A
Syntax Error 1082: Digit not in radix nn.

You have specified a radix value less than 10 (decimal) and have
used a digit that is not legal for that number system.
*1084,A
Warning 1084: Unrecognized attribute 'xxxx' - ignored.

The attribute string specified in an ISTYPE statement was not
recognized as a valid signal attribute.
*1085,A
Syntax Error 1085: 'xxxx' attribute not allowed on this pin.

The specified attribute is not legal for the device and pin or node
number indicated, or the attribute conflicts with a previous
attribute specified for the same signal.
*1086,A
Warning 1086: Signal 'xxxx' has not been declared as combinatorial.

You have written a combinatorial function for the indicated signal,
but have not specified that the signal is combinatorial (ISTYPE
'COM').
*1087,A
Warning 1087: Signal 'xxxx' has not been declared as registered.

You have written a registered (pin-to-pin) function for the
indicated signal, but have not declared the signal as registered
(ISTYPE 'REG' or ISTYPE 'REG_X' where X is a register type).
*1091,A
Logical Error 1091: nn actual arguments specified on command line.

The number of actual arguments specified on the AHDL2PLA command
line exceeds the number of dummy arguments specified in the MODULE
statement.
*1092,A
Syntax Error 1092: Use '#' for OR instead of '|'.

The '|' operator (used in some programming languages for a bitwise
OR) is not used in ABEL-HDL. Instead you should use the '#'
operator.
*1093,A
Syntax Error 1093: 'xxxx' undefined, maybe 'xxxx' was meant.

An identifier was encountered that is undefined, but a similar
identifier (one that matches if upper and lower case are ignored)
exists in the design.
*1094,A
Syntax Error 1094: No operators allowed in this context.

You have attempted to use a complex expression (one containing
operators) when only signals, numbers or special constants are
allowed. This Error most frequently occurs when dot extensions
are applied to complex expressions.
*1096,A
Logical Error 1096: Arithmetic error

A divide by zero or similar situation was encountered when
evaluating an expression.
*1098,A
Syntax Error 1098: Negative declaration not allowed.

Negative (active-low) declarations are only allowed in PIN and
NODE statements.
*1099,A
Syntax Error 1099: Invalid set range.

A range (specified with the '..' operator) is bounded by
incompatible signals or numbers. Ranges must be specified that will
result in 32 or fewer set elements.
*1100,A
Syntax Error 1100: Bad element 'xxxx' in range.

The expansion of a range expression resulted in the creation of
a previously unknown (undeclared) element.
*1101,A
Syntax Error 1101: Fuse number expected

A number was expected that corresponds to a fuse location in the
previously declared device.
*1102,A
Syntax Error 1102: Fuse value 1 or 0 expected

A fuse value was expected. A value of 1 indicates an intact fuse,
and a value of 1 indicates a programmed (blown) fuse.
*1103,A
Syntax Error 1103: Illegal nested set in state diagram header.

A state diagram state register must be specified as a set of
signals, and the set must not be nested (contain other sub-sets).
*1104,A
Syntax Error 1104: Dot extension 'xxxx' not legal in this context.

The indicated dot extension is either unrecognized, or was used in
an incorrect manner. Dot extensions can only be applied to signals
or sets if signals.
*1105,A
Syntax Error 1105: Signal label expected

An identifier was used that is not a previously declared signal,
and a signal was expected.
*1109,A
Syntax Error 1109: Register type of 'xxxx' does not match other
set elements.

State diagrams require matching register types. The state register
set specified contains signals of differing register types.
*1110,A
Syntax Error 1110: Pin nn (VCC) can't be used as input.

You have specified a device and pin number combination that cannot
be used as an input in your design.
*1111,A
Syntax Error 1111: Pin nn (GND) can't be used as input.

You have specified a device and pin number combination that cannot
be used as an input in your design.
*1113,A
Warning 1113: ENABLE keyword obsolete - use .OE extension instead.

The ENABLE keyword is no longer supported in ABEL-HDL. Instead, you
should use the '.OE' dot extension to indicate a three-state
output.
*1114,A
Syntax Error 1114: 'xxxx' attribute not allowed for state
registers.

The indicated attribute is illegal for describing state register
types. You must specify either 'COM', 'REG', or 'REG_X' where X is
a valid register type.
*1116,A
Syntax Error 1116: Multiple attribute list not allowed in this
context.

You have used the '=' operator to specify signal attributes
for signals that have not been assigned pins. You should use the
'ISTYPE' attribute to assign attributes instead of the '='
operator.
*1120,A
Syntax Error 1120: Only one device allowed.

Multiple device declarations are no longer supported in ABEL-HDL.
Instead, you should use the PLA splitter utility to split a large
design into multiple devices.
*1121,A
Syntax Error 1121: Device declaration must be made before signal
declarations.

If a device declaration is made in the source file, it must be
made before any signal declarations.
*1122,A
Logical Error 1122: File name 'xxxx.xxx' too long.

The indicated file name is too long for the operating system.
*1124,A
Warning 1124: 'INVERT' or 'BUFFER' not specified for 'xxxx' -
assuming 'buffer'.

You have not specified whether the indicated output signal will
have an inversion between the state register and the associated
output pin. No inversion will be assumed, resulting in possibly
incorrect operation if the design is implemented in a device with
inverting outputs.
*1126,A
Syntax Error 1126: Can't use ':=' operator with dot extensions.

The ':=' (clocked assignment) operator is used to describe the
operation of an registered output pin. If dot extensions are used,
you should use the '=' assignment operator, since dot extensions
(including register input ports) are inherently combinatorial.
*1128,A
Syntax Error 1128: Can't have operators in state register.

The state register set must consist of a set of signals, with no
complex operators.
*1129,A
Syntax Error 1129: Can't expand expression - possibly recursive
definition.

The AHDL2PLA compiler has detected a recursive constant
declaration. Check to make sure you have not referenced the same
identifier on both sides of the '=' operator.
*1130,A
Syntax Error 1130: Missing set element.

Set elements can consist of signals, numbers, special constants,
sets or expressions and are separated by commas. One of these items
was expected in the set.
*1131,A
Syntax Error 1131: Missing set range element.

The '..' (set range) operator was used with no second boundary
element.
*1132,A
Syntax Error 1132: Keyword IN no longer supported.

Multiple device declarations and corresponding device-specific
sections are no longer supported in ABEL-HDL. Instead, you should
use the PLA splitter utility to split a large design into multiple
devices.
*1133,A
Syntax Error 1133: Signal 'xxxx' already defined as type 'INVERT'.

You have specified the 'BUFFER' attribute for a signal that was
previously declared as 'INVERT'.
*1134,A
Syntax Error 1134: Signal 'xxxx' already defined as type 'BUFFER'.

You have specified the 'INVERT' attribute for a signal that was
previously declared as 'BUFFER'.
*1135,A
Fatal Error 1135: Unknown Error
*--PLAopt--,A
*2001,A
Fatal Error 2001: Requires an input file with a .TTn extension.

Plaopt requires input files with names such as m6809a.tt1 or
foo.tt4. The default output file would be m6809a.tt2 or foo.tt5.
*2002,A
Fatal Error 2002: Input and output file names are the
same 'file_name'.

The input and output files must have different names.
*2003,A
Fatal Error 2003: Can't open input file 'file_name'.

Input file not found.
*2004,A
Fatal Error 2004: AUXPLA and Output file names have the same
'file_name'.

The AUXPLA file from the input PLA file has the same name as
the output file. The AUXPLA is created when the @DCSET is used
in an ABEL source file.
*2005,A
Fatal Error 2005: Latte failed on 'file_name'.

While producing the @DCSET offsets, the espresso program
(latte) was not found or produced an internal error.
*2006,A
Fatal Error: Can't open input file 'file_name'.

While processing the @DCSET, PLAOpt could not open an working file.
*2007,A
Fatal Error 2007: Can't open AUXPLA file 'file_name'.

While processing the @DCSET, PLAOpt could not open the AUXPLA file.
*2008,A
Fatal Error 2008: Can't open output file 'file_name'.

While processing the @DCSET, PLAOpt could not open the output file.
*2009,A
Fatal Error 2009: Can't open input file 'file_name'.

While running '-reduce none', PLAOpt could not open the file.
*2010,A
Fatal Error 2010: Can't open output file 'file_name'.

While running '-reduce none', PLAOpt could not open the file.
*2011,A
Fatal Error 2011: Latte failed on 'file_name'.

While running '-reduce group fixed', the espresso program
(latte) was not found or produced an internal error.
*2012,A
Fatal Error 2012: Latte failed on 'file_name'.

While running '-reduce group choose', the espresso program
(latte) was not found or produced an internal error.
*2013,A
Fatal Error 2013: Can't open input file 'file_name'.

While running '-reduce group choose', PLAOpt could not open
the file.
*2014,A
Fatale Error 2014: Can't open output file 'file_name'.

While running '-reduce group choose', PLAOpt could not open
the file.
*2015,A
Fatal Error 2015: Latte (on-set) failed on 'file_name'.

While running '-reduce bypin fixed', the espresso program
(latte) was not found or produced an internal error.
*2016,A
Fatal Error 2016: Can't open input file 'file_name'.

While running '-reduce bypin fixed', PLAOpt could not open
the file.
*2017,A
Fatal Error 2017: Can't open output file 'file_name'.

While running '-reduce bypin fixed', PLAOpt could not open
the file.
*2019,A
Fatal Error 2019: Latte (on-set) failed on 'file_name'.

While running '-reduce bypin choose', the espresso program
(latte) was not found or produced an internal error.
*2020,A
Fatal Error 2020: Latte (off-set) failed on 'file_name'.

While running '-reduce bypin choose', the espresso program
(latte) was not found or produced an internal error.
*2021,A
Fatal Error 2021: Can't open input file 'file_name'.

While running '-reduce bypin choose', PLAOpt could not open
the file.
*2022,A
Fatal Error 2022: Can't open input file 'file_name'.

While running '-reduce bypin choose', PLAOpt could not open
the file.
*2023,A
Fatal Error 2023: Can't open output file 'file_name'.

While running '-reduce bypin choose', PLAOpt could not open
the file.
*2024,A