📄 bldc_ti.lst
字号:
0030 7000
214 .line 19
215 ;>>>> v->pid2.min_reg2 = 0x0000; /* Q15 */
216 0031 b900 LACK 0
217 0032 9080 SACL *
218 .line 20
219 ;>>>> v->pid2.k0_reg2 = 0x0080; /* Q9 */
220 0033 b980 LACK 128
221 0034 7c08 SBRK 8
222 0035 90a0 SACL *+
223 .line 21
224 ;>>>> v->pid2.k1_reg2 = 0x0140; /* Q13 */
225 0036 aea0 SPLK #320,*+
0037 0140
226 .line 22
227 ;>>>> v->pid2.kc_reg2 = 0x0506; /* Q13 */
228 0038 ae89 SPLK #1286,* ,AR1
0039 0506
229 003a EPI0_1:
230 .line 23
231 003a 7c02 SBRK 2
232 003b 0090 LAR AR0,*-
233 003c 7680 PSHD *
234 003d ef00 RET
235
236 .endfunc 179,000000000H,1
237
238 .sym _BLDC_TI_Run,_BLDC_TI_Run,32,2,0
239 .globl _BLDC_TI_Run
240
241 .func 271
242 ;>>>> void BLDC_TI_Run(BLDC_TI_handle v)
243 ******************************************************
244 * FUNCTION DEF : _BLDC_TI_Run
245 ******************************************************
246 003e _BLDC_TI_Run:
247
248 0000 LF2 .set 0
249
250 003e 8aa0 POPD *+
251 003f 80a0 SAR AR0,*+
252 0040 8180 SAR AR1,*
253 0041 b001 LARK AR0,1
254 0042 00ea LAR AR0,*0+,AR2
255
256 .sym _v,-3+LF2,24,9,16,.fake6
257 .line 2
258 .line 3
259 ;>>>> (*v->cmtn.calc)(&v->cmtn);
260 0043 bf0a LARK AR2,-3+LF2
0044 fffd
261 0045 8be0 MAR *0+
262 0046 1089 LAC * ,AR1
263 0047 b816 ADDK 22
TMS320C24xx COFF Assembler Version 7.04 Tue May 06 15:43:47 2008
Copyright (c) 1987-2003 Texas Instruments Incorporated
../temp/bldc_ti.asm PAGE 6
264 0048 90aa SACL *+,AR2
265 0049 038b LAR AR3,* ,AR3
266 004a 7828 ADRK 40
267 004b 1089 LAC * ,AR1
268 004c be30 CALA
269 004d 8b9a MAR *-,AR2
270 .line 5
271 ;>>>> if(FALSE == v->sp_up_done_flg) {
272 004e bf0a LARK AR2,-3+LF2
004f fffd
273 0050 8be0 MAR *0+
274 0051 038b LAR AR3,* ,AR3
275 0052 be47 SSXM
276 0053 7805 ADRK 5
277 0054 1080 LAC *
278 0055 e308 BNZ L1
0056 0083'
279 .line 6
280 ;>>>> (*v->rmp3.calc)(&v->rmp3);
281 0057 8b8a MAR * ,AR2
282 0058 1089 LAC * ,AR1
283 0059 b80f ADDK 15
284 005a 90ab SACL *+,AR3
285 005b 7810 ADRK 16
286 005c 1089 LAC * ,AR1
287 005d be30 CALA
288 005e 8b9a MAR *-,AR2
289 .line 7
290 ;>>>> v->sp_up_done_flg = v->rmp3.done_flg;
291 005f bf0a LARK AR2,-3+LF2
0060 fffd
292 0061 8be0 MAR *0+
293 0062 0380 LAR AR3,*
294 0063 048b LAR AR4,* ,AR3
295 0064 be47 SSXM
296 0065 7814 ADRK 20
297 0066 108c LAC * ,AR4
298 0067 7805 ADRK 5
299 0068 908b SACL * ,AR3
300 .line 8
301 ;>>>> v->cmtn_period_setpt = v->rmp3.out;
302 0069 8b90 MAR *-
303 006a 108c LAC * ,AR4
304 006b 7c04 SBRK 4
305 006c 908b SACL * ,AR3
306 .line 10
307 ;>>>> v->impl.period = v->rmp3.out;//脉冲周期信号
308 006d 108c LAC * ,AR4
309 006e 7807 ADRK 7
310 006f 908a SACL * ,AR2
311 .line 11
312 ;>>>> (*v->impl.calc)(&v->impl);
313 0070 1089 LAC * ,AR1
314 0071 b808 ADDK 8
TMS320C24xx COFF Assembler Version 7.04 Tue May 06 15:43:47 2008
Copyright (c) 1987-2003 Texas Instruments Incorporated
../temp/bldc_ti.asm PAGE 7
315 0072 90ab SACL *+,AR3
316 0073 7c08 SBRK 8
317 0074 1089 LAC * ,AR1
318 0075 be30 CALA
319 0076 8b9a MAR *-,AR2
320 .line 13
321 ;>>>> v->mod6.trig_in = v->impl.out;
322 ;>>>> else
323 0077 bf0a LARK AR2,-3+LF2
0078 fffd
324 0079 8be0 MAR *0+
325 007a 0380 LAR AR3,*
326 007b 048b LAR AR4,* ,AR3
327 007c be47 SSXM
328 007d 7809 ADRK 9
329 007e 108c LAC * ,AR4
330 007f 780c ADRK 12
331 0080 9080 SACL *
332 0081 7980 B L2
0082 0089'
333 0083 L1:
334 .line 17
335 ;>>>> v->mod6.trig_in = v->cmtn.trig; /* Closed Loop */
336 0083 8b8a MAR * ,AR2
337 0084 048b LAR AR4,* ,AR3
338 0085 7811 ADRK 17
339 0086 108c LAC * ,AR4
340 0087 780c ADRK 12
341 0088 9080 SACL *
342 0089 L2:
343 .line 19
344 ;>>>> (*v->mod6.calc)(&v->mod6); /* Open Loop */
345 0089 8b8a MAR * ,AR2
346 008a 1089 LAC * ,AR1
347 008b b80c ADDK 12
348 008c 90ac SACL *+,AR4
349 008d 7802 ADRK 2
350 008e 1089 LAC * ,AR1
351 008f be30 CALA
352 0090 8b9a MAR *-,AR2
353 .line 21
354 ;>>>> v->cmtn.ptr_ct = v->mod6.cntr; /* Input to COMMUTATION_TRIGGER */
355 0091 bf0a LARK AR2,-3+LF2
0092 fffd
356 0093 8be0 MAR *0+
357 0094 0380 LAR AR3,*
358 0095 048b LAR AR4,* ,AR3
359 0096 be47 SSXM
360 0097 780d ADRK 13
361 0098 108c LAC * ,AR4
362 0099 781b ADRK 27
363 009a 908b SACL * ,AR3
364 .line 23
365 ;>>>> v->pid2.ref_reg2 = v->current_set;
TMS320C24xx COFF Assembler Version 7.04 Tue May 06 15:43:47 2008
Copyright (c) 1987-2003 Texas Instruments Incorporated
../temp/bldc_ti.asm PAGE 8
366 009b 7c07 SBRK 7
367 009c 108c LAC * ,AR4
368 009d 780f ADRK 15
369 009e 908a SACL * ,AR2
370 .line 24
371 ;>>>> (*v->pid2.calc)(&v->pid2); /*
372 ;>>>> ---------------------------------------------------------------------------
373 ;>>>> Uses PID result when the flag is set, i.e., I_loop_flg=1
374 ;>>>> Implements ramp control of D_func during open current loop
375 ;>>>> control, i.e., I_loop_flg=0
376 ;>>>> ---------------------------------------------------------------------------*/
377 009f 1089 LAC * ,AR1
378 00a0 b829 ADDK 41
379 00a1 90ab SACL *+,AR3
380 00a2 782f ADRK 47
381 00a3 1089 LAC * ,AR1
382 00a4 be30 CALA
383 00a5 8b9a MAR *-,AR2
384 .line 30
385 ;>>>> if(FALSE == v->I_loop_flg){
386 00a6 bf0a LARK AR2,-3+LF2
00a7 fffd
387 00a8 8be0 MAR *0+
388 00a9 038b LAR AR3,* ,AR3
389 00aa be47 SSXM
390 00ab 7803 ADRK 3
391 00ac 1080 LAC *
392 00ad e308 BNZ L3
00ae 00bb'
393 .line 31
394 ;>>>> v->rmp2.desired = v->D_func_desired;
395 00af 8baa MAR *+,AR2
396 00b0 048b LAR AR4,* ,AR3
397 00b1 108c LAC * ,AR4
398 00b2 783a ADRK 58
399 00b3 908a SACL * ,AR2
400 .line 32
401 ;>>>> (*v->rmp2.calc)(&v->rmp2);
402 00b4 1089 LAC * ,AR1
403 00b5 b836 ADDK 54
404 00b6 90ab SACL *+,AR3
405 00b7 7838 ADRK 56
406 00b8 1089 LAC * ,AR1
407 00b9 be30 CALA
408 00ba 8b90 MAR *-
409 00bb L3:
410 00bb EPI0_2:
411 .line 34
412 00bb 8b89 MAR * ,AR1
413 00bc 7c02 SBRK 2
414 00bd 0090 LAR AR0,*-
415 00be 7680 PSHD *
416 00bf ef00 RET
417
TMS320C24xx COFF Assembler Version 7.04 Tue May 06 15:43:47 2008
Copyright (c) 1987-2003 Texas Instruments Incorporated
../temp/bldc_ti.asm PAGE 9
418 .endfunc 304,000000000H,1
419 .end
No Errors, No Warnings
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -