📄 csl_idma.c
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/* ============================================================================
* Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
*
* Use of this software is controlled by the terms and conditions found in the
* license agreement under which this software has been supplied.
* ============================================================================
*/
/** ============================================================================
* @file csl_idma.c
*
* @path $(CSLPATH)\src\idma
*
* @desc File for functional layer of IDMA
*
*/
/* =============================================================================
* Revision History
* ===============
* - 23-Jun-2004 Chad Courtney File Created
*
******************************************************************************/
/*
* REVISION HISTORY:
* 03-25-04...Initial version of Channel 1 routines.......S.Jagadeesh
* 05-20-04...Integration of CSL Register Layer...........C.Courtney
* 06-10-04...Changed Return Types of all functions except Open to
* Status......................................C.Courtney
* 06-14-04...Removed Open/Close APIs and re-implemented Init API
* Also redocumented...........................C.Courtney
*
* DESCRIPTION:
* This file contains various function defeinitions that define a
* IDMA (Internal DMA). Functions for Channel0 contain
* support for transferring from internal memory to memory
* hooked to Config space. Channel 1 functions contain support
* for paging from local memories. These may be from Level 1
* data memory to Level 2 memory or shared L2 memory.
*
* PRIVATE DATA STRUCTURES:
*
* Private data structures are defined in the header file "idma.h"
* and are shown below:
*
* typedef struct idma1_handle
* {
* Uint32 status;
* Uint32 reserved;
* Uint32 *src;
* Uint32 *dst;
* Uint32 cnt;
* }IDMA1_handle;
*
* This handle holds all the descriptors needed to issue a Channel 1
* transfer. In the routines shown below, the cnt register
* fields of this structure is used to hold information regarding
* the priority of IDMA relative to CPU, and whether interrupt is
* desired or not. Once these properties are set in the IDMA1_init()
* function, all transfers performed on Channel 1, use this field
* to submit transfers, unless they are re-configured again by
* seperate calls to setpriority and setInt.
*
* The following configuration structure holds all the fields needed
* to describe a Channel 0 transfer and has trhe following structure.
*
* typedef struct idma0_config
* {
* Uint32 status;
* Uint32 mask;
* Uint32 *src;
* Uint32 *dst;
* Uint32 cnt;
* }IDMA0_Config;
*
* The "src" contains the start address in internal memory or
* configspace, the "dst" contains the destination address in
* configspace or internal memory respectively. Transfers from
* configspace to configspace using Channel 1 will raise an
* exception. The mask is a 32-bit field of 1-hot encoding of
* registers to access within the 32-bit register window. The cnt
* register fields of this structure is used to hold information
* regarding whether interrupt is desired or not. Along with the
* the number of 32-bit fields will be transfered
*
* FUNCTIONS SUPPORTED:
*
* CHANNEL 0:
*
* int IDMA0_init(interrupt): This function set the interrupt for
* transfers on Channel 0, for all further transfers. This returns the
* value of the formatted IDMA0_COUNT.
*
* void IDMA0_config( IDMA_Config *config): This function performs
* a Channel 0 transfer using the paremeters contained in the
* configuration structure pointer "config".
*
* void IDMA0_configArgs
* (
* Uint32 mask,
* Uint32 *src,
* Uint32 *dst,
* Uint32 cnt
* )
*
* This function issues a Channel 0 transfer from source "src"
* to destination "dst" performing "cnt" 32-word transfers in
* which the individual 32-word transfers are controlled by a
* "1-hot" encoding in a 32-bit field "mask". "src" and "dst"
* must be word aligned, cnt must be <=15.
*
*
* Uint32 IDMA0_getStatus(): This function returns the ACTV
* and PEND bits.
*
* void IDMA0_wait(): This function waits for all previous
* transfers on Channel 0 to complete by waiting for ACTV == 0
* && PEND==0.
*
* int IDMA0_setInt(interrupt): This function is used to set
* the IDMA to interrupt the DSP on completion.
*
* CHANNEL 1:
*
* int IDMA1_init(priority, interrupt): This function set the
* priority and interrupt for transfers on Channel 1, for all
* further transfers. This returns the value of the formatted
* IDMA1_COUNT.
*
* int IDMA1_copy(src, dst, byteCnt): This function transfers
* "byteCnt" bytes from source "src" to destination "dst".
*
* int IDMA1_fill(fillValue, dst, byteCnt): This function fills
* destination "dst" with "byteCnt" bytes of the fill, contained
* in fill_value (32-bit field". This requires the "byteCnt" to
* be a multiple of four.
*
* Uint32 IDMA1_getStatus(): This function returns the ACTV and
* PEND bits.
*
* int IDMA1_wait(): This function waits to make sure that
* all previous transfers on Channel 1 have completed by
* waiting for ACTV==0 && PEND==0.
*
* int IDMA1_setPriority(priority): This function is used to
* set the priority between CPU and IDMA. A value of 0x111
* implies that CPU is higher priority than IDMA. A value
* of 0x0 implies IDMA is higher priority than CPU. These are
* the only values that are allowed.
*
* int IDMA1_setInt(interrupt): This function is used to set
* the IDMA to interrupt the DSP on completion.
*
*/
#include <csl_idma.h>
/* Declare private handles that define Channel 0 and Channel 1
* properties.
*/
#pragma DATA_SECTION (idma1_handle_priv, ".bss:cslsys_section:idma");
#pragma DATA_ALIGN(idma1_handle_priv, 8);
/** Idma1 handle */
IDMA1_handle idma1_handle_priv;
#pragma DATA_SECTION (idma0_configHandle_priv, ".bss:cslsys_section:idma");
#pragma DATA_ALIGN(idma0_configHandle_priv, 8);
/** Idma0 config */
IDMA0_Config idma0_configHandle_priv;
/** ===========================================================================
* @n@b IDMA1_init
*
* @b Description
* @n This function obtains a priority and an interrupt flag and remembers
* them so that all future transfers on Channel 1 will use these
* priorities. The priority is contained in the argument "priority" and
* interrupt flag in "interr".
* This function performs IDMA Channel 1 initialization by setting the
* priority level and the enabling/disabling the interrupt event
* generation for the channel.
*
* @b Arguments
* @verbatim
priority Priority 0-7 of handle
interr interrupt event generated on/off
@endverbatim
*
* <b> Return Value </b> idma1_handle_priv.cnt
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n None
*
* @b Modifies
* @n None
*
* @b Example
* @verbatim
Uint32 cnt1;
// Initialize IDMA Channel 1
// Set Chan 1 to have Priority 7 and Interrupt Event Gen On
...
cnt1 = IDMA1_init( IDMA_PRI_7, IDMA_INT_EN);
@endverbatim
* ============================================================================
*/
#pragma CODE_SECTION (IDMA1_init, ".text:cslsys_section:idma");
Int IDMA1_init (
IDMA_priSet priority,
IDMA_intEn interr
)
{
Uint32 Priority;
Uint32 Interrupt;
Uint32 cs;
/* Limit incoming priotity to a three bit field. Move the
* priority "pri" and the interrupt "interr" into the right
* locations in the count register, namely 31-28. Remeber
* this 32-bit field in the local handle
* "idma1_handle_priv.cnt
*/
cs = _disable_interrupts();
Priority = ((Uint32)priority << CSL_IDMA_IDMA1_CNT_PRI_SHIFT)
& CSL_IDMA_IDMA1_CNT_PRI_MASK;
Interrupt = ((Uint32)interr << CSL_IDMA_IDMA1_CNT_INT_SHIFT)
& CSL_IDMA_IDMA1_CNT_INT_MASK;
idma1_handle_priv.cnt = (Priority | Interrupt);
/* Return the 32-bit field that has been prepared for the user */
_restore_interrupts(cs);
return(idma1_handle_priv.cnt);
}
/** ===========================================================================
* @n@b IDMA1_copy
*
* @b Description
* @n IDMA1_copy() transfers "byteCnt" bytes from a source "src"
* to a destination "dst". It is assumed that both the source and
* destination addresses are in internal memory. Transfers from
* addresses that are not in the internal memory will raise an
* exception. No checking is performed by this function to check
* the correctness of any of the passed in arguments.
*
* Used to transfer "byteCnt" bytes from source "src" to destination "dst"
*
* @b Arguments
* @verbatim
src Pointer to the source address
dst Pointer to the destination address
byteCnt Number of bytes to be transferred.
@endverbatim
*
* <b> Return Value </b>
* @n None
*
* <b> Pre Condition </b>
* @n None
*
* <b> Post Condition </b>
* @n None
*
* @b Modifies
* @n The hardware registers of IDMA.
*
* @b Example
* @verbatim
Uint32 src;
Uint32 dst;
...
// Copy src to dst1 - 80 bytes - 20 words
IDMA1_copy(src, dst1, 80);
@endverbatim
* ============================================================================
*/
#pragma CODE_SECTION (IDMA1_copy, ".text:cslsys_section:idma");
Int IDMA1_copy (
Uint32 *src,
Uint32 *dst,
Uint32 byteCnt
)
{
volatile Uint32 pend;
Uint32 cs;
cs = _disable_interrupts();
#ifdef PEND_SUPPORT
/* Make sure that there are no pending transfers before using
* this channel. This is done by reading bit "1" of the status
* register.
*/
while (pend = CSL_FEXT(((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA1_STAT,
IDMA_IDMA1_STAT_PEND));
#endif
/* Poke in "src", "dst" and "count" with the correct
* priority and interrupt flags on.
*/
((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA1_SRC = (Uint32) src;
((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA1_DST = (Uint32) dst;
((CSL_IdmaRegs*)CSL_IDMA_0_REGS)->IDMA1_CNT = ((byteCnt & 0xFFFC)
| idma1_handle_priv.cnt);
_restore_interrupts(cs);
return(0);
}
/** ===========================================================================
* @n@b IDMA1_fill
*
* @b Description
* @n IDMA1_fill() Takes a fill value in "fill_value" and fills
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