csl_cachel1.c

Dm6455 driver,magbe useful to you!

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *  ============================================================================
 */

/** ============================================================================
 *   @file  csl_cacheL1.c
 *
 *   @path  $(CSLPATH)\src\cache
 *
 *   @desc  File for functional layer of L1 Cache
 *
 */
 
/* =============================================================================
 *  Revision History
 *  ===============
 *  23-Mar-2004 Jamon Bowen File Created
 *
 *  21-Jun-2004 Ruchika Kharwar modified.
 *
 *  24-Jan-2006 ds Updated CACHE_setL1pSize() API to return Old value  
 * ============================================================================= 
 */

#include <csl_cache.h>
#include <_csl_cache.h>

/** ============================================================================
 *   @n@b CACHE_freezeL1
 *
 *   @b Description
 *   @n Freezes the L1P and L1D.
 *   @n As per the specification,
 *   @n a. The new freeze state is programmed in L1DCC, L1PCC.
 *   @n b. The old state is read from the L1DCC, L1PCC from the POPER field.
 *   @n    This latter read accomplishes 2 things, viz. Ensuring the new state
 *         is programmed as well as reading the old programmed value.
 *
 *   @b Arguments
 *   @n None
 *
 *   <b> Return Value </b>  CACHE_L1_Freeze
 *   @li                    CACHE_L1_FREEZE  - Old Freeze State of L1 Cache
 *   @li                    CACHE_L1P_FREEZE - Old Freeze State of L1P Cache  
 *   @li                    CACHE_L1D_FREEZE - Old Freeze State of L1D Cache
 *   @li                    CACHE_L1_NORMAL  - Normal State of L1 Cache
 *
 *   <b> Pre Condition </b>
 *   @n  The CACHE must be succesfully enabled via CACHE_enableCaching() before 
 *       calling this function.
 *
 *   <b> Post Condition </b>
 *   @n  Freeze L1 cache
 *
 *   @b Modifies
 *   @n L1DCC and L1PCC registers
 *
 *   @b Example
 *   @verbatim
        ...
        CACHE_L1_Freeze oldFreezeState ;

        oldFreezeState = CACHE_freezeL1();
        ...
     @endverbatim
 *  ============================================================================
 */
#pragma CODE_SECTION (CACHE_freezeL1, ".text:csl_section:cache");
CACHE_L1_Freeze CACHE_freezeL1(void)
{
    Uint32      oldL1DFrz;
    Uint32      oldL1PFrz;
     
    /* Critical section */
    asm(" dint");
    
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1DCC = \
                        CSL_FMK(CACHE_L1DCC_OPER, CSL_CACHE_L1DCC_OPER_FREEZE);
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCC = \
                        CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_FREEZE);
    oldL1DFrz = CSL_FEXT(((CSL_CacheRegsOvly) \
                                  CSL_CACHE_0_REGS)->L1DCC, CACHE_L1DCC_POPER);
    oldL1PFrz = CSL_FEXT(((CSL_CacheRegsOvly) \
                                  CSL_CACHE_0_REGS)->L1PCC, CACHE_L1PCC_POPER);
    
    asm(" rint");
    /* End Critical section */

    /*  return cache state if a single freeze is returned then the other */
    if (oldL1DFrz == CSL_CACHE_L1DCC_OPER_FREEZE) {
        if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE)
            return CACHE_L1_FREEZE;
        else
            return CACHE_L1D_FREEZE;    
    }
    else {
        if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE)
            return CACHE_L1P_FREEZE;
        else
            return CACHE_L1_NORMAL;
    }
}

/** ============================================================================
 *   @n@b CACHE_unfreezeL1
 *
 *   @b Description
 *   @n Unfreezes the L1P and L1D.
 *   @n As per the specification,
 *   @n a. The new unfreeze state is programmed in L1DCC, L1PCC.
 *   @n b. The old state is read from the L1DCC, L1PCC from the POPER field.
 *   @n    This latter read accomplishes 2 things, viz. Ensuring the new state
 *         is programmed as well as reading the old programmed value.
 *
 *
 *   @b Arguments
 *   @n None
 *
 *   <b> Return Value </b>  CACHE_L1_Freeze
 *   @li                    CACHE_L1_FREEZE  - Old Freeze State of L1 Cache
 *   @li                    CACHE_L1P_FREEZE - Old Freeze State of L1P Cache  
 *   @li                    CACHE_L1D_FREEZE - Old Freeze State of L1D Cache
 *   @li                    CACHE_L1_NORMAL  - Normal State of L1 Cache
 *
 *   <b> Pre Condition </b>
 *   @n  The CACHE must be succesfully enabled via CACHE_enableCaching() before 
 *       calling this function.
 *
 *   <b> Post Condition </b>
 *   @n  Unfreeze L1 cache
 *
 *   @b Modifies
 *   @n L1DCC and L1PCC registers
 *
 *   @b Example
 *   @verbatim
        ...
        CACHE_L1_Freeze oldFreezeState ;

        oldFreezeState = CACHE_unfreezeL1();
        ...
     @endverbatim
 *  ============================================================================
 */
#pragma CODE_SECTION (CACHE_unfreezeL1, ".text:csl_section:cache");
CACHE_L1_Freeze CACHE_unfreezeL1 (void)
{
    Uint32      oldL1DFrz;
    Uint32      oldL1PFrz;
      
    /* Critical Section */
    asm(" dint");
    
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1DCC = \
                          CSL_FMK(CACHE_L1DCC_OPER, CSL_CACHE_L1DCC_OPER_NORM);
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCC = \
                          CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_NORM);
    oldL1DFrz = CSL_FEXT(((CSL_CacheRegsOvly) \
                                  CSL_CACHE_0_REGS)->L1DCC, CACHE_L1DCC_POPER);
    oldL1PFrz = CSL_FEXT(((CSL_CacheRegsOvly) \
                                  CSL_CACHE_0_REGS)->L1PCC, CACHE_L1PCC_POPER);
    
    /* End Critical section */
    asm(" rint");
    
    /* return cache state if a single freeze is returned then the other
     * cache is in normal mode
     */
    if (oldL1DFrz == CSL_CACHE_L1DCC_OPER_FREEZE) {
        if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE)
            return CACHE_L1_FREEZE;
        else
            return CACHE_L1D_FREEZE;    
    } 
    else {
        if (oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE)
            return CACHE_L1P_FREEZE;
        else
            return CACHE_L1_NORMAL;
    }
}

/** ============================================================================
 *   @n@b CACHE_setL1pSize
 *
 *   @b Description
 *   @n Sets the L1P size.
 *   @n As per the specification,
 *   @n a. The new size is programmed in L1PCFG.
 *   @n b. L1PCFG is read back to ensure it is set.
 *
 *   @b Arguments
 *   @verbatim
              newSize      New size to be programmed
     @endverbatim     
 *
 *   <b> Return Value </b>  CACHE_L1Size
 *   @li                    Old size of L1 Cache
 *
 *   <b> Pre Condition </b>
 *   @n  The CACHE must be succesfully enabled via CACHE_enableCaching() before 
 *       calling this function.
 *
 *   <b> Post Condition </b>
 *   @n  Set L1P cache size
 *
 *   @b Modifies
 *   @n L1PCFG register
 *
 *   @b Example
 *   @verbatim
        ...
        CACHE_L1Size oldSize ;

        oldSize = CACHE_setL1pSize(CACHE_L1_32KCACHE);
        ...
     @endverbatim
 *  ============================================================================
 */
#pragma CODE_SECTION (CACHE_setL1pSize, ".text:csl_section:cache");
CACHE_L1Size CACHE_setL1pSize (
    CACHE_L1Size    newSize
)
{
    Uint32      curSize;
     
    curSize = ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCFG;
    
    /* Critical section */
    asm(" dint");
    
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCFG = newSize;
    newSize = (CACHE_L1Size)((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCFG;
    
    /* End Critical section */
    asm(" rint");
        
    return (CACHE_L1Size) (curSize);
}

/** ============================================================================
 *   @n@b CACHE_freezeL1p
 *
 *   @b Description
 *   @n Freezes L1P.
 *   @n As per the specification,
 *   @n a. The new freeze state is programmed in L1PCC.
 *   @n b. The old state is read from the L1PCC from the POPER field.
 *   @n    This latter read accomplishes 2 things, viz. Ensuring the new state
 *         is programmed as well as reading the old programmed value.
 *
 *   @b Arguments
 *   @n None
 *
 *   <b> Return Value </b>  CACHE_L1_Freeze
 *   @li                    CACHE_L1P_FREEZE  - Old Freeze State of L1P Cache
 *   @li                    CACHE_L1P_NORMAL  - Normal State of L1P Cache 
 *
 *   <b> Pre Condition </b>
 *   @n  The CACHE must be succesfully enabled via CACHE_enableCaching() before 
 *       calling this function.
 *
 *   <b> Post Condition </b>
 *   @n  Freeze L1P cache
 *
 *   @b Modifies
 *   @n L1PCC register
 *
 *   @b Example
 *   @verbatim
        ...
        CACHE_L1_Freeze oldFreezeState ;

        oldFreezeState = CACHE_freezeL1p();
        ...
     @endverbatim
 *  ============================================================================
 */
#pragma CODE_SECTION (CACHE_freezeL1p, ".text:csl_section:cache");
CACHE_L1_Freeze CACHE_freezeL1p (void)
{
    Uint32      oldL1PFrz;
     
    /* Critical section */
    asm(" dint");
    
    ((CSL_CacheRegsOvly)CSL_CACHE_0_REGS)->L1PCC =  \
                        CSL_FMK(CACHE_L1PCC_OPER, CSL_CACHE_L1PCC_OPER_FREEZE);
    oldL1PFrz = 
        CSL_FEXT(((CSL_CacheRegsOvly) \
                                  CSL_CACHE_0_REGS)->L1PCC, CACHE_L1PCC_POPER);
    /* End Critical Section */
    asm(" rint");
    
    if(oldL1PFrz == CSL_CACHE_L1PCC_OPER_FREEZE)
        return CACHE_L1P_FREEZE;
    else
        return CACHE_L1P_NORMAL;
}

/** ============================================================================
 *   @n@b CACHE_unfreezeL1p
 *
 *   @b Description
 *   @n Unfreezes L1P.
 *   @n As per the specification,
 *   @n a. The normal state is programmed in L1PCC
 *   @n b. The old state is read from the L1PCC from the POPER field.
 *   @n    This latter read accomplishes 2 things, viz. Ensuring the new state
 *         is programmed as well as reading the old programmed value.
 *
 *   @b Arguments
 *   @n None
 *
 *   <b> Return Value </b>  CACHE_L1_Freeze
 *   @li                    CACHE_L1P_FREEZE  - Old Freeze State of L1P Cache
 *   @li                    CACHE_L1P_NORMAL  - Normal State of L1P Cache 
 *
 *   <b> Pre Condition </b>
 *   @n  The CACHE must be succesfully enabled via CACHE_enableCaching() before 
 *       calling this function.
 *
 *   <b> Post Condition </b>
 *   @n  Unreeze L1P cache
 *
 *   @b Modifies
 *   @n L1PCC register
 *
 *   @b Example
 *   @verbatim
        ...
        CACHE_L1_Freeze oldFreezeState ;

        oldFreezeState = CACHE_unfreezeL1p();
        ...
     @endverbatim
 *  ============================================================================
 */
#pragma CODE_SECTION (CACHE_unfreezeL1p, ".text:csl_section:cache");
CACHE_L1_Freeze CACHE_unfreezeL1p (void)
{
    Uint32      temp;