cslr_edma3cc.h

Dm6455 driver,magbe useful to you!

#define CSL_EDMA3CC_DRAEH_E46_MASK       (0x00004000u)
#define CSL_EDMA3CC_DRAEH_E46_SHIFT      (0x0000000Eu)
#define CSL_EDMA3CC_DRAEH_E46_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E45_MASK       (0x00002000u)
#define CSL_EDMA3CC_DRAEH_E45_SHIFT      (0x0000000Du)
#define CSL_EDMA3CC_DRAEH_E45_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E44_MASK       (0x00001000u)
#define CSL_EDMA3CC_DRAEH_E44_SHIFT      (0x0000000Cu)
#define CSL_EDMA3CC_DRAEH_E44_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E43_MASK       (0x00000800u)
#define CSL_EDMA3CC_DRAEH_E43_SHIFT      (0x0000000Bu)
#define CSL_EDMA3CC_DRAEH_E43_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E42_MASK       (0x00000400u)
#define CSL_EDMA3CC_DRAEH_E42_SHIFT      (0x0000000Au)
#define CSL_EDMA3CC_DRAEH_E42_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E41_MASK       (0x00000200u)
#define CSL_EDMA3CC_DRAEH_E41_SHIFT      (0x00000009u)
#define CSL_EDMA3CC_DRAEH_E41_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E40_MASK       (0x00000100u)
#define CSL_EDMA3CC_DRAEH_E40_SHIFT      (0x00000008u)
#define CSL_EDMA3CC_DRAEH_E40_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E39_MASK       (0x00000080u)
#define CSL_EDMA3CC_DRAEH_E39_SHIFT      (0x00000007u)
#define CSL_EDMA3CC_DRAEH_E39_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E38_MASK       (0x00000040u)
#define CSL_EDMA3CC_DRAEH_E38_SHIFT      (0x00000006u)
#define CSL_EDMA3CC_DRAEH_E38_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E37_MASK       (0x00000020u)
#define CSL_EDMA3CC_DRAEH_E37_SHIFT      (0x00000005u)
#define CSL_EDMA3CC_DRAEH_E37_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E36_MASK       (0x00000010u)
#define CSL_EDMA3CC_DRAEH_E36_SHIFT      (0x00000004u)
#define CSL_EDMA3CC_DRAEH_E36_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E35_MASK       (0x00000008u)
#define CSL_EDMA3CC_DRAEH_E35_SHIFT      (0x00000003u)
#define CSL_EDMA3CC_DRAEH_E35_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E34_MASK       (0x00000004u)
#define CSL_EDMA3CC_DRAEH_E34_SHIFT      (0x00000002u)
#define CSL_EDMA3CC_DRAEH_E34_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E33_MASK       (0x00000002u)
#define CSL_EDMA3CC_DRAEH_E33_SHIFT      (0x00000001u)
#define CSL_EDMA3CC_DRAEH_E33_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_E32_MASK       (0x00000001u)
#define CSL_EDMA3CC_DRAEH_E32_SHIFT      (0x00000000u)
#define CSL_EDMA3CC_DRAEH_E32_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_DRAEH_RESETVAL       (0x00000000u)

/* QRAE */

#define CSL_EDMA3CC_QRAE_E3_MASK         (0x00000008u)
#define CSL_EDMA3CC_QRAE_E3_SHIFT        (0x00000003u)
#define CSL_EDMA3CC_QRAE_E3_RESETVAL     (0x00000000u)

#define CSL_EDMA3CC_QRAE_E2_MASK         (0x00000004u)
#define CSL_EDMA3CC_QRAE_E2_SHIFT        (0x00000002u)
#define CSL_EDMA3CC_QRAE_E2_RESETVAL     (0x00000000u)

#define CSL_EDMA3CC_QRAE_E1_MASK         (0x00000002u)
#define CSL_EDMA3CC_QRAE_E1_SHIFT        (0x00000001u)
#define CSL_EDMA3CC_QRAE_E1_RESETVAL     (0x00000000u)

#define CSL_EDMA3CC_QRAE_E0_MASK         (0x00000001u)
#define CSL_EDMA3CC_QRAE_E0_SHIFT        (0x00000000u)
#define CSL_EDMA3CC_QRAE_E0_RESETVAL     (0x00000000u)

#define CSL_EDMA3CC_QRAE_RESETVAL        (0x00000000u)

/* QUEEVT_ENTRY */

#define CSL_EDMA3CC_QUEEVT_ENTRY_RESV_MASK (0xFFFFFF00u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_RESV_SHIFT (0x00000008u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_RESV_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_MASK (0x000000C0u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_SHIFT (0x00000006u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_RESETVAL (0x00000000u)

/*----ETYPE Tokens----*/
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_EVENT (0x00000000u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_MANUAL (0x00000001u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_CHAIN (0x00000002u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ETYPE_AUTO (0x00000003u)

#define CSL_EDMA3CC_QUEEVT_ENTRY_ENUM_MASK (0x0000003Fu)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ENUM_SHIFT (0x00000000u)
#define CSL_EDMA3CC_QUEEVT_ENTRY_ENUM_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_QUEEVT_ENTRY_RESETVAL (0x00000000u)

/* QSTAT */

#define CSL_EDMA3CC_QSTAT_THRXD_MASK     (0x01000000u)
#define CSL_EDMA3CC_QSTAT_THRXD_SHIFT    (0x00000018u)
#define CSL_EDMA3CC_QSTAT_THRXD_RESETVAL (0x00000000u)

/*----THRXD Tokens----*/
#define CSL_EDMA3CC_QSTAT_THRXD_NOTEXCEED (0x00000000u)
#define CSL_EDMA3CC_QSTAT_THRXD_EXCEED   (0x00000001u)

#define CSL_EDMA3CC_QSTAT_WM_MASK        (0x001F0000u)
#define CSL_EDMA3CC_QSTAT_WM_SHIFT       (0x00000010u)
#define CSL_EDMA3CC_QSTAT_WM_RESETVAL    (0x00000000u)

/*----WM Tokens----*/
#define CSL_EDMA3CC_QSTAT_WM_EMPTY       (0x00000000u)
#define CSL_EDMA3CC_QSTAT_WM_FULL        (0x00000010u)

#define CSL_EDMA3CC_QSTAT_NUMVAL_MASK    (0x00001F00u)
#define CSL_EDMA3CC_QSTAT_NUMVAL_SHIFT   (0x00000008u)
#define CSL_EDMA3CC_QSTAT_NUMVAL_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_QSTAT_STRTPTR_MASK   (0x0000000Fu)
#define CSL_EDMA3CC_QSTAT_STRTPTR_SHIFT  (0x00000000u)
#define CSL_EDMA3CC_QSTAT_STRTPTR_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_QSTAT_RESETVAL       (0x00000000u)

/* QWMTHRA */

#define CSL_EDMA3CC_QWMTHRA_Q3_MASK      (0x1F000000u)
#define CSL_EDMA3CC_QWMTHRA_Q3_SHIFT     (0x00000018u)
#define CSL_EDMA3CC_QWMTHRA_Q3_RESETVAL  (0x00000010u)

/*----Q3 Tokens----*/
#define CSL_EDMA3CC_QWMTHRA_Q3_DISABLE   (0x00000011u)

#define CSL_EDMA3CC_QWMTHRA_Q2_MASK      (0x001F0000u)
#define CSL_EDMA3CC_QWMTHRA_Q2_SHIFT     (0x00000010u)
#define CSL_EDMA3CC_QWMTHRA_Q2_RESETVAL  (0x00000010u)

/*----Q2 Tokens----*/
#define CSL_EDMA3CC_QWMTHRA_Q2_DISABLE   (0x00000011u)

#define CSL_EDMA3CC_QWMTHRA_Q1_MASK      (0x00001F00u)
#define CSL_EDMA3CC_QWMTHRA_Q1_SHIFT     (0x00000008u)
#define CSL_EDMA3CC_QWMTHRA_Q1_RESETVAL  (0x00000010u)

/*----Q1 Tokens----*/
#define CSL_EDMA3CC_QWMTHRA_Q1_DISABLE   (0x00000011u)

#define CSL_EDMA3CC_QWMTHRA_Q0_MASK      (0x0000001Fu)
#define CSL_EDMA3CC_QWMTHRA_Q0_SHIFT     (0x00000000u)
#define CSL_EDMA3CC_QWMTHRA_Q0_RESETVAL  (0x00000010u)

/*----Q0 Tokens----*/
#define CSL_EDMA3CC_QWMTHRA_Q0_DISABLE   (0x00000011u)

#define CSL_EDMA3CC_QWMTHRA_RESETVAL     (0x10101010u)

/* CCSTAT */

#define CSL_EDMA3CC_CCSTAT_QUEACTV3_MASK (0x00080000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV3_SHIFT (0x00000013u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV3_RESETVAL (0x00000000u)

/*----QUEACTV3 Tokens----*/
#define CSL_EDMA3CC_CCSTAT_QUEACTV3_NONE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV3_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_QUEACTV2_MASK (0x00040000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV2_SHIFT (0x00000012u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV2_RESETVAL (0x00000000u)

/*----QUEACTV2 Tokens----*/
#define CSL_EDMA3CC_CCSTAT_QUEACTV2_NONE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV2_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_QUEACTV1_MASK (0x00020000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV1_SHIFT (0x00000011u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV1_RESETVAL (0x00000000u)

/*----QUEACTV1 Tokens----*/
#define CSL_EDMA3CC_CCSTAT_QUEACTV1_NONE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV1_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_QUEACTV0_MASK (0x00010000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV0_SHIFT (0x00000010u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV0_RESETVAL (0x00000000u)

/*----QUEACTV0 Tokens----*/
#define CSL_EDMA3CC_CCSTAT_QUEACTV0_NONE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_QUEACTV0_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_COMPACTV_MASK (0x00003F00u)
#define CSL_EDMA3CC_CCSTAT_COMPACTV_SHIFT (0x00000008u)
#define CSL_EDMA3CC_CCSTAT_COMPACTV_RESETVAL (0x00000000u)

/*----COMPACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_COMPACTV_NONE (0x00000000u)

#define CSL_EDMA3CC_CCSTAT_ACTV_MASK     (0x00000010u)
#define CSL_EDMA3CC_CCSTAT_ACTV_SHIFT    (0x00000004u)
#define CSL_EDMA3CC_CCSTAT_ACTV_RESETVAL (0x00000000u)

/*----ACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_ACTV_IDLE     (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_ACTV_BUSY     (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_WSTATACTV_MASK (0x00000008u)
#define CSL_EDMA3CC_CCSTAT_WSTATACTV_SHIFT (0x00000003u)
#define CSL_EDMA3CC_CCSTAT_WSTATACTV_RESETVAL (0x00000000u)

/*----WSTATACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_WSTATACTV_IDLE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_WSTATACTV_BUSY (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_TRACTV_MASK   (0x00000004u)
#define CSL_EDMA3CC_CCSTAT_TRACTV_SHIFT  (0x00000002u)
#define CSL_EDMA3CC_CCSTAT_TRACTV_RESETVAL (0x00000000u)

/*----TRACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_TRACTV_NONE   (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_TRACTV_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_QEVTACTV_MASK (0x00000002u)
#define CSL_EDMA3CC_CCSTAT_QEVTACTV_SHIFT (0x00000001u)
#define CSL_EDMA3CC_CCSTAT_QEVTACTV_RESETVAL (0x00000000u)

/*----QEVTACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_QEVTACTV_NONE (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_QEVTACTV_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_EVTACTV_MASK  (0x00000001u)
#define CSL_EDMA3CC_CCSTAT_EVTACTV_SHIFT (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_EVTACTV_RESETVAL (0x00000000u)

/*----EVTACTV Tokens----*/
#define CSL_EDMA3CC_CCSTAT_EVTACTV_NONE  (0x00000000u)
#define CSL_EDMA3CC_CCSTAT_EVTACTV_ACTIVE (0x00000001u)

#define CSL_EDMA3CC_CCSTAT_RESETVAL      (0x00000000u)

/* MPFAR */

#define CSL_EDMA3CC_MPFAR_FADDR_MASK     (0xFFFFFFFFu)
#define CSL_EDMA3CC_MPFAR_FADDR_SHIFT    (0x00000000u)
#define CSL_EDMA3CC_MPFAR_FADDR_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_MPFAR_RESETVAL       (0x00000000u)

/* MPFSR */

#define CSL_EDMA3CC_MPFSR_FID_MASK       (0x00001E00u)
#define CSL_EDMA3CC_MPFSR_FID_SHIFT      (0x00000009u)
#define CSL_EDMA3CC_MPFSR_FID_RESETVAL   (0x00000009u)

#define CSL_EDMA3CC_MPFSR_SRE_MASK       (0x00000020u)
#define CSL_EDMA3CC_MPFSR_SRE_SHIFT      (0x00000005u)
#define CSL_EDMA3CC_MPFSR_SRE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_SWE_MASK       (0x00000010u)
#define CSL_EDMA3CC_MPFSR_SWE_SHIFT      (0x00000004u)
#define CSL_EDMA3CC_MPFSR_SWE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_SXE_MASK       (0x00000008u)
#define CSL_EDMA3CC_MPFSR_SXE_SHIFT      (0x00000003u)
#define CSL_EDMA3CC_MPFSR_SXE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_URE_MASK       (0x00000004u)
#define CSL_EDMA3CC_MPFSR_URE_SHIFT      (0x00000002u)
#define CSL_EDMA3CC_MPFSR_URE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_UWE_MASK       (0x00000002u)
#define CSL_EDMA3CC_MPFSR_UWE_SHIFT      (0x00000001u)
#define CSL_EDMA3CC_MPFSR_UWE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_UXE_MASK       (0x00000001u)
#define CSL_EDMA3CC_MPFSR_UXE_SHIFT      (0x00000000u)
#define CSL_EDMA3CC_MPFSR_UXE_RESETVAL   (0x00000000u)

#define CSL_EDMA3CC_MPFSR_RESETVAL       (0x00001200u)

/* MPFCR */

#define CSL_EDMA3CC_MPFCR_MPFCLR_MASK    (0x00000001u)
#define CSL_EDMA3CC_MPFCR_MPFCLR_SHIFT   (0x00000000u)
#define CSL_EDMA3CC_MPFCR_MPFCLR_RESETVAL (0x00000000u)

#define CSL_EDMA3CC_MPFCR_RESETVAL       (0x00000000u)

/* MPPAG */

#define CSL_EDMA3CC_MPPAG_AID5_MASK      (0x00008000u)
#define CSL_EDMA3CC_MPPAG_AID5_SHIFT     (0x0000000Fu)
#define CSL_EDMA3CC_MPPAG_AID5_RESETVAL  (0x00000001u)

/*----AID5 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID5_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID5_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_AID4_MASK      (0x00004000u)
#define CSL_EDMA3CC_MPPAG_AID4_SHIFT     (0x0000000Eu)
#define CSL_EDMA3CC_MPPAG_AID4_RESETVAL  (0x00000001u)

/*----AID4 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID4_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID4_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_AID3_MASK      (0x00002000u)
#define CSL_EDMA3CC_MPPAG_AID3_SHIFT     (0x0000000Du)
#define CSL_EDMA3CC_MPPAG_AID3_RESETVAL  (0x00000001u)

/*----AID3 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID3_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID3_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_AID2_MASK      (0x00001000u)
#define CSL_EDMA3CC_MPPAG_AID2_SHIFT     (0x0000000Cu)
#define CSL_EDMA3CC_MPPAG_AID2_RESETVAL  (0x00000001u)

/*----AID2 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID2_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID2_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_AID1_MASK      (0x00000800u)
#define CSL_EDMA3CC_MPPAG_AID1_SHIFT     (0x0000000Bu)
#define CSL_EDMA3CC_MPPAG_AID1_RESETVAL  (0x00000001u)

/*----AID1 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID1_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID1_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_AID0_MASK      (0x00000400u)
#define CSL_EDMA3CC_MPPAG_AID0_SHIFT     (0x0000000Au)
#define CSL_EDMA3CC_MPPAG_AID0_RESETVAL  (0x00000001u)

/*----AID0 Tokens----*/
#define CSL_EDMA3CC_MPPAG_AID0_BLOCK     (0x00000000u)
#define CSL_EDMA3CC_MPPAG_AID0_PERMIT    (0x00000001u)

#define CSL_EDMA3CC_MPPAG_EXT_MASK       (0x00000200u)
#define CSL_EDMA3C