csl_gpio.h

Dm6455 driver,magbe useful to you!

/* ============================================================================
 * Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 * Use of this software is controlled by the terms and conditions found
 * in the license agreement under which this software has been supplied
 * provided
 * ============================================================================
*/

/** =========================================================================== 
 *  @file csl_gpio.h
 *
 *  @path $(CSLPATH)\inc
 *
 *  @desc GPIO functional layer APIs header file. The different enumerations, 
 *        structure definitions and function declarations
 * ============================================================================      
 * @mainpage GPIO CSL 3.x
 *
 * @section Introduction
 *
 * @subsection xxx Purpose and Scope
 * The purpose of this document is to identify a set of common CSL APIs for
 * the GPIO module across various devices. The CSL developer is expected to
 * refer to this document while designing APIs for these modules. Some of the
 * listed APIs may not be applicable to a given GPIO module. While other cases
 * this list of APIs may not be sufficient to cover all the features of a
 * particular GPIO Module.The CSL developer should use his discretion designing
 * new APIs or extending the existing ones to cover these.
 *
 * @subsection aaa Terms and Abbreviations
 *   -# CSL:  Chip Support Library
 *   -# API:  Application Programmer Interface
 *
 * @subsection References
 *    -# CSL-001-DES, CSL 3.x Design Specification DocumentVersion 1.02
 *=============================================================================
 */

/* ============================================================================
 * Revision History
 * ===============
 *  11-Jun-2004 PGR file created   
 *  04-sep-2004 Nsr - Updated CSL_GpioObj and added CSL_GpioBaseAddress,
 *                    CSL_GpioParam, SL_GpioContext,  CSL_GpioConfig structures.
 *                  - Updated comments for H/W control cmd and status query
 *                    enums.
 *                  - Added prototypes for CSL_gpioGetBaseAdddress and
 *                    CSL_gpioHwSetupRaw.
 *                  - Changed prototypes of CSL_gpioInit, CSL_gpioOpen.
 *                  - Updated respective comments along with that of
 *                    CSL_gpioClose.
 *  11-Oct-2004 Nsr - Removed the extern keyword before function declaration and
 *                  - Changed this file according to review.
 *  22-Feb-2005 Nsr - Added control command CSL_GPIO_CMD_GET_BIT according to
 *                     TI issue PSG00000310.
 *  28-Jul-2005 PSK - Updated the CSL source to support only one BANK
 *
 *  11-Jan-2006 NG  - Added CSL_GPIO_CMD_SET_OUT_BIT Control Command 
 *  06-Mar-2006 ds  - Rename CSL_GPIO_CMD_SET_OUT_BIT to 
 *                    CSL_GPIO_CMD_ENABLE_DISABLE_OUTBIT
 *                  - Moved CSL_GpioPinNum Enumeration from the cslr_gpio.h 
 * ============================================================================
 */

#ifndef _CSL_GPIO_H_
#define _CSL_GPIO_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <soc.h>
#include <csl.h>
#include <cslr_gpio.h>

/**< Invalid argument */    
#define CSL_EGPIO_INVPARAM CSL_EGPIO_FIRST
    
/*****************************************************************************\
          GPIO global typedef declarations
\*****************************************************************************/

/**
 *  \brief  Base-address of the Configuration registers of GPIO.
 */
typedef struct {
    /** Base-address of the configuration registers of the peripheral
     */
    CSL_GpioRegsOvly regs;
} CSL_GpioBaseAddress;


/**
 *  \brief GPIO specific parameters. Present implementation doesn't have
 *  any specific parameters.
 */
typedef struct {
    /** Bit mask to be used for module specific parameters.
     *  The below declaration is just a place-holder for future
     *  implementation.
     */
    CSL_BitMask16 flags;
} CSL_GpioParam;


/** \brief GPIO specific context information. Present implementation doesn't
 *  have any Context information.
 */
typedef struct {
    /** Context information of GPIO.
     *  The below declaration is just a place-holder for future
     *  implementation.
     */
    Uint16 contextInfo;
} CSL_GpioContext;


/**
 * @brief Config structure of GPIO. This is used to configure GPIO
 * using CSL_HwSetupRaw function
 */
typedef struct  {
    /** GPIO Interrupt Per-Bank Enable Register */
    volatile Uint32 BINTEN; 
    
    /** GPIO Direction Register */
    volatile Uint32 DIR;
    
    /** GPIO Output Data Register */
    volatile Uint32 OUT_DATA;
    
    /** GPIO Set Data Register */
    volatile Uint32 SET_DATA;
    
    /** GPIO Clear Data Register */
    volatile Uint32 CLR_DATA;
    
    /** GPIO Set Rising Edge Interrupt Register */
    volatile Uint32 SET_RIS_TRIG;
    
    /** GPIO Clear Rising Edge Interrupt Register */
    volatile Uint32 CLR_RIS_TRIG;
    
    /** GPIO Set Falling Edge Interrupt Register */
    volatile Uint32 SET_FAL_TRIG;
    
    /** GPIO Clear Falling Edge Interrupt Register */
    volatile Uint32 CLR_FAL_TRIG;    
} CSL_GpioConfig;


/** @brief Default Values for GPIO Config structure */
#define CSL_GPIO_CONFIG_DEFAULTS {      \
    CSL_GPIO_BINTEN_RESETVAL ,          \
    CSL_GPIO_DIR_RESETVAL,              \
    CSL_GPIO_OUT_DATA_RESETVAL,         \
    CSL_GPIO_SET_DATA_RESETVAL,         \
    CSL_GPIO_CLR_DATA_RESETVAL,         \
    CSL_GPIO_SET_RIS_TRIG_RESETVAL,     \
    CSL_GPIO_CLR_RIS_TRIG_RESETVAL,     \
    CSL_GPIO_SET_FAL_TRIG_RESETVAL,     \
    CSL_GPIO_CLR_FAL_TRIG_RESETVAL,     \
}

/** Enumeration used for specifying the GPIO pin numbers */
typedef enum {
    /** Gpio pin 0 */
    CSL_GPIO_PIN0,
    /** Gpio pin 1 */
    CSL_GPIO_PIN1,
    /** Gpio pin 2 */
    CSL_GPIO_PIN2,
    /** Gpio pin 3 */
    CSL_GPIO_PIN3,
    /** Gpio pin 4 */
    CSL_GPIO_PIN4,
    /** Gpio pin 5 */
    CSL_GPIO_PIN5,
    /** Gpio pin 6 */
    CSL_GPIO_PIN6,
    /** Gpio pin 7 */
    CSL_GPIO_PIN7,
    /** Gpio pin 8 */
    CSL_GPIO_PIN8,
    /** Gpio pin 0 */
    CSL_GPIO_PIN9,
    /** Gpio pin 10 */
    CSL_GPIO_PIN10,
    /** Gpio pin 11 */
    CSL_GPIO_PIN11,
    /** Gpio pin 12 */
    CSL_GPIO_PIN12,
    /** Gpio pin 13 */
    CSL_GPIO_PIN13,
    /** Gpio pin 14 */
    CSL_GPIO_PIN14,
    /** Gpio pin 15 */
    CSL_GPIO_PIN15
} CSL_GpioPinNum;

/**\brief  Enums for configuring GPIO pin direction
 *
 */
typedef enum {
    CSL_GPIO_DIR_OUTPUT,/**<<b>: Output pin</b>*/
    CSL_GPIO_DIR_INPUT  /**<<b>: Input pin</b>*/
} CSL_GpioDirection;


/** \brief  Enums for configuring GPIO pin edge detection
 *
 */
typedef enum {
    /**<<b>: No edge detection </b>*/
    CSL_GPIO_TRIG_CLEAR_EDGE,  
    
    /**<<b>: Rising edge detection </b>*/
    CSL_GPIO_TRIG_RISING_EDGE, 
    
    /**<<b>: Falling edge detection </b>*/
    CSL_GPIO_TRIG_FALLING_EDGE,
    
    /**<<b>: Dual edge detection </b>*/
    CSL_GPIO_TRIG_DUAL_EDGE    
} CSL_GpioTriggerType;


/** \brief Enumeration for control commands passed to \a CSL_gpioHwControl()
 *
 * This is the set of commands that are passed to the \a CSL_gpioHwControl()
 * with an optional argument type-casted to \a void* .
 * The arguments to be passed with each enumeration (if any) are specified
 * next to the enumeration
 */
typedef enum {
    /**
     * @brief Enables interrupt on bank
     * @param ( None )
     */
    CSL_GPIO_CMD_BANK_INT_ENABLE = 0,

    /**
     * @brief Disables interrupt on bank
     * @param ( None )
     */
    CSL_GPIO_CMD_BANK_INT_DISABLE = 1,

    /**
     * @brief Configures GPIO pin direction and edge detection properties
     * @param ( CSL_GpioPinConfig )
     */
    CSL_GPIO_CMD_CONFIG_BIT = 2,

    /**
     * @brief Changes output state of GPIO pin to logic-1
     * @param ( CSL_GpioPinNum )
     */
    CSL_GPIO_CMD_SET_BIT = 3,

    /**
     * @brief Changes output state of GPIO pin to logic-0
     * @param ( CSL_GpioPinNum )
     */
    CSL_GPIO_CMD_CLEAR_BIT = 4,

    /**
     * @brief Gets the state of input pins on bank
     *        The "data" field act as output parameter reporting
     *        the input state of the GPIO pins on the bank.
     * @param ( CSL_BitMask16*)
     */
    CSL_GPIO_CMD_GET_INPUTBIT = 5,

    /**
     * @brief Gets the state of output pins on bank.
     *        The "data" field act as output parameter reporting the
     *        output drive state of the GPIO pins on the bank
     * @param ( CSL_BitMask16* )
     */
     CSL_GPIO_CMD_GET_OUTDRVSTATE = 6,

    /**
     * @brief Gets the state of input pin on bank.
     * @param ( CSL_GpioPinData * )
     */
     CSL_GPIO_CMD_GET_BIT = 7,

    /**
     * @brief Changes output state of GPIO pin to logic-1
     * @param ( CSL_GpioPinData *)
     */     
     CSL_GPIO_CMD_ENABLE_DISABLE_OUTBIT = 8
} CSL_GpioHwControlCmd;


/** \brief Enumeration for queries passed to \a CSL_GpioGetHwStatus()
 *
 * This is used to get the status of different operations.The arguments
 * to be passed with each enumeration if any are specified next to
 * the enumeration 
 */
typedef enum {
    /**
     * @brief Queries GPIO bank interrupt enable status
     * @param ( CSL_BitMask16* )
     */
    CSL_GPIO_QUERY_BINTEN_STAT = 2
} CSL_GpioHwStatusQuery;


/** \brief Input parameters for configuring a GPIO pin
 *  This is used to configure the direction and edge detection
 */
typedef struct {
    /**< Pin number for GPIO bank */
    CSL_GpioPinNum pinNum; 
    
    /**< Direction for GPIO Pin */
    CSL_GpioDirection direction; 

    /**< GPIO pin edge detection */
    CSL_GpioTriggerType trigger; 
} CSL_GpioPinConfig;

/**\brief this is used for getting a specific pin staus */
typedef struct {
    /**< Pin number for GPIO bank */
    CSL_GpioPinNum pinNum;

    /** pin value */
    Int16 pinVal;
} CSL_GpioPinData;



/**
   \brief Input parameters for setting up GPIO during startup
*
*  This is just a placeholder as GPIO is a simple module, which doesn't
*  require any setup
*/
typedef struct {
    /** The extendSetup is just a place-holder for future
     *  implementation.
     */
    void *extendSetup;
} CSL_GpioHwSetup;

/** \brief This object contains the reference to the instance of GPIO
*          opened using the @a CSL_gpioOpen()
*
* The pointer to this is passed to all GPIO CSL APIs
* This structure has the fields required to configure GPIO for any test
* case/application. It should be initialized as per requirements of a
* test case/application and passed on to the setup function
*/
typedef struct CSL_GpioObj {
    /**< This is a pointer to the registers of the
     *   instance of GPIO referred to by this object
     */
    CSL_GpioRegsOvly regs;

    /**< This is the instance of GPIO being referred to
     *   by this object 
     */
    CSL_InstNum gpioNum; 
    
    /**< This is the maximum number of pins supported by this
     *   instance of GPIO 
     */
    Uint8 numPins; 
} CSL_GpioObj;

/** \brief this is a pointer to @a CSL_GpioObj and is passed as the first
 * parameter to all GPIO CSL APIs 
 */
typedef CSL_GpioObj *CSL_GpioHandle;


/*****************************************************************************\
          CSL3.x mandatory function prototype definitions
\*****************************************************************************/

/** ===========================================================================
 *   @n@b CSL_gpioInit
 *
 *   @b Description
 *   @n This is the initialization function for the GPIO. This function is
 *      idempotent in that calling it many times is same as calling it once.
 *      This function initializes the CSL data structures, and doesn't affect
 *      the H/W.
 *
 *   @b Arguments
 *   @verbatim
           pContext   Context information for the instance. Should be NULL
     @endverbatim
 *
 *   <b> Return Value </b>  CSL_Status
 *   @li                    CSL_SOK - Always returns
 *
 *   <b> Pre Condition </b>
 *   @n  None
 *