csl_emifa.h

Dm6455 driver,magbe useful to you!

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 *   Use of this software is controlled by the terms and conditions found
 *   in the license agreement under which this software has been supplied.
 *  ============================================================================
 */
/** ============================================================================
 *  @file    csl_emifa.h
 *
 *  @path    $(CSLPATH)\inc
 *
 *  @desc    Header file for functional layer of CSL
 *           - The different enumerations, structure definitions
 *             and function declarations
 * 
 */
/** 
 * @mainpage EMIFA CSL 3.x
 *
 * @section Introduction
 *
 * @subsection xxx Purpose and Scope
 * The purpose of this document is to identify a set of common CSL APIs for
 * the EMIFA module across various devices. The CSL developer is expected to
 * refer to this document while designing APIs for these modules. Some of the
 * cases listed APIs may not be applicable to a given EMIFA module. While 
 * other in this list of APIs may not be sufficient to cover all the features of 
 * a particular EMIFA Module. The CSL developer should use his discretion 
 * designing new APIs or extending the existing ones to cover these.
 *
 * @subsection aaa Terms and Abbreviations
 *   -# CSL:  Chip Support Library
 *   -# API:  Application Programmer Interface
 *
 * @subsection References
 *    -# EMIF_SPEC, EMIF Module Specifications Document; Version 3.16.1  
 *                  Jan 18,2005
 *
 */
/* =============================================================================
 *  Revision History
 *  ===============
 *  12-May-2005 RM  File Created.
 *  
 *  07-Jul-2005 RM  - Changed the module name from EMIF64 to EMIFA            
 *                  - Changes made in accordance to the change in cslr_emifa.h        
 *
 *  09-Sep-2005 NG  Updation according to coding guidelines
 *  
 * =============================================================================
 */
#ifndef _CSL_EMIFA_H_
#define _CSL_EMIFA_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <cslr.h>
#include <soc.h>
#include <csl_error.h>
#include <csl_types.h>
#include <cslr_emifa.h>

/*****************************************************************************
  EMIFA global typedef declarations
 *****************************************************************************
 */

/** Total number of Chip Enables for Async/Sync memories */
#define NUMCHIPENABLE   0x4

/** The default values of EMIFA Async Wait structure */
#define CSL_EMIFA_ASYNCWAIT_MAXEXTWAIT_DEFAULT    0x80
#define CSL_EMIFA_ASYNCWAIT_TURNARND_DEFAULT      0x03

/** The default values of EMIFA CEConfig for Async structure */
#define CSL_EMIFA_ASYNCCFG_SELECTSTROBE_DEFAULT    0x00
#define CSL_EMIFA_ASYNCCFG_WEMODE_DEFAULT          0x00
#define CSL_EMIFA_ASYNCCFG_ASYNCRDYEN_DEFAULT      0x00
#define CSL_EMIFA_ASYNCCFG_WSETUP_DEFAULT          0x0F
#define CSL_EMIFA_ASYNCCFG_SSTROBE_DEFAULT         0x3F
#define CSL_EMIFA_ASYNCCFG_WHOLD_DEFAULT           0x07
#define CSL_EMIFA_ASYNCCFG_RSETUP_DEFAULT          0x0F
#define CSL_EMIFA_ASYNCCFG_RSTROBE_DEFAULT         0x3F
#define CSL_EMIFA_ASYNCCFG_RHOLD_DEFAULT           0x07
#define CSL_EMIFA_ASYNCCFG_ASIZE_DEFAULT           0x00

/** The default values of EMIFA CEConfig for Sync structure */
#define CSL_EMIFA_SYNCCFG_READBYTEEN_DEFAULT    0x00
#define CSL_EMIFA_SYNCCFG_CHIPENEXT_DEFAULT     0x00
#define CSL_EMIFA_SYNCCFG_READEN_DEFAULT        0x00
#define CSL_EMIFA_SYNCCFG_WLTNCY_DEFAULT        0x00
#define CSL_EMIFA_SYNCCFG_RLTNCY_DEFAULT        0x00
#define CSL_EMIFA_SYNCCFG_SBSIZE_DEFAULT        0x00


/** @brief Enumeration for bit field AP of Asynchronous Wait Cycle Configuration 
 *         Register 
 */    
typedef enum {
    /** strobe period extended when ARDY is low  */
    CSL_EMIFA_ARDYPOL_LOW    = 0,
    
    /** strobe period extended when ARDY is high  */
    CSL_EMIFA_ARDYPOL_HIGH   = 1
} CSL_EmifaArdyPol; 

/** @brief Enumeration for bit field for memory type 
 */    
typedef enum {
    /** Asynchronous memory type */
    CSL_EMIFA_MEMTYPE_ASYNC    = 0,
    
    /** Synchronous memory type  */
    CSL_EMIFA_MEMTYPE_SYNC     = 1
} CSL_EmifaMemoryType; 

/** @brief Module specific context information. */
typedef struct {
    /** Context information of EMIFA external memory interface CSL passed as an 
     *  argument to CSL_emifaInit().Present implementation of EMIFA CSL doesn't 
     *  have any context information; hence assigned NULL.
     *  The below declaration is just a place-holder for future implementation.
     */
    Uint16    contextInfo;
} CSL_EmifaContext;


/** @brief This structure contains the base-address information for the EMIFA
 *         instance
 */
typedef struct {
    /** Base-address of the configuration registers of the peripheral */
    CSL_EmifaRegsOvly    regs;
} CSL_EmifaBaseAddress;

/** @brief This Object contains the reference to the instance of EMIFA opened
 *         using the @a CSL_emifaOpen().
 *         The pointer to this, is passed to all EMIFA CSL APIs.
 */
typedef struct CSL_EmifaObj {
    /** This is a pointer to the registers of the instance of EMIFA
     *  referred to by this object
     */
    CSL_EmifaRegsOvly    regs;
    
    /** This is the instance of EMIFA being referred to by this object  */
    CSL_InstNum          perNum;    
} CSL_EmifaObj;

/** @brief This is a pointer to @a CSL_EmifaObj and is passed as the first
 *         parameter to all EMIFA CSL APIs
 */
typedef struct CSL_EmifaObj *CSL_EmifaHandle;

/** 
 * @brief Module specific parameters. Present implementation of EMIFA CSL
 *        doesn't have any module specific parameters.
 */
typedef struct {
    /** Bit mask to be used for module specific parameters. The below
     *  declaration is just a place-holder for future implementation. Passed as 
     *  an argument to CSL_emifaOpen().
     */
    CSL_BitMask16    flags;

} CSL_EmifaParam;

/** @brief EMIFA Async structure.
 *
 * All fields needed for EMIFA Async configuration are present in this 
 * structure.  The pointer to this structure is a member to the structure 
 * CSL_EmifaMemType.  CSL_EmifaAsync structure holds the value to be programmed
 * into CE Configuration register when ssel=0 (i.e., asynchronous). 
 */
typedef struct {     
    /** Select Strobe Mode Enable */
    Uint8    selectStrobe;
    /** Select WE Strobe Mode Enable */
    Uint8    weMode;       
    /** Asynchronous Ready Input Enable */
    Uint8    asyncRdyEn;
    /** Write Setup Width */
    Uint8    wSetup;
    /** Write Strobe Width */
    Uint8    wStrobe;
    /** Write Hold Width */
    Uint8    wHold;
    /** Read Setup Width */
    Uint8    rSetup;    
    /** Read Strobe Width */
    Uint8    rStrobe;  
    /** Read Hold Width */
    Uint8    rHold;      
   /** Asynchronous Memory Size */
    Uint8    asize;   
} CSL_EmifaAsync;

/** 
 * @brief EMIFA Sync structure.
 *
 * All fields needed for EMIFA Sync configuration are present in this structure.
 * The pointer to this structure is a member to the structure CSL_EmifaMemType.
 * CSL_EmifaSync structure holds the value to be programmed into CE 
 * Configuration register when ssel=1 (i.e. synchronous). 
 */
typedef struct {     
    /** Read Byte Enable enable */
    Uint8    readByteEn;
    /** Synchronous Memory Chip Enable Extend */
    Uint8    chipEnExt;       
    /** Synchronous Memory Read Enable Mode */
    Uint8    readEn;
    /** Synchronous Memory Write Latency */
    Uint8    w_ltncy;
    /** Synchronous Memory Read Latency */
    Uint8    r_ltncy;
    /** Synchronous Memory Device Size */
    Uint8    sbsize;  
} CSL_EmifaSync;

/** 
 * @brief EMIFA MemType structure.
 *
 * This structure defines the memory type of a particular chip enable. 
 * If a particular chip enable e.g., CE2 is to be configured as asynchronous
 * memory, ssel must be 0, sync must be NULL and async must be a pointer to 
 * CSL_EmifaAsync structure with the proper values configured. 
 */
typedef struct {
    /** Synchronous/asynchronous memory select. Asynchronous memory mode 
     *  when ssel is set to 0 and synchronous when ssel is 1.
     */
    Uint8             ssel;
    /** Pointer to structure of asynchronous type. The pointer 
     *  value should be NULL if the chip select value is synchronous.
     */
    CSL_EmifaAsync    *async;       
    /** Pointer to structure of synchronous type. The pointer value 
     *  should be NULL if the chip select value is asynchronous.
     */
    CSL_EmifaSync     *sync;
} CSL_EmifaMemType;

/** 
 * @brief EMIFA AsyncWait structure.
 *
 * This structure is a structure member of CSL_EmifaHwSetup. It holds 
 * the value to be programmed into Asynchronous Wait Cycle Configuration 
 * register. This is valid only for asynchronous (ssel=0) memories.
 */
typedef struct {     
    /** Asynchronous Ready Pin Polarity */
    CSL_EmifaArdyPol    asyncRdyPol;
    /** Maximum Extended Wait cycles */
    Uint8               maxExtWait;       
    /** Turn Around cycles  */
    Uint8               turnArnd;
} CSL_EmifaAsyncWait;

/** @brief This has all the fields required to configure EMIFA at Power Up
 *  (After a Hardware Reset) or a Soft Reset
 *
 *  This structure is used to setup or obtain existing setup of
 *  EMIFA using @a CSL_emifaHwSetup() & @a CSL_emifaGetHwSetup() functions
 *  respectively.
 */
typedef struct {    
    /** Pointer to structure for configuring the Asynchronous Wait Cycle 
     *  Configuration register
     */
    CSL_EmifaAsyncWait    *asyncWait;   
    /** Array of CSL_EmifaMemType* for   configuring the Chip enables 
     *  as Async or Sync memory type.
     */
    CSL_EmifaMemType      *ceCfg[NUMCHIPENABLE];   
} CSL_EmifaHwSetup;

/** @brief EMIFA Module ID and Revision structure
 *
 *  This structure is used for querying the EMIFA module ID and revision 
 */
typedef struct {
    /** EMIFA Module ID */
    Uint16    modId;
    /** EMIFA Major Revision */
    Uint8     majRev;
    /** EMIFA Minor Revision */
    Uint8     minRev;
} CSL_EmifaModIdRev;     

/** 
 * @brief EMIFA config structure which is used in CSL_emifaHwSetupRaw function.
 *        This is a structure of register values, rather than a structure of
 *        register field values like CSL_EmifaHwSetup. 
 */
typedef struct { 
    /** Chip Enable2 Configuration register */
    volatile Uint32    CE2CFG;
    /** Chip Enable3 Configuration  register */
    volatile Uint32    CE3CFG;
    /** Chip Enable4 Configuration  register */
    volatile Uint32    CE4CFG;
    /** Chip Enable5 Configuration  register */
    volatile Uint32    CE5CFG;
    /** Asynchronous Wait Cycle Configuration  register */
    volatile Uint32    AWCC;
    /** Interrupt Raw Register */
    volatile Uint32    INTRAW;
    /** Interrupt Masked Register */
    volatile Uint32    INTMSK;