csl_mcbsp.h

Dm6455 driver,magbe useful to you!

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *   ===========================================================================
 */
 
/** ============================================================================
 *   @file  csl_mcbsp.h
 *
 *   @path  $(CSLPATH)\inc
 *
 *   @desc  Header file for functional layer of McBSP CSL
 *
 */

/** @mainpage MCBSP CSL 3.x
 *
 * @section Introduction
 *
 * @subsection xxx Purpose and Scope
 * The purpose of this document is to identify a set of common CSL APIs for
 * the MCBSP module across various devices. The CSL developer is expected to
 * refer to this document while designing APIs for these modules. Some of the
 * listed APIs may not be applicable to a given MCBSP module. While other cases
 * this list of APIs may not be sufficient to cover all the features of a
 * particular MCBSP Module. The CSL developer should use his discretion 
 * designing new APIs or extending the existing ones to cover these.
 *
 * @subsection aaa Terms and Abbreviations
 *   -# CSL:  Chip Support Library
 *   -# API:  Application Programmer Interface
 *
 * @subsection References
 *    -# CSL-001-DES, CSL 3.x Design Specification DocumentVersion 1.02
 *
 */

/* =============================================================================
 * Revision History
 * ================
 *  June 29,2004 Pratheesh Gangadhar - Created
 * 
 *  May 17,2005  Ramitha Mathew  - Removed support for 512 channel mode              
 *                               - Removed support for Super synchronization         
 *                               - IntEvent removed from CSL_McbspHwSetup and  
 *                                 added commands and queries for interrupt mode          
 *                               - CSL_MCBSP_CMD_REG_RESET changed to
 *                                 CSL_MCBSP_CMD_RESET 
 *
 *  July 04, 2005 ds             - Removed support for DX Mode.Hence removed
 *                                 dxState from CSL_McbspHwSetup
 *                               - Removed support for enhanced sample clock
 *                                 mode. 
 *                               - Register Naming convention used for 
 *                                 Multichannel registers are changed according 
 *                                 the changes in cslr_mcbsp.h
 *
 *  July 26, 2005 ds            - Removed control cmd 
 *                                CSL_MCBSP_CMD_IO_MODE_CONTROL. 
 *                                  
 *  Sept 21, 2005 ds            - Removed the DXR and DRR register from the 
 *                                config data structure
 *
 *  Oct  27, 2005 ds            - Removed CSL_MCBSP_QUERY_PID query from 
 *                                CSL_McbspHwStatusQuery
 *
 *  Feb 02 , 2006 ds            - IntEvent added to CSL_McbspHwSetup and 
 *                                removed interrupt mode commands and queries 
 * =============================================================================
 */

#ifndef _CSL_MCBSP_H_
#define _CSL_MCBSP_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <soc.h>
#include <csl.h>
#include <cslr_mcbsp.h>

/**************************************************************************\
* MCBSP global macro declarations
\**************************************************************************/

/** 
 * Use this symbol as pin mask for @a CSL_mcbspIoRead() and
 * CSL_mcbspIoWrite() functions
 */ 
 
/** I/O Pin Input/Output configuration for CLKX Pin      */
#define CSL_MCBSP_IO_CLKX                             (1)

/** I/O Pin Input/Output configuration for FSX  Pin       */
#define CSL_MCBSP_IO_FSX                              (2)

/** Not Configurable. Always Output.                      */
#define CSL_MCBSP_IO_DX                               (4)

/** I/O Pin Input/Output configuration for CLKR Pin       */
#define CSL_MCBSP_IO_CLKR                             (8)

/** I/O Pin Input/Output configuration for FSR Pin        */
#define CSL_MCBSP_IO_FSR                              (16)

/** Not Configurable. Always Input.                        */
#define CSL_MCBSP_IO_DR                               (32)

/** Not Configurable. Always Input.                        */
#define CSL_MCBSP_IO_CLKS                             (64)


/** 
 * Use this symbol as enable/disable control bitmask for
 * CSL_mcbspHwControl() function
 */
 
/** To enable Receiver in resetControl Function             */
#define CSL_MCBSP_CTRL_RX_ENABLE                      (1)

/** To enable Transmitter in resetControl Function          */
#define CSL_MCBSP_CTRL_TX_ENABLE                      (2)

/** To disable Receiver in resetControl Function            */
#define CSL_MCBSP_CTRL_RX_DISABLE                     (4)

/** To disable Transmitter in resetControl Function         */
#define CSL_MCBSP_CTRL_TX_DISABLE                     (8)

/** To enable Frame Sync Generation in resetControl Function */
#define CSL_MCBSP_CTRL_FSYNC_ENABLE                   (16)

/** To enable Sample Rate Generator in resetControl Function */
#define CSL_MCBSP_CTRL_SRG_ENABLE                     (32)

/** To disable Frame Sync Generation in resetControl Function */
#define CSL_MCBSP_CTRL_FSYNC_DISABLE                  (64)

/** To disable Sample Rate Generator in resetControl Function */
#define CSL_MCBSP_CTRL_SRG_DISABLE                    (128)

/** 
 * Use this symbol to compare the return value of @a CSL_mcbspGetHwStatus()
 * function for @a CSL_MCBSP_QUERY_DEV_STATUS query
 * \n For eg:- On RFULL event, (response & CSL_MCBSP_RFULL) == 0x0004
 */
 
/** RCV ready status */
#define CSL_MCBSP_RRDY             0x0001
/** XMT ready status */
#define CSL_MCBSP_XRDY             0x0002
/** RCV full status */
#define CSL_MCBSP_RFULL            0x0004
/** XMT empty status */
#define CSL_MCBSP_XEMPTY           0x0008
/** RCV frame sync error status */
#define CSL_MCBSP_RSYNCERR         0x0010
/** XMT frame sync error status */
#define CSL_MCBSP_XSYNCERR         0x0020

/** CSL_EMCBSP_SYMBOL Error codes */
 
/** Invalid Control Command */
#define CSL_EMCBSP_INVCNTLCMD             (CSL_EMCBSP_FIRST - 0)

/** Invalid Query */
#define CSL_EMCBSP_INVQUERY               (CSL_EMCBSP_FIRST - 1)

/** Invalid Parameter */
#define CSL_EMCBSP_INVPARAMS              (CSL_EMCBSP_FIRST - 2)

/** Invalid Size */
#define CSL_EMCBSP_INVSIZE                (CSL_EMCBSP_FIRST - 3)

/** 'Does not exist' */
#define CSL_EMCBSP_NOTEXIST               (CSL_EMCBSP_FIRST - 4)

/** Invalid mode to conduct operation */
#define CSL_EMCBSP_INVMODE                (CSL_EMCBSP_FIRST - 5)

/** CSL_MCBSP_DEFAULT_SYMBOL MCBSP CSL Defaults  */

/** Data Setup defaults */
#define CSL_MCBSP_DATASETUP_DEFAULTS   {            \
   (CSL_McbspPhase)CSL_MCBSP_PHASE_SINGLE,          \
   (CSL_McbspWordLen)CSL_MCBSP_WORDLEN_16,          \
   1,                                               \
   (CSL_McbspWordLen)0,                             \
   0,                                               \
   (CSL_McbspFrmSync)CSL_MCBSP_FRMSYNC_DETECT,      \
   (CSL_McbspCompand)CSL_MCBSP_COMPAND_OFF_MSB_FIRST, \
   (CSL_McbspDataDelay)CSL_MCBSP_DATADELAY_0_BIT,   \
   (CSL_McbspRjustDxena)0,                          \
   (CSL_McbspIntMode)CSL_MCBSP_INTMODE_ON_READY,    \
   (CSL_McbspBitReversal)CSL_MCBSP_32BIT_REVERS_DISABLE }\


/** Clock Setup defaults */
#define CSL_MCBSP_CLOCKSETUP_DEFAULTS  {                \
 (CSL_McbspFsClkMode)CSL_MCBSP_FSCLKMODE_EXTERNAL,      \
 (CSL_McbspFsClkMode)CSL_MCBSP_FSCLKMODE_EXTERNAL,      \
 (CSL_McbspTxRxClkMode)CSL_MCBSP_TXRXCLKMODE_INTERNAL,  \
 (CSL_McbspTxRxClkMode)CSL_MCBSP_TXRXCLKMODE_EXTERNAL,  \
 (CSL_McbspFsPol)0,                                     \
 (CSL_McbspFsPol)0,                                     \
 (CSL_McbspClkPol)0,                                    \
 (CSL_McbspClkPol)0,                                    \
 1,                                                     \
 0x40,                                                  \
 0xFF,                                                  \
 (CSL_McbspSrgClk)0,                                    \
 (CSL_McbspClkPol)0,                                    \
 (CSL_McbspTxFsMode)CSL_MCBSP_TXFSMODE_SRG,             \
 (CSL_McbspClkgSyncMode)CSL_MCBSP_CLKGSYNCMODE_OFF     }\


/** Multichannel Setup defaults */
#define CSL_MCBSP_MULTICHAN_DEFAULTS  {                 \
 (CSL_McbspPartMode)CSL_MCBSP_PARTMODE_2PARTITION,      \
 (CSL_McbspPartMode)CSL_MCBSP_PARTMODE_2PARTITION,      \
 (Uint16)0,                                             \
 (Uint16)0,                                             \
 (CSL_McbspPABlk)CSL_MCBSP_PABLK_0,                     \
 (CSL_McbspPBBlk)CSL_MCBSP_PBBLK_1,                     \
 (CSL_McbspPABlk)CSL_MCBSP_PABLK_0,                     \
 (CSL_McbspPBBlk)CSL_MCBSP_PBBLK_1,                     \
 }\


/** Global parameters Setup defaults */
#define CSL_MCBSP_GLOBALSETUP_DEFAULTS  {               \
 (CSL_McbspIOMode)CSL_MCBSP_IOMODE_TXDIS_RXDIS,         \
 (CSL_McbspDlbMode)CSL_MCBSP_DLBMODE_OFF,               \
 (CSL_McbspClkStp)CSL_MCBSP_CLKSTP_DISABLE }             \


/** Default Emulation mode - Stop */
#define CSL_MCBSP_EMUMODE_DEFAULT  CSL_MCBSP_EMU_STOP

/** Extend Setup default - NULL */
#define CSL_MCBSP_EXTENDSETUP_DEFAULT  NULL


/**************************************************************************\
* MCBSP global typedef declarations
\**************************************************************************/

/**
 * Word lengths supported on MCBSP.Use this symbol for setting Word 
 * Length in each Phase for every Frame
 */
 
typedef enum {
    /** Word Length for Frame is 8 */
    CSL_MCBSP_WORDLEN_8        =                  0,
    /** Word Length for Frame is 12 */
    CSL_MCBSP_WORDLEN_12       =                  1,
    /** Word Length for Frame is 16 */
    CSL_MCBSP_WORDLEN_16       =                  2,
    /** Word Length for Frame is 20 */
    CSL_MCBSP_WORDLEN_20       =                  3,
    /** Word Length for Frame is 24 */
    CSL_MCBSP_WORDLEN_24       =                  4,
    /** Word Length for Frame is 32 */
    CSL_MCBSP_WORDLEN_32       =                  5
} CSL_McbspWordLen;

/**
 * MCBSP companding options - Use this symbol to set Companding related options
 */
typedef enum {
    /** no companding for msb */
    CSL_MCBSP_COMPAND_OFF_MSB_FIRST =                 0,
    /** no companding for lsb */
    CSL_MCBSP_COMPAND_OFF_LSB_FIRST =                 1,
    /** mu-law comapanding enable for channel */
    CSL_MCBSP_COMPAND_MULAW         =                 2,
    /** A-law comapanding enable for channel */
    CSL_MCBSP_COMPAND_ALAW          =                 3
} CSL_McbspCompand;

/**
 * Data delay in bits - Use this symbol to set XMT/RCV Data Delay (in bits)
 */
typedef enum {
    /** sets XMT/RCV Data Delay is 0 */
    CSL_MCBSP_DATADELAY_0_BIT      =                 0,
    /** sets XMT/RCV Data Delay is 1 */
    CSL_MCBSP_DATADELAY_1_BIT      =                 1,
    /** sets XMT/RCV Data Delay is 2 */
    CSL_MCBSP_DATADELAY_2_BITS     =                 2
} CSL_McbspDataDelay;

/**
 * MCBSP Interrupt mode -
 * Use this symbol to set Interrupt mode (i.e. source of interrupt generation).
 * This symbol is used on both RCV and XMT for RINT and XINT generation mode.
 */ 
typedef enum {
    /** Interrupt generated on RRDY of RCV or XRDY of XMT */
    CSL_MCBSP_INTMODE_ON_READY         =                  0,
    /** Interrupt generated on end of 16-channel block transfer
     *  in multichannel mode */
    CSL_MCBSP_INTMODE_ON_EOB           =                  1,
    /** Interrupt generated on frame sync */
    CSL_MCBSP_INTMODE_ON_FSYNC         =                  2,
    /** Interrupt generated on synchronisation error */
    CSL_MCBSP_INTMODE_ON_SYNCERR       =                  3
} CSL_McbspIntMode;

/**
 * Frame sync clock source - Use this symbol to set the frame sync clock 
 * source as internal or external
 */
typedef enum {
    /** frame sync clock source as external */
    CSL_MCBSP_FSCLKMODE_EXTERNAL    =                  0,
    /** frame sync clock source as internal */
    CSL_MCBSP_FSCLKMODE_INTERNAL    =                  1
} CSL_McbspFsClkMode;

/**
 * Clock source - Use this symbol to set the clock source as 
 * internal or external
 */
typedef enum {
    /** clock source as external */
    CSL_MCBSP_TXRXCLKMODE_EXTERNAL    =                  0,
    /** clock source as internal */
    CSL_MCBSP_TXRXCLKMODE_INTERNAL    =                  1
} CSL_McbspTxRxClkMode;

/**
 * Frame sync polarity - Use this symbol to set frame sync polarity as 
 * active-high or active-low
 */
typedef enum {
    /** frame sync polarity is active-high */
    CSL_MCBSP_FSPOL_ACTIVE_HIGH      =                  0,
    /** frame sync polarity is active-low */
    CSL_MCBSP_FSPOL_ACTIVE_LOW       =                  1
} CSL_McbspFsPol;

/**
 * Clock polarity - Use this symbol to set XMT or RCV clock polarity as
 * rising or falling edge
 */
typedef enum {
    /** XMT clock polarity is rising edge */
    CSL_MCBSP_CLKPOL_TX_RISING_EDGE      =                 0,
    /** RCV clock polarity is falling edge */
    CSL_MCBSP_CLKPOL_RX_FALLING_EDGE     =                 0,
    /** SRG clock polarity is rising edge */
    CSL_MCBSP_CLKPOL_SRG_RISING_EDGE     =                 0,
    /** XMT clock polarity is falling edge */
    CSL_MCBSP_CLKPOL_TX_FALLING_EDGE     =                 1,
    /** RCV clock polarity is rising edge */
    CSL_MCBSP_CLKPOL_RX_RISING_EDGE      =                 1,
    /** SRG clock polarity Is falling edge */
    CSL_MCBSP_CLKPOL_SRG_FALLING_EDGE    =                 1
} CSL_McbspClkPol;

/**
 * SRG clock source - Use this symbol to select input clock source 
 * for Sample Rate Generator
 */
typedef enum {
    /** input clock source for Sample Rate Generator is CLKS pin */
    CSL_MCBSP_SRGCLK_CLKS                 =                  0,
    /** input clock source for Sample Rate Generator is CPU */
    CSL_MCBSP_SRGCLK_CLKCPU               =                  1
} CSL_McbspSrgClk;

/**
 * XMT Frame Sync generation mode -  Use this symbol to set XMT Frame Sync
 * generation mode
 */
typedef enum {
    /** Disables the frame sync generation mode */
    CSL_MCBSP_TXFSMODE_DXRCOPY  =                  0,
    /** Enables the frame sync generation mode */
    CSL_MCBSP_TXFSMODE_SRG      =                  1
} CSL_McbspTxFsMode;

/** 
 * XMT and RCV IO Mode - Use this symbol to Enable/Disable IO Mode