cslr_edma3tc.h

Dm6455 driver,magbe useful to you!

#define CSL_EDMA3TC_RDRATE_RESETVAL      (0x00000000u)

/* SAOPT */

#define CSL_EDMA3TC_SAOPT_TCCHEN_MASK    (0x00400000u)
#define CSL_EDMA3TC_SAOPT_TCCHEN_SHIFT   (0x00000016u)
#define CSL_EDMA3TC_SAOPT_TCCHEN_RESETVAL (0x00000000u)

/*----TCCHEN Tokens----*/
#define CSL_EDMA3TC_SAOPT_TCCHEN_DISABLE (0x00000000u)
#define CSL_EDMA3TC_SAOPT_TCCHEN_ENABLE  (0x00000001u)

#define CSL_EDMA3TC_SAOPT_TCINTEN_MASK   (0x00100000u)
#define CSL_EDMA3TC_SAOPT_TCINTEN_SHIFT  (0x00000014u)
#define CSL_EDMA3TC_SAOPT_TCINTEN_RESETVAL (0x00000000u)

/*----TCINTEN Tokens----*/
#define CSL_EDMA3TC_SAOPT_TCINTEN_DISABLE (0x00000000u)
#define CSL_EDMA3TC_SAOPT_TCINTEN_ENABLE (0x00000001u)

#define CSL_EDMA3TC_SAOPT_TCC_MASK       (0x0003F000u)
#define CSL_EDMA3TC_SAOPT_TCC_SHIFT      (0x0000000Cu)
#define CSL_EDMA3TC_SAOPT_TCC_RESETVAL   (0x00000000u)

#define CSL_EDMA3TC_SAOPT_FWID_MASK      (0x00000700u)
#define CSL_EDMA3TC_SAOPT_FWID_SHIFT     (0x00000008u)
#define CSL_EDMA3TC_SAOPT_FWID_RESETVAL  (0x00000000u)

/*----FWID Tokens----*/
#define CSL_EDMA3TC_SAOPT_FWID_8BIT      (0x00000000u)
#define CSL_EDMA3TC_SAOPT_FWID_16BIT     (0x00000001u)
#define CSL_EDMA3TC_SAOPT_FWID_32BIT     (0x00000002u)
#define CSL_EDMA3TC_SAOPT_FWID_64BIT     (0x00000003u)
#define CSL_EDMA3TC_SAOPT_FWID_128BIT    (0x00000004u)
#define CSL_EDMA3TC_SAOPT_FWID_256BIT    (0x00000005u)

#define CSL_EDMA3TC_SAOPT_PRI_MASK       (0x00000070u)
#define CSL_EDMA3TC_SAOPT_PRI_SHIFT      (0x00000004u)
#define CSL_EDMA3TC_SAOPT_PRI_RESETVAL   (0x00000000u)

#define CSL_EDMA3TC_SAOPT_DAM_MASK       (0x00000002u)
#define CSL_EDMA3TC_SAOPT_DAM_SHIFT      (0x00000001u)
#define CSL_EDMA3TC_SAOPT_DAM_RESETVAL   (0x00000000u)

/*----DAM Tokens----*/
#define CSL_EDMA3TC_SAOPT_DAM_INCR       (0x00000000u)
#define CSL_EDMA3TC_SAOPT_DAM_CONST      (0x00000001u)

#define CSL_EDMA3TC_SAOPT_SAM_MASK       (0x00000001u)
#define CSL_EDMA3TC_SAOPT_SAM_SHIFT      (0x00000000u)
#define CSL_EDMA3TC_SAOPT_SAM_RESETVAL   (0x00000000u)

/*----SAM Tokens----*/
#define CSL_EDMA3TC_SAOPT_SAM_INCR       (0x00000000u)
#define CSL_EDMA3TC_SAOPT_SAM_CONST      (0x00000001u)

#define CSL_EDMA3TC_SAOPT_RESETVAL       (0x00000000u)

/* SASRC */

#define CSL_EDMA3TC_SASRC_SADDR_MASK     (0xFFFFFFFFu)
#define CSL_EDMA3TC_SASRC_SADDR_SHIFT    (0x00000000u)
#define CSL_EDMA3TC_SASRC_SADDR_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SASRC_RESETVAL       (0x00000000u)

/* SACNT */

#define CSL_EDMA3TC_SACNT_BCNT_MASK      (0xFFFF0000u)
#define CSL_EDMA3TC_SACNT_BCNT_SHIFT     (0x00000010u)
#define CSL_EDMA3TC_SACNT_BCNT_RESETVAL  (0x00000000u)

#define CSL_EDMA3TC_SACNT_ACNT_MASK      (0x0000FFFFu)
#define CSL_EDMA3TC_SACNT_ACNT_SHIFT     (0x00000000u)
#define CSL_EDMA3TC_SACNT_ACNT_RESETVAL  (0x00000000u)

#define CSL_EDMA3TC_SACNT_RESETVAL       (0x00000000u)

/* SADST */

#define CSL_EDMA3TC_SADST_DADDR_MASK     (0xFFFFFFFFu)
#define CSL_EDMA3TC_SADST_DADDR_SHIFT    (0x00000000u)
#define CSL_EDMA3TC_SADST_DADDR_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SADST_RESETVAL       (0x00000000u)

/* SABIDX */

#define CSL_EDMA3TC_SABIDX_DSTBIDX_MASK  (0xFFFF0000u)
#define CSL_EDMA3TC_SABIDX_DSTBIDX_SHIFT (0x00000010u)
#define CSL_EDMA3TC_SABIDX_DSTBIDX_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SABIDX_SRCBIDX_MASK  (0x0000FFFFu)
#define CSL_EDMA3TC_SABIDX_SRCBIDX_SHIFT (0x00000000u)
#define CSL_EDMA3TC_SABIDX_SRCBIDX_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SABIDX_RESETVAL      (0x00000000u)

/* SAMPPRXY */

#define CSL_EDMA3TC_SAMPPRXY_PRIV_MASK   (0x00000100u)
#define CSL_EDMA3TC_SAMPPRXY_PRIV_SHIFT  (0x00000008u)
#define CSL_EDMA3TC_SAMPPRXY_PRIV_RESETVAL (0x00000000u)

/*----PRIV Tokens----*/
#define CSL_EDMA3TC_SAMPPRXY_PRIV_USER   (0x00000000u)
#define CSL_EDMA3TC_SAMPPRXY_PRIV_SUPERVISOR (0x00000001u)

#define CSL_EDMA3TC_SAMPPRXY_PRIVID_MASK (0x0000000Fu)
#define CSL_EDMA3TC_SAMPPRXY_PRIVID_SHIFT (0x00000000u)
#define CSL_EDMA3TC_SAMPPRXY_PRIVID_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SAMPPRXY_RESETVAL    (0x00000000u)

/* SACNTRLD */

#define CSL_EDMA3TC_SACNTRLD_ACNTRLD_MASK (0x0000FFFFu)
#define CSL_EDMA3TC_SACNTRLD_ACNTRLD_SHIFT (0x00000000u)
#define CSL_EDMA3TC_SACNTRLD_ACNTRLD_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SACNTRLD_RESETVAL    (0x00000000u)

/* SASRCBREF */

#define CSL_EDMA3TC_SASRCBREF_SADDRBREF_MASK (0xFFFFFFFFu)
#define CSL_EDMA3TC_SASRCBREF_SADDRBREF_SHIFT (0x00000000u)
#define CSL_EDMA3TC_SASRCBREF_SADDRBREF_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SASRCBREF_RESETVAL   (0x00000000u)

/* SADSTBREF */

#define CSL_EDMA3TC_SADSTBREF_DADDRBREF_MASK (0xFFFFFFFFu)
#define CSL_EDMA3TC_SADSTBREF_DADDRBREF_SHIFT (0x00000000u)
#define CSL_EDMA3TC_SADSTBREF_DADDRBREF_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_SADSTBREF_RESETVAL   (0x00000000u)

/* DFCNTRLD */

#define CSL_EDMA3TC_DFCNTRLD_ACNTRLD_MASK (0x0000FFFFu)
#define CSL_EDMA3TC_DFCNTRLD_ACNTRLD_SHIFT (0x00000000u)
#define CSL_EDMA3TC_DFCNTRLD_ACNTRLD_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFCNTRLD_RESETVAL    (0x00000000u)

/* DFSRCBREF */

#define CSL_EDMA3TC_DFSRCBREF_SADDRBREF_MASK (0xFFFFFFFFu)
#define CSL_EDMA3TC_DFSRCBREF_SADDRBREF_SHIFT (0x00000000u)
#define CSL_EDMA3TC_DFSRCBREF_SADDRBREF_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFSRCBREF_RESETVAL   (0x00000000u)

/* DFDSTBREF */

#define CSL_EDMA3TC_DFDSTBREF_DADDRBREF_MASK (0xFFFFFFFFu)
#define CSL_EDMA3TC_DFDSTBREF_DADDRBREF_SHIFT (0x00000000u)
#define CSL_EDMA3TC_DFDSTBREF_DADDRBREF_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFDSTBREF_RESETVAL   (0x00000000u)

/* DFOPT */

#define CSL_EDMA3TC_DFOPT_TCCHEN_MASK    (0x00400000u)
#define CSL_EDMA3TC_DFOPT_TCCHEN_SHIFT   (0x00000016u)
#define CSL_EDMA3TC_DFOPT_TCCHEN_RESETVAL (0x00000000u)

/*----TCCHEN Tokens----*/
#define CSL_EDMA3TC_DFOPT_TCCHEN_DISABLE (0x00000000u)
#define CSL_EDMA3TC_DFOPT_TCCHEN_ENABLE  (0x00000001u)

#define CSL_EDMA3TC_DFOPT_TCINTEN_MASK   (0x00100000u)
#define CSL_EDMA3TC_DFOPT_TCINTEN_SHIFT  (0x00000014u)
#define CSL_EDMA3TC_DFOPT_TCINTEN_RESETVAL (0x00000000u)

/*----TCINTEN Tokens----*/
#define CSL_EDMA3TC_DFOPT_TCINTEN_DISABLE (0x00000000u)
#define CSL_EDMA3TC_DFOPT_TCINTEN_ENABLE (0x00000001u)

#define CSL_EDMA3TC_DFOPT_TCC_MASK       (0x0003F000u)
#define CSL_EDMA3TC_DFOPT_TCC_SHIFT      (0x0000000Cu)
#define CSL_EDMA3TC_DFOPT_TCC_RESETVAL   (0x00000000u)

#define CSL_EDMA3TC_DFOPT_FWID_MASK      (0x00000700u)
#define CSL_EDMA3TC_DFOPT_FWID_SHIFT     (0x00000008u)
#define CSL_EDMA3TC_DFOPT_FWID_RESETVAL  (0x00000000u)

/*----FWID Tokens----*/
#define CSL_EDMA3TC_DFOPT_FWID_8BIT      (0x00000000u)
#define CSL_EDMA3TC_DFOPT_FWID_16BIT     (0x00000001u)
#define CSL_EDMA3TC_DFOPT_FWID_32BIT     (0x00000002u)
#define CSL_EDMA3TC_DFOPT_FWID_64BIT     (0x00000003u)
#define CSL_EDMA3TC_DFOPT_FWID_128BIT    (0x00000004u)
#define CSL_EDMA3TC_DFOPT_FWID_256BIT    (0x00000005u)

#define CSL_EDMA3TC_DFOPT_PRI_MASK       (0x00000070u)
#define CSL_EDMA3TC_DFOPT_PRI_SHIFT      (0x00000004u)
#define CSL_EDMA3TC_DFOPT_PRI_RESETVAL   (0x00000000u)

#define CSL_EDMA3TC_DFOPT_DAM_MASK       (0x00000002u)
#define CSL_EDMA3TC_DFOPT_DAM_SHIFT      (0x00000001u)
#define CSL_EDMA3TC_DFOPT_DAM_RESETVAL   (0x00000000u)

/*----DAM Tokens----*/
#define CSL_EDMA3TC_DFOPT_DAM_INCR       (0x00000000u)
#define CSL_EDMA3TC_DFOPT_DAM_FIFO       (0x00000001u)

#define CSL_EDMA3TC_DFOPT_SAM_MASK       (0x00000001u)
#define CSL_EDMA3TC_DFOPT_SAM_SHIFT      (0x00000000u)
#define CSL_EDMA3TC_DFOPT_SAM_RESETVAL   (0x00000000u)

/*----SAM Tokens----*/
#define CSL_EDMA3TC_DFOPT_SAM_INCR       (0x00000000u)
#define CSL_EDMA3TC_DFOPT_SAM_FIFO       (0x00000001u)

#define CSL_EDMA3TC_DFOPT_RESETVAL       (0x00000000u)

/* DFSRC */

#define CSL_EDMA3TC_DFSRC_SADDR_MASK     (0xFFFFFFFFu)
#define CSL_EDMA3TC_DFSRC_SADDR_SHIFT    (0x00000000u)
#define CSL_EDMA3TC_DFSRC_SADDR_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFSRC_RESETVAL       (0x00000000u)

/* DFCNT */

#define CSL_EDMA3TC_DFCNT_BCNT_MASK      (0xFFFF0000u)
#define CSL_EDMA3TC_DFCNT_BCNT_SHIFT     (0x00000010u)
#define CSL_EDMA3TC_DFCNT_BCNT_RESETVAL  (0x00000000u)

#define CSL_EDMA3TC_DFCNT_ACNT_MASK      (0x0000FFFFu)
#define CSL_EDMA3TC_DFCNT_ACNT_SHIFT     (0x00000000u)
#define CSL_EDMA3TC_DFCNT_ACNT_RESETVAL  (0x00000000u)

#define CSL_EDMA3TC_DFCNT_RESETVAL       (0x00000000u)

/* DFDST */

#define CSL_EDMA3TC_DFDST_DADDR_MASK     (0xFFFFFFFFu)
#define CSL_EDMA3TC_DFDST_DADDR_SHIFT    (0x00000000u)
#define CSL_EDMA3TC_DFDST_DADDR_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFDST_RESETVAL       (0x00000000u)

/* DFBIDX */

#define CSL_EDMA3TC_DFBIDX_DSTBIDX_MASK  (0xFFFF0000u)
#define CSL_EDMA3TC_DFBIDX_DSTBIDX_SHIFT (0x00000010u)
#define CSL_EDMA3TC_DFBIDX_DSTBIDX_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFBIDX_SRCBIDX_MASK  (0x0000FFFFu)
#define CSL_EDMA3TC_DFBIDX_SRCBIDX_SHIFT (0x00000000u)
#define CSL_EDMA3TC_DFBIDX_SRCBIDX_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFBIDX_RESETVAL      (0x00000000u)

/* DFMPPRXY */

#define CSL_EDMA3TC_DFMPPRXY_PRIV_MASK   (0x00000100u)
#define CSL_EDMA3TC_DFMPPRXY_PRIV_SHIFT  (0x00000008u)
#define CSL_EDMA3TC_DFMPPRXY_PRIV_RESETVAL (0x00000000u)

/*----PRIV Tokens----*/
#define CSL_EDMA3TC_DFMPPRXY_PRIV_USER   (0x00000000u)
#define CSL_EDMA3TC_DFMPPRXY_PRIV_SUPERVISOR (0x00000001u)

#define CSL_EDMA3TC_DFMPPRXY_PRIVID_MASK (0x0000000Fu)
#define CSL_EDMA3TC_DFMPPRXY_PRIVID_SHIFT (0x00000000u)
#define CSL_EDMA3TC_DFMPPRXY_PRIVID_RESETVAL (0x00000000u)

#define CSL_EDMA3TC_DFMPPRXY_RESETVAL    (0x00000000u)

#endif