📄 edma_csl2x_example.c
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return;
}
EDMA_intEnable (chan_no);
printf
("EDMA: Link Example ... Config. a 2 stage mem. to mem. transfer\n");
printf ("EDMA: Link Example ... Each transfer of %d bytes\n",
LINK_BUF_SIZE);
printf ("EDMA: Link Example ... Configuring stage 1\n");
conf.opt =
LINK_OPTIONS_WITH_LINK | ((tcc & TCC_MASK) << TCC_SHIFT) | ((tcc &
TCCM_MASK) << TCCM_SHIFT);
conf.cnt = (LINK_BUF_SIZE);
conf.idx = 0; /* 1-d source, 1-d destination, address
increment for both, so
FRMIDX = ELEIDX = don't care */
conf.rld = NO_RELOAD_AND_LINK; /* Linking is done latter in the example */
conf.dst = (Uint32) & link_dst1[0];
conf.src = (Uint32) & link_src1[0];
EDMA_config (handle, &conf);
printf
("EDMA: Link Example ... Alloc. a PaRAM for stage 2 configuration\n");
link_handle = EDMA_allocTable (EDMA_ALLOC_ANY);
printf ("EDMA: Link Example ... Configuring stage 2\n");
conf.opt =
LINK_OPTIONS_WITH_OUT_LINK | ((tcc & TCC_MASK) << TCC_SHIFT) | ((tcc &
TCCM_MASK) << TCCM_SHIFT); /* Same as stage 1 without linking */
conf.cnt = (LINK_BUF_SIZE);
conf.idx = 0; /* 1-d source, 1-d destination, address
increment for both, so
FRMIDX = ELEIDX = don't care */
conf.rld = NO_RELOAD_AND_LINK;
conf.dst = (Uint32) & link_dst2[0];
conf.src = (Uint32) & link_src2[0];
EDMA_config (link_handle, &conf);
printf ("EDMA: Link Example ... Linking the two transfers\n");
EDMA_link (handle, link_handle);
printf ("EDMA: Link Example ... Initiating the transfer 1\n");
/* Setup the ISR for the transfer */
edmaEventHook (chan_no, isr);
EDMA_setChannel (handle); /* Set event register, this should result in
interrupt */
/* Wait for the first transfer */
while (1) {
if (isr_cnt > 0) {
isr_cnt = 0;
break;
}
}
printf
("EDMA: Link Example ... Data transfer of first stage is complete\n");
/* Verify the first data transfer */
for (index = 0; index < LINK_BUF_SIZE; index++) {
if (link_dst1[index] != link_src1[index]) {
break;
}
}
if (index == LINK_BUF_SIZE) {
printf
("EDMA: Link Example ... 1st stage data transferred correctly\n");
}
else {
printf
("EDMA: Link Example ... 1st stage data not transferred correctly\n");
return;
}
printf ("EDMA: Link Example ... Initiating the transfer 2\n");
EDMA_setChannel (handle); /* Set event register, this should result in
interrupt */
/* Wait for the 2nd transfer completion */
while (1) {
if (isr_cnt > 0) {
isr_cnt = 0;
break;
}
}
printf
("EDMA: Link Example ... Data transfer of second stage is complete\n");
/* Verify the 2nd data transfer */
for (index = 0; index < LINK_BUF_SIZE; index++) {
if (link_dst2[index] != link_src2[index]) {
break;
}
}
if (index == LINK_BUF_SIZE) {
printf
("EDMA: Link Example ... 2nd stage data transferred correctly\n");
}
else {
printf
("EDMA: Link Example ... 2nd stage data not transferred correctly\n");
return;
}
/* Clean up */
EDMA_intReset (chan_no);
printf ("EDMA: Link Example ... DONE\n");
EDMA_close (handle);
EDMA_freeTable (link_handle);
EDMA_intFree (tcc);
}
/**
* ============================================================================
* @func chain_example
*
* @desc
* This performs a EDMA memory to memory transfer in two stages, by
* chaining.
*
* @n <b> Procedure </b>
* @verbatim
1. Setup the data destinations and sources for 2 transfers
2. Enable 2 channels
3. Allocate and configure interrupts, such that first channel transfer
is chained to the second channel
4. Configure the PaRAMs of the channels
5. Setup chaining
6. Start transfer on the first channel
7. Wait for the completion of both the tranfers
8. Verify the data transfers
9. Clean up
@endverbatim
* ============================================================================
*/
void chain_example (void)
{
EDMA_Handle handle;
EDMA_Handle chain_handle;
Uint32 chan_no;
Uint32 chain_chan_no;
Uint32 tcc1;
Uint32 tcc2;
EDMA_Config conf = { 0 };
Uint32 index;
/* Setup the data area */
for (index = 0; index < CHAIN_BUF_SIZE; index++) {
chain_src1[index] = index;
chain_dst1[index] = 0;
chain_src2[index] = CHAIN_BUF_SIZE - index;
chain_dst2[index] = 0;
}
/* Reset all interrupts of all channels of EDMA */
EDMA_intResetAll ();
chan_no = 4; /* Consider channel 4 as primary channel */
chain_chan_no = 5; /* Consider channel 5 as second channel in the chain */
/* TCC field of the first channel = second channel number, allocate it */
tcc1 = EDMA_intAlloc (chain_chan_no);
if (tcc1 != chain_chan_no) {
return;
}
/* Enable interrupt and open channel for the first transfer */
EDMA_intEnable (chain_chan_no);
handle = EDMA_open (chan_no, EDMA_OPEN_RESET);
printf
("EDMA: Chain Example ... Config. a 2 stage mem to mem transfer\n");
printf ("EDMA: Chain Example ... Each transfer of %d bytes\n",
CHAIN_BUF_SIZE);
printf ("EDMA: Chain Example ... Configuring stage 1\n");
conf.opt = CHAIN_OPTIONS; /* EDMA_chian will set the TCC */
conf.cnt = (CHAIN_BUF_SIZE); /* Frame Count is 0 */
conf.idx = 0; /* 1-d source, 1-d destination, address
increment for both, so
FRMIDX = ELEIDX = don't care */
conf.rld = NO_RELOAD_AND_LINK;
conf.dst = (Uint32) & chain_dst1[0];
conf.src = (Uint32) & chain_src1[0];
EDMA_config (handle, &conf);
/* Open the channel for the second transfer */
chain_handle = EDMA_open (chain_chan_no, EDMA_OPEN_RESET);
tcc2 = EDMA_intAlloc (6); /* Allocate EDMA interrupt 6 for the 2nd
transfer completion */
if (tcc2 != 6) {
return;
}
printf ("EDMA: Chain Example ... Configuring stage 2\n");
conf.opt =
CHAIN_OPTIONS | ((tcc2 & TCC_MASK) << TCC_SHIFT) | ((tcc2 &
TCCM_MASK) << TCCM_SHIFT); /* TCC is 6 */
conf.cnt = (CHAIN_BUF_SIZE); /* Frame Count is 0 */
conf.idx = 0; /* 1-d source, 1-d destination, address
increment for both, so
FRMIDX = ELEIDX = don't care */
conf.rld = NO_RELOAD_AND_LINK;
conf.dst = (Uint32) & chain_dst2[0];
conf.src = (Uint32) & chain_src2[0];
EDMA_config (chain_handle, &conf);
printf ("EDMA: Chain Example ... Chaining the two transfers\n");
EDMA_chain (handle, chain_handle, EDMA_TCC_SET, EDMA_ATCC_CLEAR);
printf ("EDMA: Chain Example ... Initiating the transfer\n");
EDMA_intEnable (tcc2);
/* Setup the ISRs for both the transfers */
edmaEventHook (chain_chan_no, isr2);
edmaEventHook (tcc2, isr);
/* Inititate transfer */
EDMA_setChannel (handle); /* Set event register, this should
result in interrupt */
/* Wait for the first stage of the chain */
while (1) {
if (parent_isr_cnt > 0) {
parent_isr_cnt = 0;
break;
}
}
/* Wait for the second stage of the chain */
while (1) {
if (isr_cnt > 0) {
isr_cnt = 0;
break;
}
}
printf ("EDMA: Chain Example ... Data transfer is complete\n");
/* Verify the first stage data transfer */
for (index = 0; index < CHAIN_BUF_SIZE; index++) {
if (chain_dst1[index] != chain_src1[index]) {
break;
}
}
if (index == CHAIN_BUF_SIZE) {
printf
("EDMA: Chain Example ... 1st stage data transferred correctly\n");
}
else {
printf
("EDMA: Chain Example ... 1st stage data not transferred correctly\n");
return;
}
/* Verify the second stage data transfer */
for (index = 0; index < CHAIN_BUF_SIZE; index++) {
if (chain_dst2[index] != chain_src2[index]) {
break;
}
}
if (index == CHAIN_BUF_SIZE) {
printf
("EDMA: Chain Example ... 2nd stage data transferred correctly\n");
}
else {
printf
("EDMA: Chain Example ... 2nd stage data not transferred correctly\n");
return;
}
printf ("EDMA: Chain Example ... DONE\n");
/* Clean up */
EDMA_close (handle);
EDMA_close (chain_handle);
EDMA_intReset (tcc2);
EDMA_intReset (chain_chan_no);
EDMA_intFree (tcc2);
EDMA_intFree (chain_chan_no);
}
/**
* ============================================================================
* @func qdma_example
*
* @desc
* This performs a QDMA memory to memory transfer.
*
* @n <b> Procedure </b>
* @verbatim
1. Setup the data destination and source
2. Allocate and configure interrupt
3. Configure the QDMA
4. Wait for the completion of the transfer
5. Verify the data transfer
6. Clean up
@endverbatim
* ============================================================================
*/
void qdma_example (void)
{
EDMA_Config conf = { 0 };
Int index;
Int tcc;
printf
("EDMA: QDMA Example ... config. to transfer a 1 dimensional array \n");
for (index = 0; index < SIMPLE_TRANSFER_SIZE; index++) {
src[index] = index;
dst[index] = 0;
}
/* Allocate the interrupt */
tcc = EDMA_intAlloc (EDMA_ALLOC_ANY);
conf.opt =
QDMA_OPTIONS | ((tcc & TCC_MASK) << TCC_SHIFT) | ((tcc & TCCM_MASK) <<
TCCM_SHIFT);
conf.src = (Uint32) (&src[0]);
conf.cnt = ((SIMPLE_TRANSFER_SIZE) / sizeof (Uint32)); /* Element Count */
conf.dst = (Uint32) (&dst[0]);
/* Setup the ISR */
edmaEventHook (tcc, isr);
EDMA_intEnable (tcc);
printf ("EDMA: QDMA Example ... Configuring and starting the transfer\n");
EDMA_qdmaConfig (&conf);
/* Wait for until transfer is over */
while (1) {
if (isr_cnt > 0) {
isr_cnt = 0;
break;
}
}
/* Verify the transferred data */
for (index = 0; index < SIMPLE_TRANSFER_SIZE; index++) {
if (src[index] != dst[index]) {
break;
}
}
if (index == SIMPLE_TRANSFER_SIZE) {
printf
("EDMA: QDMA Example ... transferred 1 dimensional array of %d bytes\n",
SIMPLE_TRANSFER_SIZE);
}
else {
printf ("EDMA: qdmaConfig ... Failed, while transfering an array\n");
return;
}
EDMA_intFree (tcc);
EDMA_intReset (tcc);
printf ("EDMA: QDMA Example ... DONE\n");
}
/* Configuration of INTC module */
void configure_intc (void)
{
CSL_IntcObj intcObjEdma;
CSL_IntcGlobalEnableState state;
CSL_IntcEventHandlerRecord EventRecord;
CSL_IntcHandle hIntcEdma;
CSL_Status intStat;
CSL_IntcParam vectId;
/* Intc Module Initialization */
intcContext.eventhandlerRecord = EventHandler;
intcContext.numEvtEntries = 1;
CSL_intcInit (&intcContext);
/* Enable NMIs */
CSL_intcGlobalNmiEnable ();
/* Enable Global Interrupts */
intStat = CSL_intcGlobalEnable (&state);
if (intStat != CSL_SOK) {
printf ("Initiallization of INTC failed\n");
}
/* Opening a handle for the Event edma */
vectId = CSL_INTC_VECTID_12;
hIntcEdma = CSL_intcOpen (&intcObjEdma, CSL_INTC_EVENTID_EDMA3CC_GINT, \
&vectId, NULL);
EventRecord.handler = &eventEdmaHandler;
EventRecord.arg = 0;
CSL_intcPlugEventHandler (hIntcEdma, &EventRecord);
/* Enabling event edma */
CSL_intcHwControl (hIntcEdma, CSL_INTC_CMD_EVTENABLE, NULL);
}
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