mcbsp_edma_example.c

Dm6455 driver,magbe useful to you!

/*  ===========================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2006
 *
 *   Use of this software is controlled by the terms and conditions found in 
 *   the license agreement under which this software has been supplied.
 *   ==========================================================================
 */

/** ===========================================================================
 *
 *   @file  Mcbsp_Edma_example.c
 *
 *   @path  $(CSLPATH)\example\mcbsp\mcbsp_edma\src
 *
 *   @desc  Example of MCBSP
 *
 *  ============================================================================
 *   @n Target Platform: EVM
 *  ============================================================================
 *   @n <b> Example Description </b>
 *   @n In this example, the MCBSP0 is configured in digital loopback mode,
 *      with 32 bit data transfer, using sample rate generator to synchronize 
 *      the frames.Edma mode of transmission is selected.
 *      This example,
 *          1. Initializes and opens mcbsp module. 
 *          2. Sets up the hardware to default values and multi channel 
 *             32 bit data transfer i.e., CSL_mcbspHwSetup() is called for 
 *             module configuration.
            3. Sets up interrupts corresponding to EDMA and MCBSP.
 *          4. Sets up EDMA for synchronizing ate MCBSP.
 *          5. Enables MCBSP to Transmit/Receive Data.
 *          7. Waits for the interrupt and once the transfer is done closes 
 *             the EDMA.  
 *          8. Does the data comparison to ensure the validity of the data.
 *          9. Displays the messages based on step 8.
 *
 * =============================================================================
 *      
 *   <b> Procedure to run the example </b>
 *   @verbatim
 *      1. Configure the CCS setup to work with the emulator being used
 *      2. Please refer CCS manual for setup configuration and loading 
 *         proper GEL file
 *      3. Launch CCS window
 *      4. Open project Mcbsp_Edma_example.pjt
 *      5. Build the project and load the .out file of the project.
 *          
 *   @endverbatim
 *
 */
 

/* =============================================================================
 *  Revision History
 *  ===============
 *  9-Aug-2006 RR File Created.
 *
 * =============================================================================
 */

#include <edmaCommon.h>
#include <cslr_dev.h>

/* Define data count */
#define DATATX_COUNT                64

/* Global for mcbsp */
Uint8               srcBuff[DATATX_COUNT];
Uint8               dstBuff[DATATX_COUNT];
volatile Uint32     intFlag = 0;
volatile Uint32     rxintFlag = 0;  

/* Handle for the MCBSP instance used in test */
CSL_McbspHandle   hMcbsp;

/* Macro that gives 2 CLK delay cycles */
#define WAIT_FOR_1_CLK  do {                                   \
                            volatile int delayCnt = 1;      \
                            while(delayCnt > 0) --delayCnt; \
                           }while (0)             

/* Global data definition */
CSL_McbspGlobalSetup mcbspGbl = {
    CSL_MCBSP_IOMODE_TXDIS_RXDIS ,
    CSL_MCBSP_DLBMODE_ON,
    CSL_MCBSP_CLKSTP_DISABLE
};

/** Receive Data Setup defaults */
CSL_McbspDataSetup mcbspRxData = {
    CSL_MCBSP_PHASE_SINGLE,
    CSL_MCBSP_WORDLEN_32,
     1,            //frame length
    (CSL_McbspWordLen)0,
     0,
    CSL_MCBSP_FRMSYNC_IGNORE, //frame sinc ignore
    CSL_MCBSP_COMPAND_OFF_MSB_FIRST,
    CSL_MCBSP_DATADELAY_0_BIT,
    CSL_MCBSP_RJUSTDXENA_RJUST_RZF , 
    CSL_MCBSP_INTMODE_ON_READY,   
    CSL_MCBSP_32BIT_REVERS_DISABLE
};
/** Transmit Data Setup defaults */
CSL_McbspDataSetup mcbspTxData = {
    CSL_MCBSP_PHASE_SINGLE,
    CSL_MCBSP_WORDLEN_32,
     1,
    (CSL_McbspWordLen)0,
     0,
    CSL_MCBSP_FRMSYNC_IGNORE,
    CSL_MCBSP_COMPAND_OFF_MSB_FIRST,
    CSL_MCBSP_DATADELAY_0_BIT,
    CSL_MCBSP_RJUSTDXENA_DXENA_OFF , 
    CSL_MCBSP_INTMODE_ON_READY,   
    CSL_MCBSP_32BIT_REVERS_DISABLE
};

/** Clock Setup defaults */
CSL_McbspClkSetup mcbspClock = {
    CSL_MCBSP_FSCLKMODE_INTERNAL,    /* XMT Frame-sync */
    CSL_MCBSP_FSCLKMODE_INTERNAL,    /* RCV Frame-sync */
    CSL_MCBSP_TXRXCLKMODE_INTERNAL,  /* XMT clock */
    CSL_MCBSP_TXRXCLKMODE_INTERNAL,  /* RCV clock */
    CSL_MCBSP_FSPOL_ACTIVE_HIGH,     /* XMT Frame-sync Active High */
    CSL_MCBSP_FSPOL_ACTIVE_HIGH,     /* RCV Frame-sync Active High */
    CSL_MCBSP_CLKPOL_TX_RISING_EDGE, /* XMT clock Rising Edge */
    CSL_MCBSP_CLKPOL_RX_FALLING_EDGE,/* RCV clock Falling Edge */
    1,                               /* Frame-sync pulse width = 1 bit */
    0x40,                            /* Frame-sync pulse period  */
    0x1,                             /*clk divide by 2 */
    CSL_MCBSP_SRGCLK_CLKCPU,
    CSL_MCBSP_CLKPOL_TX_RISING_EDGE ,/* CLKS pin signal Rising Edge */
    CSL_MCBSP_TXFSMODE_DXRCOPY,
    CSL_MCBSP_CLKGSYNCMODE_OFF  /* GSYNC = 0 means no clock synchronisation */
};

CSL_McbspMulChSetup mcbspMul = {
    CSL_MCBSP_PARTMODE_2PARTITION, /* RX */
    CSL_MCBSP_PARTMODE_2PARTITION, /* TX */
    (Uint16)0,        /*  rxMulChSel */
    (Uint16)0,        /*  txMulChSel */
    CSL_MCBSP_PABLK_0,/* rxPartABlk */
    CSL_MCBSP_PBBLK_1,/* rxPartBBlk */
    CSL_MCBSP_PABLK_0,/* txPartABlk */
    CSL_MCBSP_PBBLK_1 /* txPartABlk */
};

CSL_McbspHwSetup myHwSetup = {
    &mcbspGbl,
    &mcbspRxData,
    &mcbspTxData,
    &mcbspClock,
    &mcbspMul,
    CSL_MCBSP_EMU_FREERUN,
    NULL
};

/* Global Edma Tcc handler table */
CSL_IntcEventHandlerRecord      EventHandler[30];
CSL_IntcContext                 intcContext; 
CSL_IntcGlobalEnableState       state;
CSL_Status                      intStat,status;
CSL_IntcEventHandlerRecord      EventRecord;
CSL_IntcEventHandlerRecord      EventRecord1; 
CSL_IntcEventHandlerRecord      record[2];
CSL_IntcObj                     intcObjEdma,intcObjEdma1;
CSL_IntcHandle                  hIntcEdma,hIntcEdma1; 
CSL_IntcParam                   vectId,vectId1;

CSL_Edma3Handle          hModule;
CSL_Edma3ChannelHandle   hChannel;
CSL_Edma3ChannelHandle   hChannel1;
CSL_Edma3ChannelErr      chErrClear;
    
/* function prototype */
void setupInterrupts(void);
void txmyIsr();
void rxmyIsr();
void mcbsp_edma_example(void);
void mcbsp_edma_setup(void);

/*
 * =============================================================================
 *   @func   main
 *
 *   @desc
 *     This is the main routine,which invokes the test scripts
 * =============================================================================
 */
void main (
    void    
)
{
    Bool  mcbsp0En;
    
    /* Enable Mcbsp0 */
    /* Unlock the PERCFG0 register */
    CSL_FINST (((CSL_DevRegs*)CSL_DEV_REGS)->PERLOCK, DEV_PERLOCK_LOCKVAL, 
               UNLOCK);
               
    /* Enable the powersaver for the MCBSP 0 */
    CSL_FINST (((CSL_DevRegs*)CSL_DEV_REGS)->PERCFG0, DEV_PERCFG0_MCBSP0CTL, 
               ENABLE);
    
    do {
        mcbsp0En = (Bool) CSL_FEXT(((CSL_DevRegs*)CSL_DEV_REGS)->PERSTAT0, 
                                   DEV_PERSTAT0_MCBSP0STAT);
    } while (mcbsp0En != TRUE);

    printf("Powersaver for MCBSP 0 is enabled\n");

    /* Invoke the example */
    mcbsp_edma_example ();
    
    printf("===============================================================\n");
    
    return;
}

 /*
 * ============================================================================
 * @func  mcbsp_edma_example
 *
 * @desc
 *     This function performs following steps:
 *      -#  Opens one MCBSP port
 *      -#  Resets MCBSP XMT, RCV and Enable SRGR, Frame-sync
 *      -#  Sets up MCBSP with the initialized hwSetup function
 *          and waits for 1 CLK cycles
 *      -#  After all the data is transmitted out of MCBSP, it compares 
 *          the two buffers and prints the result to stdout
 *      -#  In the end it closes the MCBSP instance that was opened
 *
 * ============================================================================
 */
void mcbsp_edma_example (void)
{
    CSL_Status        status = CSL_SOK;
    CSL_McbspContext  pContext;
    CSL_McbspObj      mcbspObj;
    Uint16            i;
    Uint16            success = 1;
    CSL_BitMask16     ctrlMask;
    
    /* Data Arrays */   
    for (i = 0;i < DATATX_COUNT; i++) {
      srcBuff[i] = i;
      dstBuff[i] = 0;
   }

    /* Initialize the MCBSP CSL module */
    status = CSL_mcbspInit(&pContext);
    
    /* Open the CSL module */
    hMcbsp = CSL_mcbspOpen (&mcbspObj, CSL_MCBSP_0, NULL, &status);
       
    /* Setup hardware parameters */
    status= CSL_mcbspHwSetup (hMcbsp , &myHwSetup);

    /* Disable MCBSP transmit and receive */
    ctrlMask =   CSL_MCBSP_CTRL_SRG_ENABLE
               | CSL_MCBSP_CTRL_FSYNC_ENABLE
               | CSL_MCBSP_CTRL_TX_DISABLE
               | CSL_MCBSP_CTRL_RX_DISABLE;
    status = CSL_mcbspHwControl(hMcbsp, CSL_MCBSP_CMD_RESET_CONTROL, &ctrlMask);
        
	WAIT_FOR_1_CLK; 
 
    /* setup Edma for Mcbsp */