csl_tmraux.h

Dm6455 driver,magbe useful to you!

        ...
        CSL_TmrStartLo(hWdt, countMode);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStartLo (
    CSL_TmrHandle  hTmr,
    CSL_TmrEnamode countMode
)
{
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMLORS, RESET_OFF);
    CSL_FINS(hTmr->regs->TCR, TMR_TCR_ENAMODE_LO, countMode);
}



/** ===========================================================================
 *   @n@b CSL_TmrStart64
 *
 *   @b Description
 *      sets the timer counting mode and timer reset of GP OR chained timer
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance

         countMode   specifies the timer counting mode
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the GP OR chained timer counting mode and
 		  timer Low and High reset register.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR and TGCR register of timer Low AND High
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle  hTmr;
        CSL_TmrEnamode countMode;
        ...
        CSL_TmrStart64(hWdt, countMode);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStart64 (
    CSL_TmrHandle  hTmr,
    CSL_TmrEnamode countMode
)
{
    Uint32 temp;

    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMLORS, RESET_OFF);
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMHIRS, RESET_OFF);
    
    /*  enable TIML0 and TIMHI simultaneously by making 32 bit write to TGCR */
    temp = CSL_FMK(TMR_TCR_ENAMODE_LO, countMode) |
           CSL_FMK(TMR_TCR_ENAMODE_HI, countMode);

    /* do read, modify write operation for mode bits for TIMLO, TIMHI */
    hTmr->regs->TCR = (hTmr->regs->TCR & ~temp) | temp;
}



/** ===========================================================================
 *   @n@b CSL_TmrStopLo
 *
 *   @b Description
 *      sets the timer counting mode to stop the timer.
 *	    The timer maintains the current value
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the GP Timer counting mode to stop the counting.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer Low
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrStopLo(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStopLo (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TCR, TMR_TCR_ENAMODE_LO, DISABLE);
}



/** ===========================================================================
 *   @n@b CSL_TmrStopHi
 *
 *   @b Description
 *      sets the timer counting mode to stop the timer.
 *	    The timer maintains the current value
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the GP Timer counting mode to stop the counting.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer High
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrStopHi(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStopHi (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TCR, TMR_TCR_ENAMODE_HI, DISABLE);
}



/** ===========================================================================
 *   @n@b CSL_TmrStop64
 *
 *   @b Description
 *      sets the timer counting mode to stop the timer.
 *	    The timer maintains the current value
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance

     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to GPtimer or Chained mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the GP Timer counting mode to stop the counting.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer Low and High
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrStop64(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStop64 (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TCR, TMR_TCR_ENAMODE_LO, DISABLE);
    CSL_FINST(hTmr->regs->TCR, TMR_TCR_ENAMODE_HI, DISABLE);
}



/** ===========================================================================
 *   @n@b CSL_TmrResetHi
 *
 *   @b Description
 *      TSTAT_HI is set to reset state
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any unchained mode
 *
 *   <b> Post Condition </b>
 *   @n   TTSTAT_HI is set to reset state
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer High
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrResetHi(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrResetHi (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMHIRS, RESET_ON);
}



/** ===========================================================================
 *   @n@b CSL_TmrResetLo
 *
 *   @b Description
 *      TSTAT_LO is set to reset state
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any unchained mode
 *
 *   <b> Post Condition </b>
 *   @n   TSTAT_LO is set to reset state
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer Low
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrResetLo(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrResetLo (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMLORS, RESET_ON);
}



/** ===========================================================================
 *   @n@b CSL_TmrReset64
 *
 *   @b Description
 *      TSTAT_LO and TSTAT_HI is set to reset state.
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to GPtimer or chained mode
 *
 *   <b> Post Condition </b>
 *   @n   TSTAT_LO and TSTAT_HI is set to reset state
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR of timer Low and High
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrReset64(hWdt);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrReset64 (
	CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMLORS, RESET_ON);
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMHIRS, RESET_ON);
}



/** ===========================================================================
 *   @n@b CSL_TmrStartWdt
 *
 *   @b Description
 *      sets the timer in watchdog  mode and counting mode for it
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance

        countMode    specifies the timer counting mode
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the watchdog timer counting mode and
 		  timer Low and High reset register and WDEN bit and WDKEY.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR and TGCR register of timer Low AND High and WDTCR rgister
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle  hTmr;
        CSL_TmrEnamode countMode;
        ...
        CSL_TmrStartWdt(hWdt, countMode);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrStartWdt (
    CSL_TmrHandle  hTmr,
    CSL_TmrEnamode countMode
)
{
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMLORS, RESET_OFF);
    CSL_FINST(hTmr->regs->TGCR, TMR_TGCR_TIMHIRS, RESET_OFF);
    CSL_FINST(hTmr->regs->WDTCR, TMR_WDTCR_WDEN, ENABLE);
    CSL_FINS(hTmr->regs->TCR, TMR_TCR_ENAMODE_LO, countMode);
    CSL_FINS(hTmr->regs->TCR, TMR_TCR_ENAMODE_HI, countMode); 
}



/** ===========================================================================
 *   @n@b CSL_TmrLoadtWdkey
 *
 *   @b Description
 *      sets the watchdog key
 *
 *   @b Arguments
 *   @verbatim
         hTmr        Handle to the Gptimer instance

         cmd         specifies the key 
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Loads the  WDKEY in WDTCR register.
 *
 *
 *   @b Modifies
 *   @n WDTCR rgister
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        Uint16        cmd;	
        ...
        CSL_TmrStartWdt(hTmr, cmd);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrLoadWdkey (
    CSL_TmrHandle hTmr,
    Uint16        cmd
)
{
    CSL_FINS(hTmr->regs->WDTCR, TMR_WDTCR_WDKEY, cmd);
}



/** ===========================================================================
 *   @n@b CSL_TmrDisableWdt
 *
 *   @b Description
 *      disables  the timer in watchdog  mode and counting mode for it
 *
 *   @b Arguments
 *   @verbatim
        hTmr         Handle to the Gptimer instance
     @endverbatim
 *
 *   <b> Return Value </b>
 *       None
 *
 *   <b> Pre Condition </b>
 *   @n  Timer should be set it to any GPtimer mode
 *
 *   <b> Post Condition </b>
 *   @n   Set the watchdog timer counting mode and
 		  timer Low and High reset register and WDEN bit and WDKEY.
 *
 *
 *   @b Modifies
 *   @n Gptimer TCR and TGCR register of timer Low AND High and WDTCR rgister
 *
 *   @b Example
 *   @verbatim
        CSL_TmrHandle hTmr;
        ...
        CSL_TmrStartWdt(hTmr);
        ...
     @endverbatim
 * ===========================================================================
 */
static inline
void CSL_TmrDisableWdt (
    CSL_TmrHandle hTmr
)
{
    CSL_FINST(hTmr->regs->WDTCR, TMR_WDTCR_WDEN, DISABLE);
}

#ifdef __cplusplus
extern "C" {
#endif

#endif /* CSL_TMRAUX_H_ */