⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 cslr_srio.h

📁 Dm6455 driver,magbe useful to you!
💻 H
📖 第 1 页 / 共 5 页
字号:
#define CSL_SRIO_LSU_ICCR_ICC23_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC22_MASK     (0x00400000u)
#define CSL_SRIO_LSU_ICCR_ICC22_SHIFT    (0x00000016u)
#define CSL_SRIO_LSU_ICCR_ICC22_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC21_MASK     (0x00200000u)
#define CSL_SRIO_LSU_ICCR_ICC21_SHIFT    (0x00000015u)
#define CSL_SRIO_LSU_ICCR_ICC21_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC20_MASK     (0x00100000u)
#define CSL_SRIO_LSU_ICCR_ICC20_SHIFT    (0x00000014u)
#define CSL_SRIO_LSU_ICCR_ICC20_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC19_MASK     (0x00080000u)
#define CSL_SRIO_LSU_ICCR_ICC19_SHIFT    (0x00000013u)
#define CSL_SRIO_LSU_ICCR_ICC19_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC18_MASK     (0x00040000u)
#define CSL_SRIO_LSU_ICCR_ICC18_SHIFT    (0x00000012u)
#define CSL_SRIO_LSU_ICCR_ICC18_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC17_MASK     (0x00020000u)
#define CSL_SRIO_LSU_ICCR_ICC17_SHIFT    (0x00000011u)
#define CSL_SRIO_LSU_ICCR_ICC17_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC16_MASK     (0x00010000u)
#define CSL_SRIO_LSU_ICCR_ICC16_SHIFT    (0x00000010u)
#define CSL_SRIO_LSU_ICCR_ICC16_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC15_MASK     (0x00008000u)
#define CSL_SRIO_LSU_ICCR_ICC15_SHIFT    (0x0000000Fu)
#define CSL_SRIO_LSU_ICCR_ICC15_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC14_MASK     (0x00004000u)
#define CSL_SRIO_LSU_ICCR_ICC14_SHIFT    (0x0000000Eu)
#define CSL_SRIO_LSU_ICCR_ICC14_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC13_MASK     (0x00002000u)
#define CSL_SRIO_LSU_ICCR_ICC13_SHIFT    (0x0000000Du)
#define CSL_SRIO_LSU_ICCR_ICC13_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC12_MASK     (0x00001000u)
#define CSL_SRIO_LSU_ICCR_ICC12_SHIFT    (0x0000000Cu)
#define CSL_SRIO_LSU_ICCR_ICC12_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC11_MASK     (0x00000800u)
#define CSL_SRIO_LSU_ICCR_ICC11_SHIFT    (0x0000000Bu)
#define CSL_SRIO_LSU_ICCR_ICC11_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC10_MASK     (0x00000400u)
#define CSL_SRIO_LSU_ICCR_ICC10_SHIFT    (0x0000000Au)
#define CSL_SRIO_LSU_ICCR_ICC10_RESETVAL (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC9_MASK      (0x00000200u)
#define CSL_SRIO_LSU_ICCR_ICC9_SHIFT     (0x00000009u)
#define CSL_SRIO_LSU_ICCR_ICC9_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC8_MASK      (0x00000100u)
#define CSL_SRIO_LSU_ICCR_ICC8_SHIFT     (0x00000008u)
#define CSL_SRIO_LSU_ICCR_ICC8_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC7_MASK      (0x00000080u)
#define CSL_SRIO_LSU_ICCR_ICC7_SHIFT     (0x00000007u)
#define CSL_SRIO_LSU_ICCR_ICC7_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC6_MASK      (0x00000040u)
#define CSL_SRIO_LSU_ICCR_ICC6_SHIFT     (0x00000006u)
#define CSL_SRIO_LSU_ICCR_ICC6_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC5_MASK      (0x00000020u)
#define CSL_SRIO_LSU_ICCR_ICC5_SHIFT     (0x00000005u)
#define CSL_SRIO_LSU_ICCR_ICC5_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC4_MASK      (0x00000010u)
#define CSL_SRIO_LSU_ICCR_ICC4_SHIFT     (0x00000004u)
#define CSL_SRIO_LSU_ICCR_ICC4_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC3_MASK      (0x00000008u)
#define CSL_SRIO_LSU_ICCR_ICC3_SHIFT     (0x00000003u)
#define CSL_SRIO_LSU_ICCR_ICC3_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC2_MASK      (0x00000004u)
#define CSL_SRIO_LSU_ICCR_ICC2_SHIFT     (0x00000002u)
#define CSL_SRIO_LSU_ICCR_ICC2_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC1_MASK      (0x00000002u)
#define CSL_SRIO_LSU_ICCR_ICC1_SHIFT     (0x00000001u)
#define CSL_SRIO_LSU_ICCR_ICC1_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_ICC0_MASK      (0x00000001u)
#define CSL_SRIO_LSU_ICCR_ICC0_SHIFT     (0x00000000u)
#define CSL_SRIO_LSU_ICCR_ICC0_RESETVAL  (0x00000000u)

#define CSL_SRIO_LSU_ICCR_RESETVAL       (0x00000000u)

/* ERR_RST_EVNT_ICSR */

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS16_MASK (0x00010000u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS16_SHIFT (0x00000010u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS16_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS11_MASK (0x00000800u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS11_SHIFT (0x0000000Bu)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS11_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS10_MASK (0x00000400u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS10_SHIFT (0x0000000Au)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS10_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS9_MASK (0x00000200u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS9_SHIFT (0x00000009u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS9_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS8_MASK (0x00000100u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS8_SHIFT (0x00000008u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS8_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS2_MASK (0x00000004u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS2_SHIFT (0x00000002u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS2_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS1_MASK (0x00000002u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS1_SHIFT (0x00000001u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS1_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS0_MASK (0x00000001u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS0_SHIFT (0x00000000u)
#define CSL_SRIO_ERR_RST_EVNT_ICSR_ICS0_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICSR_RESETVAL (0x00000000u)

/* ERR_RST_EVNT_ICCR */

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC16_MASK (0x00010000u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC16_SHIFT (0x00000010u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC16_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC11_MASK (0x00000800u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC11_SHIFT (0x0000000Bu)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC11_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC10_MASK (0x00000400u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC10_SHIFT (0x0000000Au)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC10_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC9_MASK (0x00000200u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC9_SHIFT (0x00000009u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC9_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC8_MASK (0x00000100u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC8_SHIFT (0x00000008u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC8_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC2_MASK (0x00000004u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC2_SHIFT (0x00000002u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC2_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC1_MASK (0x00000002u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC1_SHIFT (0x00000001u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC1_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC0_MASK (0x00000001u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC0_SHIFT (0x00000000u)
#define CSL_SRIO_ERR_RST_EVNT_ICCR_ICC0_RESETVAL (0x00000000u)

#define CSL_SRIO_ERR_RST_EVNT_ICCR_RESETVAL (0x00000000u)

/* DOORBELL_ICRR */

#define CSL_SRIO_DOORBELL_ICRR_ICR7_MASK (0xF0000000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR7_SHIFT (0x0000001Cu)
#define CSL_SRIO_DOORBELL_ICRR_ICR7_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR6_MASK (0x0F000000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR6_SHIFT (0x00000018u)
#define CSL_SRIO_DOORBELL_ICRR_ICR6_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR5_MASK (0x00F00000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR5_SHIFT (0x00000014u)
#define CSL_SRIO_DOORBELL_ICRR_ICR5_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR4_MASK (0x000F0000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR4_SHIFT (0x00000010u)
#define CSL_SRIO_DOORBELL_ICRR_ICR4_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR3_MASK (0x0000F000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR3_SHIFT (0x0000000Cu)
#define CSL_SRIO_DOORBELL_ICRR_ICR3_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR2_MASK (0x00000F00u)
#define CSL_SRIO_DOORBELL_ICRR_ICR2_SHIFT (0x00000008u)
#define CSL_SRIO_DOORBELL_ICRR_ICR2_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR1_MASK (0x000000F0u)
#define CSL_SRIO_DOORBELL_ICRR_ICR1_SHIFT (0x00000004u)
#define CSL_SRIO_DOORBELL_ICRR_ICR1_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_ICR0_MASK (0x0000000Fu)
#define CSL_SRIO_DOORBELL_ICRR_ICR0_SHIFT (0x00000000u)
#define CSL_SRIO_DOORBELL_ICRR_ICR0_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR_RESETVAL  (0x00000000u)

/* DOORBELL_ICRR2 */

#define CSL_SRIO_DOORBELL_ICRR2_ICR7_MASK (0xF0000000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR7_SHIFT (0x0000001Cu)
#define CSL_SRIO_DOORBELL_ICRR2_ICR7_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR6_MASK (0x0F000000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR6_SHIFT (0x00000018u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR6_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR5_MASK (0x00F00000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR5_SHIFT (0x00000014u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR5_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR4_MASK (0x000F0000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR4_SHIFT (0x00000010u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR4_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR3_MASK (0x0000F000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR3_SHIFT (0x0000000Cu)
#define CSL_SRIO_DOORBELL_ICRR2_ICR3_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR2_MASK (0x00000F00u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR2_SHIFT (0x00000008u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR2_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR1_MASK (0x000000F0u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR1_SHIFT (0x00000004u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR1_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_ICR0_MASK (0x0000000Fu)
#define CSL_SRIO_DOORBELL_ICRR2_ICR0_SHIFT (0x00000000u)
#define CSL_SRIO_DOORBELL_ICRR2_ICR0_RESETVAL (0x00000000u)

#define CSL_SRIO_DOORBELL_ICRR2_RESETVAL (0x00000000u)

/* RX_CPPI_ICRR */

#define CSL_SRIO_RX_CPPI_ICRR_ICR7_MASK  (0xF0000000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR7_SHIFT (0x0000001Cu)
#define CSL_SRIO_RX_CPPI_ICRR_ICR7_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR6_MASK  (0x0F000000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR6_SHIFT (0x00000018u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR6_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR5_MASK  (0x00F00000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR5_SHIFT (0x00000014u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR5_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR4_MASK  (0x000F0000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR4_SHIFT (0x00000010u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR4_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR3_MASK  (0x0000F000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR3_SHIFT (0x0000000Cu)
#define CSL_SRIO_RX_CPPI_ICRR_ICR3_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR2_MASK  (0x00000F00u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR2_SHIFT (0x00000008u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR2_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR1_MASK  (0x000000F0u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR1_SHIFT (0x00000004u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR1_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_ICR0_MASK  (0x0000000Fu)
#define CSL_SRIO_RX_CPPI_ICRR_ICR0_SHIFT (0x00000000u)
#define CSL_SRIO_RX_CPPI_ICRR_ICR0_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR_RESETVAL   (0x00000000u)

/* RX_CPPI_ICRR2 */

#define CSL_SRIO_RX_CPPI_ICRR2_ICR7_MASK (0xF0000000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR7_SHIFT (0x0000001Cu)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR7_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR6_MASK (0x0F000000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR6_SHIFT (0x00000018u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR6_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR5_MASK (0x00F00000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR5_SHIFT (0x00000014u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR5_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR4_MASK (0x000F0000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR4_SHIFT (0x00000010u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR4_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR3_MASK (0x0000F000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR3_SHIFT (0x0000000Cu)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR3_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR2_MASK (0x00000F00u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR2_SHIFT (0x00000008u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR2_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR1_MASK (0x000000F0u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR1_SHIFT (0x00000004u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR1_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_ICR0_MASK (0x0000000Fu)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR0_SHIFT (0x00000000u)
#define CSL_SRIO_RX_CPPI_ICRR2_ICR0_RESETVAL (0x00000000u)

#define CSL_SRIO_RX_CPPI_ICRR2_RESETVAL  (0x00000000u)

/* TX_CPPI_ICRR */

#define CSL_SRIO_TX_CPPI_ICRR_ICR7_MASK  (0xF0000000u)
#define CSL_SRIO_TX_CPPI_ICRR_ICR7_SHIFT (0x00000

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -