config.h

VxWOrks中bspMCF5200下的Nand Flash TFFS的驱动程序。

/* m5272c3/config.h - Motorola m5272c3 configuration header */

/* Copyright 1984-2001 Wind River Systems, Inc. */

/*
modification history
--------------------
01f,02may03,dee  fix SPR 87763
01e,19jun02,dee  SPR 74987: cplusplus protection
01d,01apr02,dee  add WDB_COMM_TYPE default
01c,28Mar02,rec  add RAM_LOW_ADRS
01b,28feb02,rec  NVRAM support (spr 74038)
01a,28feb01,hjg  Written based on m5206ec3 BSP.
*/

/*
This module contains the configuration parameters for the
Motorola m5272c3.
*/

#ifndef __INCconfigh
#define __INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

#define BSP_VER_1_0 1
#define BSP_VER_1_1 1
#define BSP_VERSION "1.2"
#define BSP_REV     "/0"

#include "configAll.h"

#define DEFAULT_BOOT_LINE \
        "motfec(0,0)host:vxWorks h=192.168.0.177 e=192.168.0.200:ffffff00 u=vx pw=vx tn=targetname"

/* memory configuration */

/* to determine the actual memory size use sysMemTop() */

#define LOCAL_MEM_LOCAL_ADRS    0x00000000
#define LOCAL_MEM_SIZE                0x01000000  /* 16Meg memory is default */
#define USER_RESERVED_MEM         0x00000000  /* see sysMemTop() */

/*
 * The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS
 * are defined * in config.h and Makefile
 * The definitions for these constants must be identical.
 */

#define RAM_LOW_ADRS        0x00001000  /* base address of RAM */
#define ROM_BASE_ADRS       0xffc00000          /* 0xffc00000   */ /* base address of ROM */
#define ROM_TEXT_ADRS       (ROM_BASE_ADRS + 8) /* with PC & SP */
#define ROM_WARM_ADRS       (ROM_TEXT_ADRS + 8) /* warm reboot entry */
#define RAM_HIGH_ADRS       0x00200000  /* RAM address for ROM boot */
/* note: Rom size defined below assumes that half of the space is
* reserved for the onboard Monitor/Debug firmware.  This space
* could be used by the application code if an alternate means of
* loading flash is available (e.g. visionCLICK)
*/
#define ROM_SIZE            0x000FFEF8  /* 1Meg ROM space (less 264 NV ROM)*/
#define MONITOR_ROM_SIZE    0x00100000  /* Rom space reserved for Mot debug */

#define EXT_SRAM_ADDRESS  0x30000000  /* base of external SRAM */
#define EXT_SRAM_SIZE  0x00080000  /* size of external SRAM */
#define SDRAM_BASE          0x00000000  /* base of SDRAM */
#define NV_RAM_SIZE         0x00000108  /* size of NV_RAM = 264 */



/* Flash type */
#undef AMD_FLASH_AM29PL160CB_16BIT     /* or AMD_FLASH_AM29PL320DB_32BIT */
#define AMD_FLASH_SPEED         90      /* Speed option in ns */

/* Internal addresses */
#define SIM_BASE			  0x40000000  /* internal peripheral system base */
#define INTERNAL_SRAM_BASE  0x20000000  /* base of internal SRAM */
#define INTERNAL_SRAM_SIZE   0x10000


/* Optional components */
#undef M5272C3_HAVE_EXTRN_SRAM
#undef M5272C3_HAVE_PLI0
#undef M5272C3_HAVE_PLI1

/* include support for the multiply/accumulate unit (MAC) */
#define INCLUDE_MAC_SUPPORT

/* use ColdFire sys and aux clock drivers */
#define INCLUDE_COLDFIRE_SYS_CLK
#define INCLUDE_COLDFIRE_AUX_CLK

/* timestamp support */
#ifdef INCLUDE_TIMESTAMP
#define INCLUDE_COLDFIRE_TIMESTAMP      /* use timestamp driver from sysClk */
#endif

/* cache support */
#undef INCLUDE_CACHE_SUPPORT
#undef USER_I_CACHE_ENABLE
#undef USER_D_CACHE_ENABLE  /* 5272 has no data cache */

/* include END ethernet drivers */
#define INCLUDE_END

#undef  WDB_COMM_TYPE         /* default WDB agent communication path is END */
#define WDB_COMM_TYPE         WDB_COMM_END

/* board doesn't have hardwared mac address */
#undef ETHERNET_ADR_SET        /* ethernet addr stored in NVRAM */
#define ENET_NVRAM_OFFSET	256	/* NVRAM offset for ether addr   */
#if _BYTE_ORDER == _BIG_ENDIAN
#define ENET_DEFAULT         0x1EA00000
#else
#define ENET_DEFAULT         0x0000A01E
#endif

/* Serial port configuration */
#define SIO_MCF5272_1       0
#define SIO_MCF5272_2       1

#undef  NUM_TTY
#define NUM_TTY             2   /* number of tty channels */

#undef  CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE   9600

#undef  CONSOLE_TTY
#define CONSOLE_TTY         0  /* 0 for terminal conn, 1 for aux conn.  */

/* S/W floating point support */
#define INCLUDE_SW_FP       /* software floating point emulation */
#undef INCLUDE_HW_FP

/* the following drivers are not applicable for non-VMEbus systems */
#undef  INCLUDE_ENP
#undef  INCLUDE_EX
#undef  INCLUDE_SM_NET

/* miscellaneous definitions */
#define SYS_CLK_RATE_MIN    30      /* minimum sys clock rate */
#define SYS_CLK_RATE_MAX    2000        /* maximum sys clock rate */
#define AUX_CLK_RATE_MIN    30      /* minimum aux clock rate */
#define AUX_CLK_RATE_MAX    2000        /* maximum aux clock rate */

/* Coldfire has no MMU */
#undef USER_I_MMU_ENABLE
#undef USER_D_MMU_ENABLE
#undef INCLUDE_MMU_BASIC
#undef INCLUDE_MMU_FULL
#undef INCLUDE_MMU

/*2007-4-9 10:18 mengjun */
/*TFFS*/
#if 1
#ifndef INCLUDE_TFFS
 #define INCLUDE_TFFS
#endif
 #ifdef INCLUDE_TFFS
 #define INCLUDE_TFFS_SHOW
 #define INCLUDE_MTD_K9F4G080UA
// #define INCLUDE_TL_FTL
 #define INCLUDE_TL_NFTL/*2007-4-12 15:23mengjun*/
// #define INCLUDE_TL_SSFDC
 #define INCLUDE_TFFS_DOSFS
#endif
#endif
/*2007-4-9 10:18 mengjun */


/* base interrupt vector (for PIVR). All other vectors (defined in
drv/multi/m5272.h) are fixed based on this
*/
#define INT_NUM_BASE    64

#include "m5272c3.h"

/**
  * isp1362 selected
  *
  * jason start*/
#define ISP1362_BA 0x30000000  
#define ISP1362_SPEED     83.33      /* Speed option in ns 1/12MHz*/

/*#undef DEBUG
#define DEBUG*/
/*jason end*/
#ifdef __cplusplus
}
#endif

#endif  /* __INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif