i2c.fit.eqn

i2c总线的CPLD程序

--cnt_delay[18] is cnt_delay[18] at LC_X8_Y7_N0
--operation mode is normal

cnt_delay[18]_lut_out = A1L141 & (A1L723 # !A1L402);
cnt_delay[18] = DFFEAS(cnt_delay[18]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[13] is cnt_delay[13] at LC_X8_Y7_N2
--operation mode is normal

cnt_delay[13]_lut_out = A1L441 & (A1L723 # !A1L402);
cnt_delay[13] = DFFEAS(cnt_delay[13]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[12] is cnt_delay[12] at LC_X8_Y7_N8
--operation mode is normal

cnt_delay[12]_lut_out = A1L741 & (A1L723 # !A1L402);
cnt_delay[12] = DFFEAS(cnt_delay[12]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[10] is cnt_delay[10] at LC_X8_Y7_N5
--operation mode is normal

cnt_delay[10]_lut_out = A1L051 & (A1L723 # !A1L402);
cnt_delay[10] = DFFEAS(cnt_delay[10]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L623 is reduce_nor~279 at LC_X8_Y7_N6
--operation mode is normal

A1L623 = !cnt_delay[13] # !cnt_delay[10] # !cnt_delay[18] # !cnt_delay[12];


--cnt_delay[8] is cnt_delay[8] at LC_X8_Y7_N3
--operation mode is normal

cnt_delay[8]_lut_out = A1L351 & (A1L723 # !A1L402);
cnt_delay[8] = DFFEAS(cnt_delay[8]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[19] is cnt_delay[19] at LC_X8_Y7_N4
--operation mode is normal

cnt_delay[19]_lut_out = A1L651 & (A1L723 # !A1L402);
cnt_delay[19] = DFFEAS(cnt_delay[19]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L723 is reduce_nor~280 at LC_X8_Y7_N7
--operation mode is normal

A1L723 = A1L623 # !cnt_delay[19] # !cnt_delay[8];


--cnt_delay[16] is cnt_delay[16] at LC_X6_Y6_N9
--operation mode is normal

cnt_delay[16]_lut_out = GND;
cnt_delay[16] = DFFEAS(cnt_delay[16]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L061, , , VCC);


--cnt_delay[15] is cnt_delay[15] at LC_X9_Y6_N6
--operation mode is normal

cnt_delay[15]_lut_out = A1L361;
cnt_delay[15] = DFFEAS(cnt_delay[15]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[14] is cnt_delay[14] at LC_X9_Y6_N9
--operation mode is normal

cnt_delay[14]_lut_out = A1L661;
cnt_delay[14] = DFFEAS(cnt_delay[14]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L002 is always2~176 at LC_X9_Y6_N1
--operation mode is normal

cnt_delay[17]_qfbk = cnt_delay[17];
A1L002 = !cnt_delay[15] & !cnt_delay[14] & !cnt_delay[17]_qfbk & !cnt_delay[16];

--cnt_delay[17] is cnt_delay[17] at LC_X9_Y6_N1
--operation mode is normal

cnt_delay[17] = DFFEAS(A1L002, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L751, , , VCC);


--cnt_delay[9] is cnt_delay[9] at LC_X6_Y6_N2
--operation mode is normal

cnt_delay[9]_lut_out = GND;
cnt_delay[9] = DFFEAS(cnt_delay[9]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L171, , , VCC);


--cnt_delay[7] is cnt_delay[7] at LC_X6_Y6_N8
--operation mode is normal

cnt_delay[7]_lut_out = A1L371;
cnt_delay[7] = DFFEAS(cnt_delay[7]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[6] is cnt_delay[6] at LC_X6_Y6_N4
--operation mode is normal

cnt_delay[6]_lut_out = GND;
cnt_delay[6] = DFFEAS(cnt_delay[6]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L671, , , VCC);


--A1L102 is always2~177 at LC_X9_Y6_N4
--operation mode is normal

cnt_delay[11]_qfbk = cnt_delay[11];
A1L102 = !cnt_delay[9] & !cnt_delay[6] & !cnt_delay[11]_qfbk & !cnt_delay[7];

--cnt_delay[11] is cnt_delay[11] at LC_X9_Y6_N4
--operation mode is normal

cnt_delay[11] = DFFEAS(A1L102, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L861, , , VCC);


--cnt_delay[4] is cnt_delay[4] at LC_X6_Y6_N5
--operation mode is normal

cnt_delay[4]_lut_out = A1L281;
cnt_delay[4] = DFFEAS(cnt_delay[4]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--cnt_delay[3] is cnt_delay[3] at LC_X9_Y6_N5
--operation mode is normal

cnt_delay[3]_lut_out = GND;
cnt_delay[3] = DFFEAS(cnt_delay[3]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L481, , , VCC);


--cnt_delay[2] is cnt_delay[2] at LC_X9_Y6_N8
--operation mode is normal

cnt_delay[2]_lut_out = A1L781;
cnt_delay[2] = DFFEAS(cnt_delay[2]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L202 is always2~178 at LC_X9_Y6_N7
--operation mode is normal

cnt_delay[5]_qfbk = cnt_delay[5];
A1L202 = !cnt_delay[3] & !cnt_delay[4] & !cnt_delay[5]_qfbk & !cnt_delay[2];

--cnt_delay[5] is cnt_delay[5] at LC_X9_Y6_N7
--operation mode is normal

cnt_delay[5] = DFFEAS(A1L202, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L971, , , VCC);


--cnt_delay[0] is cnt_delay[0] at LC_X6_Y6_N6
--operation mode is normal

cnt_delay[0]_lut_out = A1L391 & (A1L723 # !A1L402);
cnt_delay[0] = DFFEAS(cnt_delay[0]_lut_out, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, , , , );


--A1L302 is always2~179 at LC_X6_Y6_N7
--operation mode is normal

cnt_delay[1]_qfbk = cnt_delay[1];
A1L302 = !cnt_delay[0] & (!cnt_delay[1]_qfbk);

--cnt_delay[1] is cnt_delay[1] at LC_X6_Y6_N7
--operation mode is normal

cnt_delay[1] = DFFEAS(A1L302, GLOBAL(clk), GLOBAL(rst), , start_delaycnt, A1L091, , , VCC);


--A1L402 is always2~180 at LC_X9_Y6_N2
--operation mode is normal

A1L402 = A1L102 & A1L202 & A1L302 & A1L002;


--A1L1 is Select~18569 at LC_X9_Y7_N5
--operation mode is normal

A1L1 = !wr_input # !rd_input;


--A1L2 is Select~18570 at LC_X9_Y8_N2
--operation mode is normal

A1L2 = !main_state.00 & (A1L723 # !A1L402 # !A1L1);


--main_state.01 is main_state.01 at LC_X10_Y6_N2
--operation mode is normal

main_state.01_lut_out = !A1L011 & (A1L11 & !wr_input # !A1L11 & (A1L43));
main_state.01 = DFFEAS(main_state.01_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--i2c_state.read_ini is i2c_state.read_ini at LC_X11_Y8_N9
--operation mode is normal

i2c_state.read_ini_lut_out = i2c_state.read_ini & (A1L53 # main_state.10 & A1L81) # !i2c_state.read_ini & main_state.10 & A1L81;
i2c_state.read_ini = DFFEAS(i2c_state.read_ini_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L823 is reduce_nor~281 at LC_X11_Y8_N1
--operation mode is normal

A1L823 = i2c_state.read_data # i2c_state.read_ini;


--i2c_state.sendaddr is i2c_state.sendaddr at LC_X11_Y8_N2
--operation mode is normal

i2c_state.sendaddr_lut_out = A1L63 # i2c_state.sendaddr & main_state.10 & !A1L61;
i2c_state.sendaddr = DFFEAS(i2c_state.sendaddr_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--i2c_state.ini is i2c_state.ini at LC_X10_Y5_N2
--operation mode is normal

i2c_state.ini_lut_out = i2c_state.ini & (main_state.10 # main_state.01) # !i2c_state.ini & !A1L73 & (main_state.10 # main_state.01);
i2c_state.ini = DFFEAS(i2c_state.ini_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L3 is Select~18571 at LC_X9_Y8_N4
--operation mode is normal

A1L3 = inner_state.ack & (i2c_state.sendaddr # i2c_state.read_ini # !i2c_state.ini);


--A1L4 is Select~18572 at LC_X9_Y8_N8
--operation mode is normal

A1L4 = A1L021 & (A1L513 & (inner_state.stop) # !A1L513 & phase1);


--i2c_state.write_data is i2c_state.write_data at LC_X13_Y7_N1
--operation mode is normal

i2c_state.write_data_lut_out = main_state.01 & (i2c_state.write_data # A1L81) # !main_state.01 & i2c_state.write_data & main_state.10;
i2c_state.write_data = DFFEAS(i2c_state.write_data_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L5 is Select~18573 at LC_X9_Y8_N7
--operation mode is normal

A1L5 = main_state.01 & (A1L823 # !inner_state.ack & i2c_state.write_data);


--A1L6 is Select~18574 at LC_X9_Y8_N0
--operation mode is normal

A1L6 = A1L4 # !A1L823 & inner_state.stop & A1L5;


--phase3 is phase3 at LC_X10_Y7_N0
--operation mode is normal

phase3_lut_out = phase3 # !A1L913;
phase3 = DFFEAS(phase3_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , phase3, );


--A1L7 is Select~18575 at LC_X10_Y8_N3
--operation mode is normal

A1L7 = main_state.10 & !i2c_state.read_data # !main_state.10 & (!inner_state.stop # !i2c_state.write_data);


--sda_buf is sda_buf at LC_X11_Y6_N5
--operation mode is normal

sda_buf_lut_out = !A1L64 & !A1L56 & !A1L17 # !A1L16;
sda_buf = DFFEAS(sda_buf_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L8 is Select~18576 at LC_X10_Y8_N4
--operation mode is normal

A1L8 = main_state.00 & (A1L7 & (!sda_buf) # !A1L7 & phase3);


--A1L121 is add~549 at LC_X12_Y4_N0
--operation mode is arithmetic

A1L121 = !clk_div[0];

--A1L221 is add~551 at LC_X12_Y4_N0
--operation mode is arithmetic

A1L221_cout_0 = clk_div[0];
A1L221 = CARRY(A1L221_cout_0);

--A1L321 is add~551COUT1_712 at LC_X12_Y4_N0
--operation mode is arithmetic

A1L321_cout_1 = clk_div[0];
A1L321 = CARRY(A1L321_cout_1);


--A1L923 is reduce_nor~282 at LC_X13_Y4_N8
--operation mode is normal

clk_div[7]_qfbk = clk_div[7];
A1L923 = !clk_div[2] & !clk_div[5] & !clk_div[7]_qfbk & !clk_div[0];

--clk_div[7] is clk_div[7] at LC_X13_Y4_N8
--operation mode is normal

clk_div[7] = DFFEAS(A1L923, GLOBAL(clk), GLOBAL(rst), , , A1L031, , , VCC);


--A1L813 is reduce_nor~1 at LC_X12_Y4_N8
--operation mode is normal

clk_div[3]_qfbk = clk_div[3];
A1L813 = !A1L923 # !clk_div[3]_qfbk # !A1L303;

--clk_div[3] is clk_div[3] at LC_X12_Y4_N8
--operation mode is normal

clk_div[3] = DFFEAS(A1L813, GLOBAL(clk), GLOBAL(rst), , , A1L421, , , VCC);


--A1L9 is Select~18578 at LC_X13_Y7_N6
--operation mode is normal

A1L9 = !phase3 # !inner_state.stop;


--A1L01 is Select~18579 at LC_X13_Y6_N2
--operation mode is normal

A1L01 = i2c_state.read_data & (A1L9) # !i2c_state.read_data & (sda_buf # !phase1);


--A1L11 is Select~18580 at LC_X9_Y6_N3
--operation mode is normal

A1L11 = !main_state.00 & A1L1 & !A1L723 & A1L402;


--A1L282 is i2c_state~115 at LC_X11_Y5_N8
--operation mode is normal

A1L282 = inner_state.ack & phase3;


--A1L21 is Select~18582 at LC_X9_Y8_N1
--operation mode is normal

A1L21 = main_state.10 & i2c_state.read_ini;


--A1L31 is Select~18583 at LC_X12_Y6_N1
--operation mode is normal

A1L31 = main_state.10 # main_state.01;


--link is link at LC_X10_Y7_N7
--operation mode is normal

link_lut_out = A1L28 # A1L18 # A1L03 & A1L48;
link = DFFEAS(link_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L991 is always2~2 at LC_X10_Y6_N5
--operation mode is normal

A1L991 = phase3 & link;


--A1L41 is Select~18585 at LC_X10_Y6_N6
--operation mode is normal

A1L41 = !inner_state.start & (i2c_state.ini # !A1L991) # !main_state.01;


--A1L51 is Select~18586 at LC_X10_Y8_N1
--operation mode is normal

A1L51 = phase3 & !link & (i2c_state.read_ini # !i2c_state.ini) # !phase3 & (i2c_state.read_ini # !i2c_state.ini);


--A1L61 is Select~18587 at LC_X10_Y8_N9
--operation mode is normal

A1L61 = !i2c_state.read_data & (!i2c_state.write_data);


--A1L71 is Select~18588 at LC_X10_Y8_N2
--operation mode is normal

A1L71 = !inner_state.start & (i2c_state.sendaddr # A1L51 # !A1L61);


--A1L81 is Select~18589 at LC_X13_Y7_N2
--operation mode is normal

A1L81 = inner_state.ack & (phase3 & i2c_state.sendaddr);


--A1L91 is Select~18591 at LC_X13_Y7_N0
--operation mode is normal

A1L91 = A1L513 # !phase1 & i2c_state.write_data & main_state.01;


--inner_state.eighth is inner_state.eighth at LC_X11_Y7_N4
--operation mode is normal

inner_state.eighth_lut_out = A1L78 # A1L68 # inner_state.eighth & A1L09;
inner_state.eighth = DFFEAS(inner_state.eighth_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--A1L02 is Select~18593 at LC_X11_Y8_N0
--operation mode is normal

A1L02 = i2c_state.read_data # i2c_state.sendaddr;


--A1L12 is Select~18594 at LC_X11_Y8_N5
--operation mode is normal

A1L12 = A1L211 & inner_state.eighth # !A1L211 & (inner_state.ack);


--A1L22 is Select~18595 at LC_X11_Y8_N6
--operation mode is normal

A1L22 = main_state.10 & (i2c_state.write_data & inner_state.ack # !i2c_state.write_data & (A1L12));


--A1L32 is Select~18596 at LC_X9_Y7_N1
--operation mode is normal

A1L32 = i2c_state.write_data & inner_state.eighth;


--A1L42 is Select~18597 at LC_X9_Y7_N2
--operation mode is normal

A1L42 = main_state.01 & A1L32 & (phase3 # inner_state.ack);


--A1L52 is Select~18598 at LC_X11_Y7_N1
--operation mode is normal

A1L52 = inner_state.eighth # A1L613 & (!phase1 # !inner_state.ack);


--A1L62 is Select~18599 at LC_X11_Y7_N3
--operation mode is normal

A1L62 = i2c_state.write_data & (A1L52 # !i2c_state.sendaddr & !i2c_state.ini) # !i2c_state.write_data & !i2c_state.sendaddr & !i2c_state.ini;


--A1L72 is Select~18600 at LC_X11_Y7_N2
--operation mode is normal

A1L72 = i2c_state.sendaddr # i2c_state.write_data & A1L52;


--A1L82 is Select~18601 at LC_X12_Y7_N9
--operation mode is normal

A1L82 = A1L62 & (inner_state.ack $ (inner_state.eighth & !A1L311)) # !A1L62 & A1L311 & (inner_state.eighth $ inner_state.ack);


--A1L92 is Select~18602 at LC_X12_Y7_N3
--operation mode is normal

A1L92 = inner_state.ack $ (phase3 & A1L82);


--A1L03 is Select~18603 at LC_X9_Y7_N9
--operation mode is normal

A1L03 = main_state.01 & (!i2c_state.write_data # !inner_state.eighth);


--A1L421 is add~554 at LC_X12_Y4_N3
--operation mode is arithmetic

A1L421 = clk_div[3] $ (A1L231);

--A1L521 is add~556 at LC_X12_Y4_N3
--operation mode is arithmetic

A1L521_cout_0 = !A1L231 # !clk_div[3];
A1L521 = CARRY(A1L521_cout_0);

--A1L621 is add~556COUT1_717 at LC_X12_Y4_N3
--operation mode is arithmetic

A1L621_cout_1 = !A1L331 # !clk_div[3];
A1L621 = CARRY(A1L621_cout_1);


--A1L721 is add~559 at LC_X12_Y4_N5
--operation mode is arithmetic

A1L721_carry_eqn = (!A1L831 & GND) # (A1L831 & VCC);
A1L721 = clk_div[5] $ A1L721_carry_eqn;

--A1L821 is add~561 at LC_X12_Y4_N5
--operation mode is arithmetic

A1L821_cout_0 = !A1L831 # !clk_div[5];
A1L821 = CARRY(A1L821_cout_0);

--A1L921 is add~561COUT1_719 at LC_X12_Y4_N5
--operation mode is arithmetic

A1L921_cout_1 = !A1L831 # !clk_div[5];
A1L921 = CARRY(A1L921_cout_1);


--A1L031 is add~564 at LC_X12_Y4_N7
--operation mode is normal

A1L031_carry_eqn = (!A1L831 & A1L531) # (A1L831 & A1L631);
A1L031 = A1L031_carry_eqn $ clk_div[7];


--A1L131 is add~569 at LC_X12_Y4_N2
--operation mode is arithmetic

A1L131 = clk_div[2] $ !A1L791;

--A1L231 is add~571 at LC_X12_Y4_N2
--operation mode is arithmetic

A1L231_cout_0 = clk_div[2] & !A1L791;
A1L231 = CARRY(A1L231_cout_0);

--A1L331 is add~571COUT1_716 at LC_X12_Y4_N2
--operation mode is arithmetic

A1L331_cout_1 = clk_div[2] & !A1L891;
A1L331 = CARRY(A1L331_cout_1);


--A1L431 is add~574 at LC_X12_Y4_N6
--operation mode is arithmetic

A1L431_carry_eqn = (!A1L831 & A1L821) # (A1L831 & A1L921);
A1L431 = clk_div[6] $ !A1L431_carry_eqn;

--A1L531 is add~576 at LC_X12_Y4_N6
--operation mode is arithmetic

A1L531_cout_0 = clk_div[6] & !A1L821;
A1L531 = CARRY(A1L531_cout_0);

--A1L631 is add~576COUT1_721 at LC_X12_Y4_N6
--operation mode is arithmetic

A1L631_cout_1 = clk_div[6] & !A1L921;
A1L631 = CARRY(A1L631_cout_1);


--A1L731 is add~579 at LC_X12_Y4_N4
--operation mode is arithmetic

A1L731 = clk_div[4] $ (!A1L521);