maiko_mmap.h

LCD的程序 3D效果的LCD 很有参考价值

// maiko-lite偺儊儌儕儅僢僾
//
// 050418 CAU娭學偺峏怴
//


//memory map
#ifndef _MAIKO_MEMORY_MAP_H_
#define _MAIKO_MEMORY_MAP_H_

//AHB memory map
#define APSRAMCTLR_RAM_BASE     0x00000000
#define SRAM_RAM_PREMAP_BASE    APSRAMCTLR_RAM_BASE
#define APSRAMCTLR_RAM_END      0x0FFFFFFF
#define SRAM_RAM_PREMAP_END     APSRAMCTLR_RAM_END
#define SDRAM_RAM_BASE          0x10000000
#define SDRAM_RAM_END           0x7FFFFFFF

#define MEMC_REG_BASE           0x8FFF0000
/*
#define MEMC_CONFIG_REG	        (MEMC_REG_BASE)
#define MEMC_REFINT_REG	        (MEMC_REG_BASE + 0x4)
#define MEMC_REFCTL_REG         (MEMC_REG_BASE + 0x8)
#define MEMC_DDC_REG            (MEMC_REG_BASE + 0xC)
#define MEMC_SRAM1_TIMING_REG   (MEMC_REG_BASE + 0x10)
#define MEMC_SRAM2_TIMING_REG   (MEMC_REG_BASE + 0x14)
*/
#define MEM_CNTRL_REG_END       0x8FFFFFFF

#define APB_BASE                0x90000000
#define APB_END                 0x9FFFFFFF
#define AHB1_SLAVE_BASE         0xA0000000
#define AHB1_SLAVE_END          0xAFFFFFFF
#define AHB2_SLAVE_BASE         0xB0000000
#define AHB2_SLAVE_END          0xBFFFFFFF
#define AHB3_SLAVE_BASE         0xC0000000
#define AHB3_SLAVE_END          0xCFFFFFFF
#define AHB4_SLAVE_BASE         0xD0000000
#define AHB4_SLAVE_END          0xDFFFFFFF
#define AHB5_SLAVE_BASE         0xE0000000
#define SRAM_RAM_POSTMAP_BASE   0xE0000000
#define AHB5_SLAVE_END          0xEFFFFFFF
#define SRAM_RAM_POSTMAP_END    0xEFFFFFFF
#define AHB6_SLAVE_BASE         0xF0000000
#define AHB6_SLAVE_END          0xFFFFFFFF

//APB memory map
#define GPIO_APB_BASE           0x00000000
#define TIMERS12_APB_BASE       0x00010000
#define UART0_APB_BASE          0x00020000
#define UART1_APB_BASE          0x00030000
/* i2c 0, 1 */
#define UNUSED2_APB_BASE        0x00040000
#define UNUSED2_APB_END         0x0004FFFF
#define UNUSED3_APB_BASE        0x00050000
#define UNUSED3_APB_END         0x0005FFFF
/* end i2c */
#define WDT_APB_BASE            0x00060000
#define REMAP_APB_BASE          0x00070000
#define CCSP_CONFIG_APB_BASE    0x00080000
#define RTC_APB_BASE            0x00090000
#define MAIKO_CONFIG_APB_BASE   0x000A0000
#define PMU_APB_BASE            0x000B0000
#define TIMERS34_APB_BASE       0x000C0000
#define GPIO2_APB_BASE          0x000D0000	//add:by nakajima(050609)

/* adcc */
//#define UNUSED4_APB_BASE      0x000D0000	//del:by nakajima(050609)
#define UNUSED4_APB_END         0x000DFFFF
/* end adcc */
#define APB_UNUSED              (APB_BASE + 0x000E0000)
#define APB_UNUSED_END          (APB_BASE + 0x000FFFFF)

#define GPIO_BASE               (APB_BASE + GPIO_APB_BASE)
#define TIMERS12_BASE           (APB_BASE + TIMERS12_APB_BASE)
#define UART0_BASE              (APB_BASE + UART0_APB_BASE)
#define UART1_BASE              (APB_BASE + UART1_APB_BASE)
#define WDT_BASE                (APB_BASE + WDT_APB_BASE)
#define REMAP_BASE              (APB_BASE + REMAP_APB_BASE)
#define CCSP_CONFIG_BASE        (APB_BASE + CCSP_CONFIG_APB_BASE)
#define RTC_BASE                (APB_BASE + RTC_APB_BASE)
#define MAIKO_CONFIG_BASE       (APB_BASE + MAIKO_CONFIG_APB_BASE)
#define PMU_BASE                (APB_BASE + PMU_APB_BASE)
#define TIMERS34_BASE           (APB_BASE + TIMERS34_APB_BASE)
#define GPIO2_BASE              (APB_BASE + GPIO2_APB_BASE)

//AHB memory map
#define SFLASH_AHB_BASE         0x00000000
#define SFLASH_AHB_END          0x00FFFFFF
#define SPI_AHB_BASE            0x01000000
#define SPI_AHB_END             0x03FFFFFF
//#define MPMBOX_AHB_BASE         0x04000000
//#define MPMBOX_AHB_END          0x07FFFFFF
//koto
#define CAU_AHB_BASE         0x04000000
#define CAU_AHB_END          0x07FFFFFF


#define GPU_AHB_BASE            0x08000000
#define GPU_AHB_END             0x0BFFFFFF
#define SDIO_AHB_BASE           0x0C000000
#define SDIO_AHB_END            0x0FFFFFFF

#define SFLASH_BASE             (AHB1_SLAVE_BASE + SFLASH_AHB_BASE)
#define SPI_BASE                (AHB1_SLAVE_BASE + SPI_AHB_BASE)
//#define MPMBOX_BASE             (AHB1_SLAVE_BASE + MPMBOX_AHB_BASE)
//koto
#define CAU_BASE             (AHB1_SLAVE_BASE + CAU_AHB_BASE)

#define GPU_BASE                (AHB1_SLAVE_BASE + GPU_AHB_BASE)
#define SDIO_BASE               (AHB1_SLAVE_BASE + SDIO_AHB_BASE)

#define SPU_AHB_BASE            0x00000000
#define SPU_AHB_END             0x03FFFFFF
#define USB_AHB_BASE            0x04000000
#define USB_AHB_END             0x07FFFFFF
#define MVOUT_AHB_BASE          0x08000000
#define MVOUT_AHB_END           0x0BFFFFFF
#define DMAC_AHB_BASE           0x0C000000
#define DMAC_AHB_END            0x0FFFFFFF

#define SPU_BASE                (AHB2_SLAVE_BASE + SPU_AHB_BASE)
#define USB_BASE                (AHB2_SLAVE_BASE + USB_AHB_BASE)
#define MVOUT_BASE              (AHB2_SLAVE_BASE + MVOUT_AHB_BASE)
#define DMAC_BASE               (AHB2_SLAVE_BASE + DMAC_AHB_BASE)

#define ZDMAC_AHB_BASE          0x00000000
#define ZDMAC_AHB_END           0x03FFFFFF
#define AHB_UNUSED              (AHB3_SLAVE_BASE + 0x04000000 )
#define AHB_UNUSED_END          (AHB4_SLAVE_BASE + 0x0BFFFFFF )

#define ZDMAC_BASE              (AHB3_SLAVE_BASE + ZDMAC_AHB_BASE)

#define INTC_AHB_BASE           0x0C000000
#define INTC_AHB_END            0x0FFFFFFF

#define INTC_BASE               (AHB4_SLAVE_BASE + INTC_AHB_BASE)

#define EXTSRAM_AHB_BASE        0x00000000
#define EXTSRAM_BASE            (AHB5_SLAVE_BASE + EXTSRAM_AHB_BASE)


#endif