ks95mspi.h

ks8995m5口交换机启动eeprom配置源码

//--------------------------------------------------------------------------
//  
//  KS95MSPI.H  (c) Copyright 2002 Micrel-Kendin Operations
//  
//--------------------------------------------------------------------------

//typedef unsigned char	BYTE;

//
//  Version number string
//
//#define VERSIONNO   "V1.5"

#define MACADDRESSLEN	6

//
//  Configuration file name
//
// Registers

//	Port control 0 
#define PORT1CTL0			0x10
// Priority
#define PRIORITYMASK		0x70	
#define PRIORITYDIFFSER		0x40
#define PRIORITY8021P		0x20	
#define PRIORITYPORTBASED	0x10
#define ENABLEPRIORITYQUEUE	0x01


#define PRIORITYMASK		0x70	
#define PRIORITYDIFFSER		0x40
#define PRIORITY8021P		0x20	
#define PRIORITYPORTBASED	0x10
#define ENABLEPRIORITYQUEUE	0x01

#define PORT1CTL2			0x12
#define PORT1CTL3			0x13
#define PORT1CTL4			0x14
#define PORT1CTL11			0x1b

#define PORTCTLREGOFFSET	0x10
#define KS8995M_CHIP_ID0	0
#define KS8995M_CHIP_ID1	1
#define GLOBALCTLBEGIN		2
#define GLOBALCTL1          3
#define GLOBALCTL3          5
#define GLOBALCTLEND		11
#define REGISTERTOTAL		128
#define INDIRECTCTL1		0x6E // 110	
#define INDIRECTCTL2		0x6f // 111
#define INDIRECTDATABASE	0x70 // 112
#define DTESTREGBEGIN		0x79 // 121
#define DTESTREGEND		    0x7C // 124
#define ATESTREGBEGIN		0x7D // 125
#define ATESTREGEND		    0x7F // 127
#define TXRATELIMITHIPORT1LSB	0x15
#define TXRATELIMITLOPORT1LSB	0x16
#define TXRATELIMITPORT1MSB		0x17
#define RXRATELIMITHIPORT1LSB	0x18
#define RXRATELIMITLOPORT1LSB	0x19
#define RXRATELIMITPORT1MSB		0x1a
#define ENABLERATELIMITPORT1	0x1b
#define MIRRORPORT1			0x11

// Indirect commands
#define	INDIRECTREAD		0x10
#define INDIRECTWRITE		0x00
#define INDIRECTSMACTAB		0x00
#define INDIRECTVLANTAB		0x04
#define INDIRECTDMACTAB		0x08
#define INDIRECTMIBCNT		0x0C
#define INDIRECTDROPMIBCNT	0x01

//
// Bit masks
//

#define VALIDMACENTRY		0x10	
#define DMACTABREADY		0x80
#define VLANENABLE          0x80

// Rate limit
#define RATELIMITLOMSBMASK	0xf0
#define RATELIMITHIMSBMASK	0x0f
#define RXDIFFPRIORITYCTL	0x80
#define RXRATELIMITLOENABLE 0x40
#define RXRATELIMITHIENABLE	0x20
#define RXFLOWCTRLLOENABLE	0x10
#define RXFLOWCTRLHIENABLE	0x08
#define TXDIFFPRIORITYCTL	0x04
#define TXRATELIMITLOENABLE 0x02
#define TXRATELIMITHIENABLE	0x01


#define MIRRORPORT			0x80
#define RXMIRROREDPORT		0x40
#define TXMIRROREDPORT		0x20

#define ENABLEINGRESSFILTERING	0x40
#define ENABLEINGRESSFILTERINGSHIFT	0x06
#define DISCARDNONPVIDPACKETS	0x20
#define DISCARDNONPVIDPACKETSSHIFT	0x05

#define PORTINSERTION		0x04
#define PORTINSERTIONSHIFT	0x02
#define PORTREMOVAL			0x02
#define PORTREMOVALSHIFT	0x01

#define PORTVIDHI			0x0f // Bit 8-11 of port VID
#define PORTVIDLO			0xff // Bit 0-7 of port VID

// Global Control Reg 1
#define INCLUDEBADFRAMES	0x80
#define FRAMELENCHECKING	0x08

//Globa Control Reg 3
#define MIRRORMODESELECT	0x01


// Port dropped packet MIB counters
#define DROPPEDMIBTOTAL		10		// Total number of dropped packet MIB counters

// MIB
#define MIBCOUNTEROFFSET	0x20	// Each port has these many MIB counters
#define MIBVALIDMASK		0x40000000
#define MIBOVERFLOWMASK		0x80000000
#define NOMIBREAD			0x01

// VLAN
#define VLANCOUNT       16
#define MAXVLAN         4096

// Rate Limit
#define MAXRATELIMIT	100		// 100 Mbps
#define RATEUNIT		32		// 32 Kbps

// Static MAC table
#define SMACTABCOUNT	8	// Total 8 entries

// Constants
#define KS8995MID		0x95
#define MAXCMDLINELEN	256
#define BLANK			' '
#define MAXSUBCMDLEN	4
#define STATICMACTOTAL  8		// 8 static MAC address entries in total
#define VLANTABTOTAL	16		// 16 VLAN table entries in total
#define DMACTABTOTAL	1024	// 1024 dynamic MAC address entries in total
#define PORTCOUNT		5
#define MAXLINE        256

// ERROR CODE
#define FALSE			0
#define TRUE			1
#define FAIL			-1
#define NOPARAMETER		-1
#define SUCCESS			0
#define CMDERROR		1
#define SPIMINITERROR	2
#define PARMERROR		3


// SPI Commands
#define SPI_WRITE	2
#define SPI_READ	3


// SPIM Controls

// Data Rate
#define SPIMCONT_DIVIDE_BY_4		0
#define SPIMCONT_DIVIDE_BY_8		1
#define SPIMCONT_DIVIDE_BY_16		2
#define SPIMCONT_DIVIDE_BY_32		3
#define SPIMCONT_DIVIDE_BY_64		4
#define SPIMCONT_DIVIDE_BY_128		5
#define SPIMCONT_DIVIDE_BY_256		6
#define SPIMCONT_DIVIDE_BY_512		7

#define SPIMCONT_1_BIT				0
#define SPIMCONT_2_BIT				1
#define PIMCONT_3_BIT				2
#define SPIMCONT_4_BIT				3
#define SPIMCONT_5_BIT				4
#define SPIMCONT_6_BIT				5
#define SPIMCONT_7_BIT				6
#define SPIMCONT_8_BIT				7
#define SPIMCONT_9_BIT				8
#define SPIMCONT_10_BIT				9
#define SPIMCONT_11_BIT				10
#define SPIMCONT_12_BIT				11
#define SPIMCONT_13_BIT				12
#define SPIMCONT_14_BIT				13
#define SPIMCONT_15_BIT				14
#define SPIMCONT_16_BIT				15


#define VID				"vid="
#define FID				"fid="
#define MEMBERSHIP		"mbr="
#define VALID			"on="

#define VID1MASK		0xff
#define VID2MASK		0x0f
#define VTABFIDMASK		0xf0
#define MBRMASK			0x1f

#define VID1SHIFT		8
#define FIDSHIFT		4


#define UFID			"ufid="
#define OVERRIDE		"over="
#define FORWARDINGPORT	"port="
#define MAC				"mac="

#define FIDMASK			0x0f
#define UFIDMASK		0x80
#define OVERRIDEMASK	0x40
#define VALIDMASK		0x20
#define	FPORTSMASK		0x1f	

#define UFIDSHIFT		7
#define OVERRIDESHIFT	6
#define VALIDSHIFT		5


#define SPIDMASK    0x80
#define SPISMASK    0x01    // Bit 1 is inverted
#define SPIQMASK    0x40
#define SPICMASK    0x04

#define PTICKS      150     // Dealy after each parallel port access

extern unsigned int  uParallelBase;  // Default parallel port base    
extern unsigned short  uSPICPort; //= uParallelBase + 2;
extern unsigned short  uSPIDPort; //= uParallelBase;
extern unsigned short  uSPIQPort; //= uParallelBase + 1;
extern unsigned short  uSPISPort; //= uParallelBase + 2;