📄 chk2xx.txt
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SUBB dma | | | | |X| | | | | |
SUBB ind [,ARn] | | | | |X| | | | | |
SUBC dma | | | | |X| | | | | |
SUBC ind [,ARn] | | | | |X| | | | | |
SUBS dma | | | | |X| | | | | |
-------------------------+-+-+-+-+-+-+-+-+-+-+
SUBS ind [,ARn] | | | | |X| | | | | |
SUBT dma | | | | |X| | | | | |
SUBT ind [,ARn] | | | | |X| | | | | |
TBLR dma | |X| | | | | | | | |
TBLR ind [,ARn] | |X| | | | | | | | |
-------------------------+-+-+-+-+-+-+-+-+-+-+
TBLW dma | |X| | | | | | | | |
TBLW ind [,ARn] | |X| | | | | | | | |
TRAP | | | | | | | | | |X|
XOR dma | | | | |X| | | | | |
XOR ind [,ARn] | | | | |X| | | | | |
-------------------------+-+-+-+-+-+-+-+-+-+-+
XOR #lk [,shift] | | | | |X|X|X|X| | |
XOR #lk,16 | | | | |X|X| |X| | |
ZALR dma | | | | |X| | | | | |
ZALR ind [,ARn] | | | | |X| | | | | |
-------------------------+-+-+-+-+-+-+-+-+-+-+
3.4 PROGRAM OPTIONS
The file OPTIONS.H is an include file containing user setable option
variables. All changes to these variables must be made prior to compiling
and linking the program by editing OPTIONS.H with any standard text editor.
The following is a description of the program options, and the corresponding
variable settings:
Program relocation option: variable name: SS
-------------------------- default value: 0h
module affected: all modules
The program has been designed so that it can reside at one memory location,
and be boot loaded into another location. This is useful, for example, if
the program is stored in some slow external ROM, but is to be run from
faster RAM elsewhere in the system (some members of the '2xx DSP family do
have enough on-chip RAM to allow running the program from on-chip). All
program labels have been defined with the structure "label .set $+SS".
The $ is an assembler feature that indicates the relative location within
the entire selfcheck program, and the SS is a user setable offset that
defines the starting location from where the code will be executed. For
example, if checking a TMS320C209 and the selfcheck program is to be
bootloaded to the beginning of the on-chip SARAM block, set SS = 1000h. The
default setting of 0h executes the code from where it resides in program
memory.
TMS320C209 SARAM test option: variable name: RAM_C209
----------------------------- default value: 0
module affected: RAM
If checking a TMS320C209 DSP, you can optionally test the internal single-
access RAM block by setting RAM_C209 = 1. Note that the RAMEN pin must be
pulled high on the DSP to activate the RAM block, or the program will
produce an error. Be aware that the RAM test is destructive! Any code or
data residing in the SARAM block will be overwritten.
External RAM test options: variable name: RAM_EXT1
-------------------------- variable name: RAM_EXT2
default value: 0
module affected: RAM
Provision has been made in the code to check up to two external memory
blocks (or additional on-chip blocks). To check the first block, set
RAM_EXT1 = 1, and also set the variables EXT1STRT and EXT1LNTH to the proper
values corresponding to the starting address and length of the external
block to be checked, (these hexadecimal variables are found in OPTIONS.H
right after RAM_EXT1). To check a second block, set RAM_EXT2 = 1, and also
set EXT2STRT and EXT2LNTH to their desired values. Be aware that the RAM
test is destructive! Any code or data residing in the external memory
blocks will be overwritten.
Calling routine lockout option: variable name: LOCKOUT
------------------------------- default value: 0
module affected: CHK2XX
If the selfcheck fails, the program will either return the error code to the
calling routine, or enter an endless loop to lockout the calling routine.
The lockout option is selected by setting LOCKOUT = 1. Note that all
maskable interrupts are disabled at the beginning of the program, and will
still be disabled when the endless loop is entered. Therefore, only a
system reset will regain control over a failed device when using the LOCKOUT
option. If the selfcheck passes, the program will always return to the
calling routine regardless of how LOCKOUT is set.
C2xx Simulator v1.30 bug bypass: variable name: SIMULATOR
-------------------------------- default value: 1
module affected: CTRL
A bug exists in the C2xx Simulator v1.30 (and probably all earlier
versions). Bit 6 of register ST1 is statically set to a 0 rather than a 1.
This bug will cause an error to be flagged (error code 30h) when running the
selfcheck on the simulator. To avoid flagging this error, the affected code
portion should be bypassed by setting SIMULATOR = 1. When not using the
simulator set SIMULATOR = 0 to include the ST1 register check.
3.5 THE PROGRAM CODE CHECKSUM OPTION
The program code checksum test performs a summation of all op-codes in
the selfcheck program. It is useful for verifying the integrity of the
selfcheck code present in the DSP memory. Proper activation of this option
is more involved than those listed in the previous section, and hence
requires special attention here. To activate this option, begin by setting
CHKSUM = 1 in the file OPTIONS.H (default is CHKSUM = 0 for no checksum
test). One must next determine the correct checksum value so that the test
can verify it. A method has been provided for the DSP itself to perform
this task. Compile and link the entire program with all options set as
desired. Run the program on either the C2xx Simulator or on actual hardware
(e.g. via XDS510 Emulation) but DO NOT set any breakpoints. The program
will either return an error code of 01h or lock up, depending on the LOCKOUT
option setting. At this point, the correct 32 bit checksum value will be
present in two 16 bit data memory locations: the high word at address 62h,
and the low word at address 63h. Edit the last two lines of the file
SHFT.ASM, and set the constant CHKSUMHI to the value in location 62h, and
CHKSUMLO to the value in location 63h. Reassemble and link the entire
program. The checksum option is now properly activated.
It is important to note the following:
1) The checksum verifies all code linked into the .text COFF section between
the modules CHK2XX.OBJ and SHFT.OBJ inclusively. Care should be taken if
modifying the linking order in the linker command file (e.g. USER.CMD).
2) The correct checksum values must be recomputed anytime different program
options are selected, or the checksum will fail.
3) Breakpoints cannot be set anywhere in the selfcheck program if the
checksum test is active. Doing so will cause the checksum to fail.
4.0 INTERPRETING ERROR CODES
Table 2 lists all possible error codes that the selfcheck can return.
It also gives the name of the module that generates the error code. It is
important to note that the code descriptions identify only potential causes
of the error. They should not be taken as absolute. Any number of actual
malfunctions could generate a particular error code. For example a bad
memory location would cause every test using it to fail.
A trade-off exists between code length and the number of possible error
codes. A large number of codes provides more detailed error information to
the user, but increases the length of the code. In this program, the number
of error codes has been kept moderate, and to emphasize what was stated
previously, the selfcheck program aborts execution at the first such error
code that is generated. This program design is based on the belief that any
selfcheck error brings into question the reliability of the device, and
therefore use of the failed C2xx device will be discontinued regardless of
the type of error (or number of errors) that may be present.
TABLE 2: ERROR CODES
------+------------------------------------------------------------+--------
CODE | DESCRIPTION | MODULE
------+------------------------------------------------------------+--------
01h | program code checksum error | CHK2XX
------+------------------------------------------------------------+--------
10h | basic operations general error | BASIC
11h | B instruction | BASIC
------+------------------------------------------------------------+--------
20h | direct addressing error (BLDD, DMOV) | DATA
21h | direct addressing error (BLPD, TBLR, TBLW) | DATA
22h | CMPR instruction | DATA
23h | indirect addressing error(BLDD, DMOV) or LACT instruction | DATA
24h | indirect addressing error (BLPD, TBLR, TBLW) | DATA
28h | auxillary register 0 | DATA
29h | auxillary register 1 | DATA
2ah | auxillary register 2 | DATA
2bh | auxillary register 3 | DATA
2ch | auxillary register 4 | DATA
2dh | auxillary register 5 | DATA
2eh | auxillary register 6 | DATA
2fh | auxillary register 7 | DATA
------+------------------------------------------------------------+--------
30h | ST1 load/store error | CTRL
31h | ST0 load/store error | CTRL
32h | SETC or CLRC instruction | CTRL
33h | BIT or BITT instruction | CTRL
34h | hardware stack operations | CTRL
------+------------------------------------------------------------+--------
40h | branch operations error | BRNCH
------+------------------------------------------------------------+--------
50h | ALU logical error | ALU
51h | ALU addition error | ALU
52h | ALU subtraction error | ALU
53h | SUBC instruction | ALU
54h | overflow mode error | ALU
55h | NORM or ZALR instruction | ALU
------+------------------------------------------------------------+--------
60h | multiplier error - immediate addressing | MULT
61h | multiplier error - direct addressing | MULT
62h | multiplier error - indirect addressing | MULT
63h | MAC or MACD instruction | MULT
64h | LTD, SPH, or SPL instruction | MULT
------+------------------------------------------------------------+--------
70h | RAM block B2 read/write error | RAM
71h | RAM block B0 read/write error | RAM
72h | RAM block B1 read/write error | RAM
73h | TMS320C209 SARAM block read/write error (optional test) | RAM
74h | External RAM block #1 read/write error (optional test) | RAM
75h | External RAM block #2 read/write error (optional test) | RAM
------+------------------------------------------------------------+--------
80h | input data-scaling shifter | SHFT
81h | output data-scaling shifter | SHFT
82h | product-scaling shifter | SHFT
------+------------------------------------------------------------+--------
4.1 THE ALL TESTS PASSED CODE
In the module BASIC, if the accumulator fails to load (LACL #0ffh), it
will not be able to return any error codes. In addition, a CALL instruction
failure would preclude the execution of any of the test modules. In order
to identify these potential malfunctions, the last action of the main
control shell CHK2XX before completing execution of the selfcheck is to call
the subroutine PASS2XX, which resides in the file CHK2XX.ASM. PASS2XX loads
the accumulator with the number ffh (LACL #0ffh) and returns it as a
confirmation that all test modules have passed. A FAILURE TO OBTAIN THIS
CODE UPON COMPLETION OF THE SELFCHECK PROGRAM INDICATES THAT SOME ERROR IS
PRESENT.
5.0 MISCELLANEOUS PROGRAM INFORMATION
1) Most of the test modules work in their entirety regardless of the state
of the SXM bit. This bit has not been explicitly set by any module unless
required by some code within that module. Program comments assume that
SXM = 0 (except in cases where SXM has been explicitly set).
2) In the module ALU, the numbers used in the Logical Operations Test were
chosen to account for all possible pairs of 1's and 0's for each logical
test (i.e. logical operation of 0 with 0, 0 with 1, 1 with 0, and 1 with 1).
3) In the module RAM, the starting address and length of the RAM block to
be tested is passed to the pattern subroutine PTRN in the first two
addresses of block B2 (locations 60h and 61h). Due to the coding employed,
this is not possible when testing block B2. For this special case, the
passing is performed using the first two addresses of block B0 (200h and
201h).
4) Below is a list of on-chip memory that is used prior to the memory check
in the module RAM. If any of these RAM locations are not operational, some
error will probably be flagged well prior to the memory check.
Block B0: addresses 60h through 6eh, 78h through 7Fh
Block B1: addresses 200h and 201h
Block B2: addresses 300h and 301h
5) The selfcheck routine is not interruptable in that all maskable
interrupts are disabled at the start of the program. Upon return to the
calling routine, the IMR register will contain its original value, but the
INTM bit will always be set in status register 0 irrespective of its status
prior to calling the selfcheck (i.e. all interrupts will still be disabled).
6) TMS320C24x users should be aware that no provision has been made in the
program to service the on-chip watchdog timer. In addition, recall that the
program is not interruptable, and thus no watchdog service routine driven by
a timer interrupt will be able to gain control during selfcheck execution.
One option is to disable the watchdog timer prior to running the selfcheck.
7) The program may be single stepped through if desired.
5.1 TECHNICAL SUPPORT
Technical support may be obtained from the Texas Instruments DSP Hotline:
Telephone: (281) 274-2320
Email: dsph@msg.ti.com
World Wide Web Page: http://www/ti/com/sc/docs/dsps/expsys.htm
*** END OF TEXT ***
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