ram.asm

lf2407自检源代码

	.title "TMS320C2xx PROCESSOR SELFCHECK -- RAM TEST"
	.length 60
	.width 120
	.option X
************************************************************
*                                                          *
* RAM TEST                                                 *
*                                                          *
* This routine checks on-chip and external RAM.            *
*                                                          *
* Written by David M. Alter                                *
*            member technical staff                        *
*            Texas Instruments Inc.                        *
*                                                          *
* Release Version 1.0                                      *
*                                                          *
************************************************************
	.def    ram
	.nolist
	.copy   "options.h"
	.copy   "memmap.h"
	.list

B0DMA0  .set    200h            ;first address in block B0
							  
;C2xx family common RAM blocks        
B0STRT  .set    200h            ;start address of block B0 DARAM
B0LNTH  .set    100h            ;length of block B0 DARAM
B1STRT  .set    300h            ;start address of block B1 DARAM
B1LNTH  .set    100h            ;length of block B1 DARAM
B2STRT  .set    60h             ;start address of block B2 DARAM
B2LNTH  .set    20h             ;length of block B2 DARAM

;C209 SARAM block
C209STRT .set 1000h             ;start address of SARAM block  
C209LNTH .set 1000h             ;length of SARAM block

	.text
ram:    .set    $+SS

;preliminary setup
	LDP     #0h             ;data page @ 0h
	CLRC    CNF             ;map RAM block B0 to data space
	MAR     *,AR0           ;ARP --> AR0

;test block B2

;first save contents of block B2 in block B1
	LAR     AR0,#B1STRT     ;AR0 points to address 300h
	RPT     #B2LNTH-1       ;execute next instruction "length" times
	BLDD    #B2STRT,*+      ;perform save copy
;perform the test
	LAR     AR0,#B0DMA0     ;AR0 points to address 200h
	SPLK    #B2STRT,*+      ;data(200h) = START
	SPLK    #B2LNTH-1,*-    ;data(201h) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram1,NEQ     ;abort if RAM block failed test
;restore original contents of block B2 from block B1
	LAR     AR0,#B1STRT     ;AR0 points to address 300h
	RPT     #B2LNTH-1       ;execute next instruction "length" times
	BLDD    *+,#B2STRT      ;perform restore copy

;test block B0
	LAR     AR0,#TEMP00     ;AR0 points to TEMP00
	SPLK    #B0STRT,*+      ;data(TEMP00) = START
	SPLK    #B0LNTH-1,*-    ;data(TEMP01) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram2,NEQ     ;abort if RAM block failed test

;test block B1
	LAR     AR0,#TEMP00     ;AR0 points to TEMP00
	SPLK    #B1STRT,*+      ;data(TEMP00) = START
	SPLK    #B1LNTH-1,*-    ;data(TEMP01) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram3,NEQ     ;abort if RAM block failed test

;test C209 SARAM block
	.if RAM_C209 == 1
	LAR     AR0,#TEMP00     ;AR0 points to TEMP00
	SPLK    #C209STRT,*+    ;data(TEMP00) = START
	SPLK    #C209LNTH-1,*-  ;data(TEMP01) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram4,NEQ     ;abort if RAM block failed test
	.endif

;test External RAM block #1
	.if RAM_EXT1 == 1
	LAR     AR0,#TEMP00     ;AR0 points to TEMP00
	SPLK    #EXT1STRT,*+    ;data(TEMP00) = START
	SPLK    #EXT1LNTH-1,*-  ;data(TEMP01) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram5,NEQ     ;abort if RAM block failed test
	.endif

;test External RAM block #2
	.if RAM_EXT2 == 1
	LAR     AR0,#TEMP00     ;AR0 points to TEMP00
	SPLK    #EXT2STRT,*+    ;data(TEMP00) = START
	SPLK    #EXT2LNTH-1,*-  ;data(TEMP01) = LENGTH-1
	CALL    ptrn            ;call pattern test subroutine
	BCND    eriram6,NEQ     ;abort if RAM block failed test
	.endif

	RET                     ;test passes

*
* ERROR HANDLERS
*

eriram1: .set   $+SS
	LACL    #70h            ;Block B2 error
	RET                     ;test fails
eriram2: .set   $+SS
	LACL    #71h            ;Block B0 error
	RET                     ;test fails
eriram3: .set   $+SS
	LACL    #72h            ;Block B1 error
	RET                     ;test fails

	.if  RAM_C209 == 1
eriram4: .set   $+SS
	LACL    #73h            ;C209 SARAM block error
	RET                     ;test fails            
	.endif
	
	.if  RAM_EXT1 == 1
eriram5: .set   $+SS
	LACL    #74h            ;External RAM block #1 error
	RET                     ;test fails            
	.endif
	
	.if  RAM_EXT2 == 1
eriram6: .set   $+SS
	LACL    #75h            ;External RAM block #2 error
	RET                     ;test fails            
	.endif


	.page
************************************************************
*                                                          *
* SUBROUTINE ptrn                                          *
*                                                          *
* This subroutine performs the bit pattern testing in RAM. *
*                                                          *
************************************************************

PTRN1   .set    5555h           ;test pattern 1
PTRN2   .set    0aaaah          ;test pattern 2

ptrn:   .set    $+SS

;test pattern #1        
	LAR     AR1,*+          ;AR1 points to block start
	LACC    #PTRN1          ;ACC contains test pattern
	RPT     *,AR1           ;execute next instruction "length" times
	SACL    *+              ;write test pattern to memory
	
	MAR     *-,AR0          ;AR1 points to block end
	RPT     *,AR1           ;execute next instruction "length" times
	AND     *-              ;test that all 1's wrote correctly
	XOR     #PTRN1          ;XOR with the pattern
	BCND    erptrn,NEQ      ;if ACC != 0 then error
	
	MAR     *+,AR0          ;AR1 points to block start
	RPT     *-,AR1          ;execute next instruction "length" times
	OR      *+              ;test that all 0's wrote correctly
	XOR     #PTRN1          ;XOR with the pattern
	BCND    erptrn,NEQ      ;if ACC != 0 then error
	MAR     *,AR0           ;ARP --> AR0
	
;test pattern #2        
	LAR     AR1,*+          ;AR1 points to block start
	LACC    #PTRN2          ;ACC contains test pattern
	RPT     *,AR1           ;execute next instruction "length" times
	SACL    *+              ;write test pattern to memory
	
	MAR     *-,AR0          ;AR1 points to block end
	RPT     *,AR1           ;execute next instruction "length" times
	AND     *-              ;test that all 1's wrote correctly
	XOR     #PTRN2          ;XOR with the pattern
	BCND    erptrn,NEQ      ;if ACC != 0 then error
	
	MAR     *+,AR0          ;AR1 points to block start
	RPT     *-,AR1          ;execute next instruction "length" times
	OR      *+              ;test that all 0's wrote correctly
	XOR     #PTRN2          ;XOR with the pattern
	BCND    erptrn,NEQ      ;if ACC != 0 then error
	MAR     *,AR0           ;ARP --> AR0

	RET

erptrn  .set    $+SS
	LACL    #1h             ;return arbitrary non-zero ACC on error
	RET