📄 brnch.asm
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.title "TMS320C2xx PROCESSOR SELFCHECK -- BRANCH INSTRUCTIONS TEST"
.length 60
.width 120
.option X
************************************************************
* *
* BRANCH INSTRUCTIONS TEST *
* *
* This routine checks various branch instructions. *
* *
* Written by David M. Alter *
* member technical staff *
* Texas Instruments Inc. *
* *
* Release Version 1.0 *
* *
************************************************************
.def brnch
.nolist
.copy "options.h"
.copy "memmap.h"
.list
.text
brnch: .set $+SS
;test BACC instruction
LACC #brnch1 ;ACC points to branch1
BACC ;branch to branch1
B erbrnch ;error if previous didn't branch
;test BANZ instruction
brnch1: .set $+SS
LAR AR0,#1h ;AR0 = 1h
LAR AR1,#0h ;AR1 = 0h
MAR *,AR0 ;ARP --> AR0
BANZ brnch2,*,AR1 ;branch to brnch2
B erbrnch ;error if previous didn't branch
brnch2: .set $+SS
BANZ erbrnch,* ;error if branch taken here
;test CALA instruction
LACC #brnchsub ;ACC points to brnchsub subroutine
CALA ;call brnchsub subroutine
BCND erbrnch,NEQ ;if ACC != 0 then error
;test CC instruction
LACL #1h ;ACC = 1h
CC brnchsub,NEQ ;call brnchsub
BCND erbrnch,NEQ ;if ACC != 0 then error
;test RETC instruction
RETC EQ ;test passes
*
* ERROR HANDLERS
*
erbrnch: .set $+SS
LACL #40h ;branch instructions error
RET ;test fails
.page
************************************************************
* *
* SUBROUTINE brnchsub *
* *
* This subroutine clears the accumulator and returns. *
* *
************************************************************
brnchsub: .set $+SS
LACL #0h ;ACC = 0
RET
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